Abstract: In a method of treating a target film, a plurality of pattern structures with sidewall surfaces facing each other are provided. A target film is formed on the sidewalls of the plurality of pattern structures. A plurality of nanoparticles are distributed on the target thin film. The target thin film is thermally treated by irradiating laser light from upper sides of the plurality of pattern structures to the target thin film. The irradiated laser light is scattered from the plurality of nanoparticles.

Abstract: The present invention discloses potassium sodium bismuth niobate tantalate zirconate ferrite ceramics with non-stoichiometric Nb5+ and a preparation method therefor. A ceramic powder with a general formula of (K0.45936Na0.51764Bi0.023)(Nb0.89958+0.957xTa0.05742Zr0.04Fe0.003)O3 (?0.01?x?0.04) is prepared by a traditional solid phase method; and then piezoelectric ceramics are prepared by traditional electronic ceramic preparation processes such as granulating, molding, binder removal, sintering and silvering test. An excessive amount of Nb5+ doping improves the temperature stability of the ceramics by providing a domain wall pinning effect. This result demonstrates the promise of potassium sodium bismuth niobate tantalate zirconate ferrite ceramics for a wide range of applications, including sensors, actuators, and other electronic devices.

Abstract: Methods and systems for fabricating a film, such as, for example, a photocathode, having a tailored band structure and thin-film components that can be tailored for specific applications, such as, for example photocathode having a high quantum efficiency, and simple components fabricated by those methods.

Abstract: In some embodiments, a semiconductor structure includes: a first epitaxial oxide semiconductor layer; a metal layer; and a contact layer adjacent to the metal layer, and between the first epitaxial oxide semiconductor layer and the metal layer. The contact layer can include an epitaxial oxide semiconductor material. The contact layer can also include a region comprising a gradient in a composition of the epitaxial oxide semiconductor material adjacent to the metal layer, or a gradient in a strain of the epitaxial oxide semiconductor material over a region adjacent to the metal layer.

Abstract: A ferroelectric device includes a substrate, a first electrode on the substrate, and a hexagonal ferroelectric material on the first electrode. The first electrode comprises a single crystal epitaxial material. By using a single crystal epitaxial material for an electrode to a hexagonal ferroelectric material, a high-quality material interface may be provided between these layers, thereby improving the performance of the ferroelectric device by allowing for a reduced coercive field.

Abstract: An electrostatic chuck has a structure in which an electrostatic electrode is embedded in a disk-like ceramic plate and attracts a wafer that is placed on the ceramic plate and that has a diameter smaller than that of the ceramic plate by Johnsen-Rahbek force. The electrostatic chuck includes an insulating film that has an electric resistance larger than that of the ceramic plate in an annular region of a front surface of the ceramic plate from an outer circumferential edge of the ceramic plate to the inside of an outer circumferential edge of the wafer that is placed on the ceramic plate.

Abstract: A ferroelectric memory device according to an embodiment includes a substrate, a ferroelectric layer and a gate electrode layer that are sequentially stacked on the substrate, and an oxygen vacancy barrier layer disposed at least between the substrate and the ferroelectric layer or between the ferroelectric layer and the gate electrode layer. The oxygen vacancy barrier layer includes a metal oxide with formula unit components that satisfy a stoichiometric ratio.

Abstract: A coating technique and a priming material are provided. In an exemplary embodiment, the coating technique includes receiving a substrate and identifying a material of the substrate upon which a layer is to be formed. A priming material is dispensed on the material of the substrate, and a film-forming material is applied to the priming material. The priming material includes a molecule containing a first group based on an attribute of the substrate material and a second group based on an attribute of the film-forming material. Suitable attributes of the substrate material and the film-forming material include water affinity and degree of polarity and the first and second groups may be selected to have a water affinity or degree of polarity that corresponds to that of the substrate material and the film-forming material, respectively.

Abstract: Disclosed is a substrate treating apparatus comprising a wafer chuck on which a substrate is placed, an injector unit on a side of the wafer chuck and injecting process gases that include a first gas and a second gas, and a gas supply unit supplying the process gases to the injector unit. The gas supply unit comprises first and second gas supply sources that respectively accommodate the first and second gases, first and second gas supply lines that respectively connect the first and second gas supply sources to the injector unit, and first and second heating units that are respectively disposed on the first and second gas supply lines. The first heating units disposed on the first gas supply line have a density per unit length greater than the density per unit length of the second heating units disposed on the second gas supply line.

Abstract: A device may include: a high-k layer disposed on a substrate and over a channel region in the substrate. The high-k layer may include a high-k dielectric material having one or more impurities therein, and the one or more impurities may include at least one of C, Cl, or N. The one or more impurities may have a molecular concentration of less than about 50%. The device may further include a cap layer over the high-k layer over the channel region, the high-k layer separating the cap layer and the substrate.

Abstract: Provided is a technique of forming a film on a substrate by performing a cycle a predetermined number of times. The cycle includes: forming a first layer by supplying a gas containing a first element to the substrate, wherein the first layer is a discontinuous layer, a continuous layer, or a layer in which at least one of the discontinuous layer or the continuous layer is overlapped; forming a second layer including the first layer and a discontinuous layer including a second element stacked on the first layer; and forming a third layer by supplying a gas containing a third element to the substrate to modify the second layer under a condition where a modifying reaction of the second layer by the gas containing the third element is not saturated.

Abstract: An apparatus and a non-vapor-pressure dependent method of chemical vapor deposition of Si based materials using direct injection of liquid hydrosilane(s) are presented. Liquid silane precursor solutions may also include metal, non-metal or metalloid dopants, nanomaterials and solvents. An illustrative apparatus has a precursor solution and carrier gas system, atomizer and deposit head with interior chamber and a hot plate supporting the substrate. Atomized liquid silane precursor solutions and carrier gas moves through a confined reaction zone that may be heated and the aerosol and vapor are deposited on a substrate to form a thin film. The substrate may be heated prior to deposition. The deposited film may be processed further with thermal or laser processing.

Abstract: A method of making a magnetic random access memory (MRAM) device includes forming a magnetic tunnel junction (MTJ) on an electrode, the MTJ including a reference layer positioned in contact with the electrode, a free layer, and a tunnel barrier layer arranged between the reference layer and the free layer; and depositing an encapsulating layer on and along sidewalls of the MTJ by physical sputtering or ablation of a target material onto the MTJ.

Abstract: Provided are a method of manufacturing a semiconductor device and a substrate processing apparatus. The method includes: forming a first layer including a first element on a substrate by supplying a gas containing the first element; forming a second layer including first and second elements by supplying a gas containing the second element to modify the first layer; and forming a thin film having a predetermined thickness by setting the forming of the first layer and the forming of the second layer to one cycle and repeating the cycle at least once. Pressure, or pressure and a gas supply time in one process of the forming of the first layer and the forming of the second layer are controlled to be higher or longer, or lower or shorter than pressure, or pressure and a time in the one process when the thin film having a stoichiometric composition is formed.

Abstract: Provided is a technique including forming a film by performing a cycle a predetermined number of times. The cycle includes: (a) forming a discontinuous first layer including the first element and having a thickness of less than one atomic layer on the substrate by supplying a gas containing the first element into a process vessel accommodating the substrate; and (b) forming a second layer including the first element and the second element by supplying a gas containing the second element into the process vessel to modify the first layer under a condition where a modifying reaction of the first layer by the gas containing the second element is not saturated.

Abstract: A batch CVD method repeats a cycle including adsorption and reaction steps along with a step of removing residual gas. The adsorption step is preformed while supplying the source gas into the process container by first setting the source gas valve open for a first period and then setting the source gas valve closed, without supplying the reactive gas into the process container by keeping the reactive gas valve closed, and without exhausting gas from inside the process container by keeping the exhaust valve closed. The reaction step is performed without supplying the source gas into the process container by keeping the source gas valve closed, while supplying the reactive gas into the process container by setting the reactive gas valve open, and exhausting gas from inside the process container by setting the exhaust valve to gradually decrease its valve opening degree from a predetermined open state.

Abstract: An upper electrode of a ferroelectric capacitor has a first layer formed of a first oxide expressed by a chemical formula AOx1 (A: metal, O: oxygen) using a stoichiometric composition parameter x1, and expressed by a chemical formula AOx2 using a actual composition parameter x2, and a second layer formed of a second oxide, formed on the first layer, expressed by a chemical formula BOy1 (B: metal) using a stoichiometric composition parameter y1 and expressed by a chemical formula BOy2 using a actual composition parameter y2, which includes at least one of stone-wall crystal and column crystal.

Abstract: The present disclosure is related to a dielectric layer comprising a rare-earth aluminate (RExAl2-xO3 with 0<x<2) and having a perovskite crystalline structure, wherein the rare-earth aluminate comprises a rare-earth element having an atomic number higher than or equal to 63 and lower than or equal to 71. The disclosure also relates to method of manufacturing of a dielectric stack and a dielectric stack comprising said rare-earth aluminate dielectric layer and further comprising a template stack comprising at least an upper template layer, wherein the upper template layer has a perovskite structure, and wherein the upper template layer is underlying and in contact with the rare-earth aluminate dielectric layer. In a preferred embodiment the dielectric stack further comprises a lower template layer having a crystalline structure, wherein the lower template layer is underlying and in contact with the upper template layer.

Abstract: The present method of fabricating a memory device includes the steps of providing a dielectric layer, providing an opening in the dielectric layer, providing a first conductive body in the opening in the dielectric layer, providing a switching body in the opening, and providing a second conductive body in the opening.

Abstract: High-dielectric-constant (k) materials and electrical devices implementing the high-k materials are provided herein. According to some embodiments, an electrical device includes a substrate and a crystalline-oxide-containing composition. The crystalline-oxide-containing composition can be disposed on a surface of the substrate. Within the crystalline-oxide-containing composition, oxide anions can form at least one of a substantially linear orientation or a substantially planar orientation. A plurality of these substantially linear orientations of oxide anions or substantially planar orientations of oxide anions can be oriented substantially perpendicular or substantially normal to the surface of the substrate such that the oxide-containing composition has a dielectric constant greater than about 3.9 in a direction substantially normal to the surface of the substrate. Other embodiments are also claimed and described.

Abstract: The present disclosure is related to a dielectric layer comprising a rare-earth aluminate (RExAl2-xO3 with 0<x<2) and having a perovskite crystalline structure, wherein the rare-earth aluminate comprises a rare-earth element having an atomic number higher than or equal to 63 and lower than or equal to 71. The disclosure also relates to method of manufacturing of a dielectric stack and a dielectric stack comprising said rare-earth aluminate dielectric layer and further comprising a template stack comprising at least an upper template layer, wherein the upper template layer has a perovskite structure, and wherein the upper template layer is underlying and in contact with the rare-earth aluminate dielectric layer. In a preferred embodiment the dielectric stack further comprises a lower template layer having a crystalline structure, wherein the lower template layer is underlying and in contact with the upper template layer.

Abstract: A semiconductor device manufacturing method includes forming a first film made of a first metal to an upper portion of a substrate, forming a second film made of an amorphous metal oxide or an microcrystalline metal oxide on the first film, subjecting the second film to a heat treatment, subjecting the second film after the heat treatment to a reduction treatment, forming a third film made of a ferroelectric material on the second film, and forming a fourth film made of a second metal on the third film.

Abstract: A semiconductor apparatus is proposed which is provided with a crystalline dielectric film having a perovskite structure, between electrodes. The semiconductor apparatus includes at least a discontinuous interface through which crystallinity becomes discontinuous, in a columnar crystal portion of the crystalline dielectric film.

Abstract: A capacitive substrate and method of making same in which first and second glass layers are used. A first conductor is formed on a first of the glass layers and a capacitive dielectric material is positioned over the conductor. The second conductor is then positioned on the capacitive dielectric and the second glass layer positioned over the second conductor. Conductive thru-holes are formed to couple to the first and second conductors, respectively, such that the conductors and capacitive dielectric material form a capacitor when the capacitive substrate is in operation.

Abstract: A method of manufacturing a ferroelectric layer, including: forming a first ferroelectric layer above a base by a vapor phase method; and forming a second ferroelectric layer above the first ferroelectric layer by a liquid phase method.

Abstract: A semiconductor wafer is placed in a chamber of a film-deposition apparatus, and gas in the chamber is exhausted from a gas exhaust outlet. Then, with interrupting the exhaust, an inert gas is introduced into the chamber so that the chamber has a pressure of 133 Pa or higher and lower than 101325 Pa, and then a mixed gas of an inert gas and a source gas for depositing a metal oxide film is introduced into the chamber. Then, after exhausting the gas in the chamber, an oxidation gas is introduced into the chamber to react with the molecules of the source gas absorbed on the semiconductor wafer to form a metal oxide film on the semiconductor wafer. By repeating these steps, a metal oxide film having a desired film thickness is deposited on the semiconductor wafer with a film-thickness distribution by an ALD method.

Abstract: A semiconductor device manufacturing method includes forming a first film made of a first metal to an upper portion of a substrate, forming a second film made of an amorphous metal oxide or an microcrystalline metal oxide on the first film, subjecting the second film to a heat treatment, subjecting the second film after the heat treatment to a reduction treatment, forming a third film made of a ferroelectric material on the second film, and forming a fourth film made of a second metal on the third film.

Abstract: An upper electrode of a ferroelectric capacitor has a first layer formed of a first oxide expressed by a chemical formula AOx1 (A: metal, O: oxygen) using a stoichiometric composition parameter x1, and expressed by a chemical formula AOx2 using a actual composition parameter x2, and a second layer formed of a second oxide, formed on the first layer, expressed by a chemical formula BOy1 (B: metal) using a stoichiometric composition parameter y1 and expressed by a chemical formula BOy2 using a actual composition parameter y2, which includes at least one of stone-wall crystal and column crystal.

Abstract: There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.

Abstract: A thin film transistor (TFT) includes a source electrode, a drain electrode, and a gate electrode. A gate insulator is coupled to the source electrode, drain electrode, and gate electrode. The gate insulator includes room temperature deposited high-K materials so as to allow said thin film transistor to operate at low operating voltage.

Abstract: An electrical component, such as a DRAM semiconductor memory or a field-effect transistor is fabricated. At least one capacitor having a dielectric (130) and at least one connection electrode (120, 140) are fabricated. To enable the capacitors fabricated to have optimum storage properties even for very small capacitor structures, the dielectric (130) or the connection electrode (120, 140) are formed in such a manner that transient polarization effects are prevented or at least reduced.

Abstract: Methods and devices are disclosed, such as those involving forming a charge trap for, e.g., a memory device, which can include flash memory cells. A substrate is exposed to temporally-separated pulses of a titanium source material, a strontium source material, and an oxygen source material capable of forming an oxide with the titanium source material and the strontium source material to form the charge trapping layer on the substrate.

Abstract: A dielectric layer containing an atomic layer deposited zirconium silicon oxide film disposed in an integrated circuit and a method of fabricating such a dielectric layer provide a dielectric layer for use in a variety of electronic devices. Embodiments include forming zirconium silicates as dielectric layers in devices in an integrated circuit. In an embodiment, a zirconium silicon oxide film is formed by atomic layer deposition using a zirconium precursor containing silicon and a silicon precursor. Embodiments include structures for capacitors, transistors, memory devices, and electronic systems with dielectric layers containing an atomic layer deposited zirconium silicon oxide film, and methods for forming such structures.

Abstract: A capacitor includes a lower electrode, a first dielectric film composed of lead zirconate titanate niobate formed above the lower electrode, a second dielectric film composed of lead zirconate titanate or lead zirconate titanate niobate with a Nb composition smaller than a Nb composition of the lead zirconate titanate niobate composing the first dielectric film, and an upper electrode formed above the second dielectric film.

Abstract: A method of manufacturing a semiconductor storage device having a capacitive element having a dielectric layer having a perovskite-type crystal structure represented by general formula ABO3 and a lower electrode and an upper electrode disposed so as to sandwich the dielectric layer therebetween; in the method are carried out forming, on a lower electrode conductive layer, using a MOCVD method, an initial nucleus containing at least one metallic element the same as a metallic element in the dielectric layer, forming, on the initial nucleus, using a MOCVD method, a buffer layer containing at least one metallic element the same as the metallic element contained in both the initial nucleus and the dielectric layer, in a higher content than the content of this metallic element contained in the initial nucleus, and forming, on the buffer layer, using a MOCVD method, the dielectric layer having a perovskite-type crystal structure.

Abstract: The present invention discloses a multi-passivation layer structure for organic thin-film transistors and a method for fabricating the same by spin coating, inject printing, screen printing and micro-contact on organic thin-film transistors. The multi-passivation layer structure for organic thin-film transistors, comprising: a substrate; a gate layer formed on the substrate; an insulator layer formed on the substrate and the gate layer; an electrode layer formed on the insulator layer; a semiconductor layer formed on the insulator layer and the electrode layer; and a passivation layer formed on the semiconductor layer and the electrode layer, thereby forming a multi-passivation layer structure for organic thin-film transistors.