Multistep Process (epo) Patents (Class 257/E21.46)
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Publication number: 20120286265Abstract: A thin film transistor using an amorphous oxide thin film for an active layer, wherein: the amorphous oxide thin film includes, as main components, indium (In), oxygen (O), and a metal element (M) selected from the group consisting of silicon (Si), aluminum (Al), germanium (Ge), tantalum (Ta), magnesium (Mg) and titanium (Ti); an atomic ratio of M to In in this amorphous oxide thin film is 0.1 or more and 0.4 or less; and carrier density in the amorphous oxide thin film is 1×1015 cm?3 or more and 1×1019 cm?1 or less.Type: ApplicationFiled: February 1, 2011Publication date: November 15, 2012Inventors: Kazushige Takechi, Mitsuru Nakata
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Publication number: 20120288993Abstract: To establish a processing technique in manufacture of a semiconductor device including an In—Sn—Zn—O-based semiconductor. An In—Sn—Zn—O-based semiconductor layer is selectively etched by dry etching with the use of a gas containing chlorine such as Cl2, BCl3, SiCl4, or the like. In formation of a source electrode layer and a drain electrode layer, a conductive layer on and in contact with the In—Sn—Zn—O-based semiconductor layer can be selectively etched with little removal of the In—Sn—Zn—O-based semiconductor layer with the use of a gas containing oxygen or fluorine in addition to a gas containing chlorine.Type: ApplicationFiled: May 8, 2012Publication date: November 15, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shinya SASAGAWA, Hitoshi NAKAYAMA, Hiroshi FUJIKI
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Publication number: 20120267624Abstract: An insulating layer is provided with a projecting structural body, and a channel formation region of an oxide semiconductor layer is provided in contact with the projecting structural body, whereby the channel formation region is extended in a three dimensional direction (a direction perpendicular to a substrate). Thus, it is possible to miniaturize a transistor and to extend an effective channel length of the transistor. Further, an upper end corner portion of the projecting structural body, where a top surface and a side surface of the projecting structural body intersect with each other, is curved, and the oxide semiconductor layer is formed to include a crystal having a c-axis perpendicular to the curved surface.Type: ApplicationFiled: April 13, 2012Publication date: October 25, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Atsuo ISOBE, Toshinari SASAKI, Shinya SASAGAWA, Akihiro ISHIZUKA
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Patent number: 8288768Abstract: A thin film transistor using an oxide semiconductor as an active layer, and its method of manufacture. The thin film transistor includes: a substrate; an active layer formed of an oxide semiconductor; a gate insulating layer formed of a dielectric on the active layer, the dielectric having an etching selectivity of 20 to 100:1 with respect to the oxide semiconductor; a gate electrode formed on the gate insulating layer; an insulating layer formed on the substrate including the gate electrode and having contact holes to expose the active layer; and source and drain electrodes connected to the active layer through the contact holes. Since the source and drain electrodes are not overlapped with the gate electrode, parasitic capacitance between the source and drain electrodes and the gate electrode is minimized. Since the gate insulating layer is formed of dielectric having a high etching selectivity with respect to oxide semiconductor, the active layer is not deteriorated.Type: GrantFiled: January 20, 2010Date of Patent: October 16, 2012Assignee: Samsung Display Co., Ltd.Inventors: Min-Kyu Kim, Jin-Seong Park, Tae-Kyung Ahn, Hyun-Joong Chung
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Publication number: 20120248432Abstract: A highly reliable semiconductor device having stable electric characteristics is provided by suppressing, in a transistor including an oxide semiconductor film, diffusion of indium into an insulating film in contact with the oxide semiconductor film and improving the characteristics of the interface between the oxide semiconductor film and the insulating film. In an oxide semiconductor film containing indium, the indium concentration at a surface is decreased, thereby preventing diffusion of indium into an insulating film on and in contact with the oxide semiconductor film. By decreasing the indium concentration at the surface of the oxide semiconductor film, a layer which does not substantially contain indium can be formed at the surface. By using this layer as part of the insulating film, the characteristics of the interface between the oxide semiconductor film and the insulating film in contact with the oxide semiconductor film are improved.Type: ApplicationFiled: March 19, 2012Publication date: October 4, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Kosei NODA, Noriyoshi SUZUKI
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Publication number: 20120252173Abstract: The amount of water and hydrogen contained in an oxide semiconductor film is reduced, and oxygen is supplied sufficiently from a base film to the oxide semiconductor film in order to reduce oxygen deficiencies. A stacked base film is formed, a first heat treatment is performed, an oxide semiconductor film is formed over and in contact with the stacked base film, and a second heat treatment is performed. In the stacked base film, a first base film and a second base film are stacked in this order. The first base film is an insulating oxide film from which oxygen is released by heating. The second base film is an insulating metal oxide film. An oxygen diffusion coefficient of the second base film is smaller than that of the first base film.Type: ApplicationFiled: March 20, 2012Publication date: October 4, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yuki IMOTO, Yuhei SATO
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Patent number: 8278657Abstract: To suppress deterioration in electrical characteristics in a transistor including an oxide semiconductor layer or a semiconductor device including the transistor. In a transistor in which a channel layer is formed using an oxide semiconductor, a silicon layer is provided in contact with a surface of the oxide semiconductor layer. Further, the silicon layer is provided in contact with at least a region of the oxide semiconductor layer, in which a channel is formed, and a source electrode layer and a drain electrode layer are provided in contact with regions of the oxide semiconductor layer, over which the silicon layer is not provided.Type: GrantFiled: February 4, 2010Date of Patent: October 2, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junichiro Sakata, Hiromichi Godo, Takashi Shimazu
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Publication number: 20120244658Abstract: A semiconductor device including an oxide semiconductor, which has stable electric characteristics and high reliability, is provided. In a method for manufacturing a transistor including an oxide semiconductor film, an implantation step where rare gas ions are implanted to the oxide semiconductor film is performed, and the oxide semiconductor film to which rare gas ions are implanted is subjected to a heating step under reduced pressure, in a nitrogen atmosphere, or in a rare gas atmosphere, whereby hydrogen or water contained in the oxide semiconductor film to which rare gas ions are implanted is released; thus, the oxide semiconductor film is highly purified.Type: ApplicationFiled: March 14, 2012Publication date: September 27, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Junichi KOEZUKA, Shinji OHNO, Yuichi SATO
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Publication number: 20120241738Abstract: A semiconductor device having excellent electric characteristics and a method for manufacturing the semiconductor device are provided. A method for manufacturing a semiconductor device includes the steps of: forming a gate electrode; forming a gate insulating film to cover the gate electrode; forming an oxide semiconductor film over the gate insulating film; forming a hydrogen permeable film over the oxide semiconductor film; forming a hydrogen capture film over the hydrogen permeable film; performing heat treatment to release hydrogen from the oxide semiconductor film; forming a source electrode and a drain electrode to be in contact with a part of the oxide semiconductor film; and removing an exposed portion of the hydrogen capture film to form a channel protective film formed of the hydrogen permeable film. A semiconductor device manufactured by the above method is also provided.Type: ApplicationFiled: March 16, 2012Publication date: September 27, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yuki IMOTO, Tetsunori MARUYAMA, Yuta ENDO
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Publication number: 20120220078Abstract: An object is to provide a semiconductor device having stable electric characteristics in which an oxide semiconductor is used. An oxide semiconductor layer is subjected to heat treatment for dehydration or dehydrogenation treatment in a nitrogen gas or an inert gas atmosphere such as a rare gas (e.g., argon or helium) or under reduced pressure and to a cooling step for treatment for supplying oxygen in an atmosphere of oxygen, an atmosphere of oxygen and nitrogen, or the air (having a dew point of preferably lower than or equal to ?40° C., still preferably lower than or equal to ?50° C.) atmosphere. The oxide semiconductor layer is thus highly purified, whereby an i-type oxide semiconductor layer is formed. A semiconductor device including a thin film transistor having the oxide semiconductor layer is manufactured.Type: ApplicationFiled: May 9, 2012Publication date: August 30, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Miyuki HOSOBA, Junichiro SAKATA, Hiroki OHARA, Shunpei YAMAZAKI
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Patent number: 8247812Abstract: An object is to suppress deterioration in electric characteristics in a transistor including an oxide semiconductor layer or a semiconductor device including the transistor. In a transistor in which a channel layer is formed using an oxide semiconductor, a silicon layer is provided in contact with a surface of the oxide semiconductor layer, an impurity semiconductor layer is provided over the silicon layer, and a source electrode layer and a drain electrode layer are provided to be electrically connected to the impurity semiconductor layer.Type: GrantFiled: February 4, 2010Date of Patent: August 21, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junichiro Sakata, Hiromichi Godo, Takashi Shimazu
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Patent number: 8242498Abstract: A compound semiconductor substrate 10 according to the present invention is comprised of a Group III nitride and has a surface layer 12 containing a chloride of not less than 200×1010 atoms/cm2 and not more than 12000×1010 atoms/cm2 in terms of Cl and an oxide of not less than 3.0 at % and not more than 15.0 at % in terms of O, at a surface. The inventors conducted elaborate research and newly discovered that when the surface layer 12 at the surface of the compound semiconductor substrate 10 contained the chloride of not less than 200×1010 atoms/cm2 and not more than 12000×1010 atoms/cm2 in terms of Cl and the oxide of not less than 3.0 at % and not more than 15.0 at % in terms of O, Si was reduced at an interface between the compound semiconductor substrate 10 and an epitaxial layer 14 formed thereon and, as a result, the electric resistance at the interface was reduced.Type: GrantFiled: November 24, 2010Date of Patent: August 14, 2012Assignee: Sumitomo Electric Industries, Ltd.Inventors: Keiji Ishibashi, Fumitake Nakanishi
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Publication number: 20120199827Abstract: According to one embodiment, a method of manufacturing a thin-film transistor circuit substrate including forming an oxide semiconductor thin film above an insulative substrate, forming a gate insulation film and a gate electrode which are stacked on a first region of the oxide semiconductor thin film, and exposing from the gate insulation film a second region and a third region of the oxide semiconductor thin film, the second region and the third region being located on both sides of the first region of the oxide semiconductor thin film, forming an interlayer insulation film of silicon nitride including dangling bonds of silicon, the interlayer insulation film covering the second region and the third region of the oxide semiconductor thin film, the gate insulation film and the gate electrode, and forming a source electrode and a drain electrode.Type: ApplicationFiled: December 19, 2011Publication date: August 9, 2012Inventors: Tetsuya Shibata, Hajime Watakabe, Atsushi Sasaki, Yuki Matsuura, Muneharu Akiyoshi, Hiroyuki Watanabe
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Publication number: 20120180839Abstract: A thermo-electric energy converter converts thermal energy into electric energy and vice-versa. A three-dimensional micro-structure has micro-columns with different micro-column materials. The micro-column materials have different Seebeck-coefficients (thermopower). The diameters of said micro-columns which are arranged parallel to each other are from 0.1 ?m-200 ?m. The micro-columns have, respectively, an aspect ratio between 20-1000. Also, the micro-columns are coupled together as thermo-pairs for building a thermo-voltage. In order to produce the micro-structure, a template has a three-dimensional template structure with column-like template cavities, essentially inverse to the micro-structure micro-column material is inserted in the cavities thus producing micro-columns, and the template material is at least partially removed.Type: ApplicationFiled: September 20, 2010Publication date: July 19, 2012Inventors: Harry Hedler, Jörg Zapf
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Publication number: 20120175610Abstract: A manufacturing method of a semiconductor device includes the steps of: forming a gate electrode over a substrate; forming a gate insulating film over the gate electrode; forming an oxide semiconductor film; performing heat treatment to form a second oxide semiconductor film after the step of forming the first oxide semiconductor film; forming a first conductive film; forming a first resist mask including regions whose thicknesses are different; etching the second oxide semiconductor film and the first conductive film using the first resist mask to form a third oxide semiconductor film and a second conductive film; reducing the size of the first resist mask to form a second resist mask; selectively etching the second conductive film using the second resist mask to remove a part of the second conductive film so that a source electrode and a drain electrode are formed.Type: ApplicationFiled: January 9, 2012Publication date: July 12, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Shunpei YAMAZAKI
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Publication number: 20120175608Abstract: The semiconductor device includes a gate electrode over a substrate, a gate insulating layer over the gate electrode, an oxide semiconductor layer over the gate insulating layer, and a source electrode and a drain electrode over the oxide semiconductor layer. A length of part of an outer edge of the oxide semiconductor layer from an outer edge of the source electrode to an outer edge of the drain electrode is more than three times, preferably more than five times as long as a channel length of the semiconductor device. Further, oxygen is supplied from the gate insulating layer to the oxide semiconductor layer by heat treatment. In addition, an insulating layer is formed after the oxide semiconductor layer is selectively etched.Type: ApplicationFiled: January 9, 2012Publication date: July 12, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Shunpei YAMAZAKI
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Publication number: 20120161122Abstract: A miniaturized semiconductor device including a transistor in which a channel formation region is formed using an oxide semiconductor film and variation in electric characteristics due to a short-channel effect is suppressed is provided. In addition, a semiconductor device whose on-state current is improved is provided. A semiconductor device is provided with an oxide semiconductor film including a pair of second oxide semiconductor regions which are amorphous regions and a first oxide semiconductor region located between the pair of second oxide semiconductor regions, a gate insulating film, and a gate electrode provided over the first oxide semiconductor region with the gate insulating film interposed therebetween. One or more kinds of elements selected from Group 15 elements such as nitrogen, phosphorus, and arsenic are added to the second oxide semiconductor regions.Type: ApplicationFiled: December 20, 2011Publication date: June 28, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Shunpei YAMAZAKI
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Publication number: 20120161126Abstract: A semiconductor device capable of high speed operation is provided. Further, a semiconductor device in which change in electric characteristics due to a short channel effect is hardly caused is provided. An oxide semiconductor having crystallinity is used for a semiconductor layer of a transistor. A channel formation region, a source region, and a drain region are formed in the semiconductor layer. The source region and the drain region are formed by self-aligned process in which one or more elements selected from Group 15 elements are added to the semiconductor layer with the use of a gate electrode as a mask. The source region and the drain region can have a wurtzite crystal structure.Type: ApplicationFiled: December 20, 2011Publication date: June 28, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Shunpei YAMAZAKI
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Publication number: 20120161124Abstract: A semiconductor device in which fluctuation in electric characteristics due to miniaturization is less likely to be caused is provided. The semiconductor device includes an oxide semiconductor film including a first region, a pair of second regions in contact with side surfaces of the first region, and a pair of third regions in contact with side surfaces of the pair of second regions; a gate insulating film provided over the oxide semiconductor film; and a first electrode that is over the gate insulating film and overlaps with the first region. The first region is a CAAC oxide semiconductor region. The pair of second regions and the pair of third regions are each an amorphous oxide semiconductor region containing a dopant. The dopant concentration of the pair of third regions is higher than the dopant concentration of the pair of second regions.Type: ApplicationFiled: December 20, 2011Publication date: June 28, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Shunpei YAMAZAKI
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THIN FILM TRANSISTOR, METHOD OF MANUFACTURING THE SAME AND FLAT PANEL DISPLAY DEVICE HAVING THE SAME
Publication number: 20120153278Abstract: A thin film transistor (TFT) using an oxide semiconductor as an active layer, a method of manufacturing the TFT, and a flat panel display device having the TFT include a gate electrode formed on a substrate; an active layer made of an oxide semiconductor and insulated from the gate electrode by a gate insulating layer; source and drain electrodes coupled to the active layer; and an interfacial stability layer formed on one or both surfaces of the active layer. In the TFT, the interfacial stability layer is formed of an oxide having a band gap of 3.0 to 8.0 eV. Since the interfacial stability layer has the same characteristic as a gate insulating layer and a passivation layer, chemically high interface stability is maintained. Since the interfacial stability layer has a band gap equal to or greater than that of the active layer, charge trapping is physically prevented.Type: ApplicationFiled: February 29, 2012Publication date: June 21, 2012Applicant: SAMSUNG MOBILE DISPLAY CO., LTD.Inventors: Jae-Kyeong JEONG, Jong-Han JEONG, Min-Kyu KIM, Tae-Kyung AHN, Yeon-Gon MO, Hui-Won YANG -
Publication number: 20120153277Abstract: A channel layer is formed on a substrate by using an oxide semiconductor and then a sacrificial layer of an oxide containing In, Zn and Ga and representing an etching rate greater than the etching rate of the oxide semiconductor is formed on the channel layer. Thereafter, a source electrode and a drain electrode are formed on the sacrificial layer and the sacrificial layer exposed between the source electrode and the drain electrode is removed by means of wet etching.Type: ApplicationFiled: December 15, 2011Publication date: June 21, 2012Applicant: CANON KABUSHIKI KAISHAInventors: Seiichiro Yaginuma, Tatsuya Iwasaki, Ryo Hayashi, Hideya Kumomi, Masaya Watanabe
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Publication number: 20120146017Abstract: A method for fabricating an oxide thin film transistor includes sequentially forming a gate insulating film, an oxide semiconductor layer, and a first insulating layer; selectively patterning the oxide semiconductor layer and the first insulating layer to form an active layer and an insulating layer pattern on the gate electrode; forming a second insulating layer on the substrate having the active layer and the insulating layer pattern formed thereon; and selectively patterning the insulating layer pattern and the second insulating layer to form first and second etch stoppers on the active layer. The oxide semiconductor layer may be a ternary system or quaternary system oxide semiconductor comprising a combination of AxByCzO (A, B, C?Zn, Cd, Ga, In, Sn, Hf, Zr; x, y, z?0).Type: ApplicationFiled: December 13, 2011Publication date: June 14, 2012Inventors: Dae-Hwan KIM, Byung-Kook Choi, Sul Lee, Hoon Yim
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Publication number: 20120138921Abstract: A conductive film to be a gate electrode, a first insulating film to be a gate insulating film, a semiconductor film in which a channel region is formed, and a second insulating film to be a channel protective film are successively formed. With the use of a resist mask formed by performing light exposure with the use of a photomask which is a multi-tone mask and development, i) in a region without the resist mask, the second insulating film, the semiconductor film, the first insulating film, and the conductive film are successively etched, ii) the resist mask is made to recede by ashing or the like and only the region of the resist mask with small thickness is removed, so that part of the second insulating film is exposed, and iii) the exposed part of the second insulating film is etched, so that a pair of opening portions is formed.Type: ApplicationFiled: November 18, 2011Publication date: June 7, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yuta ENDO, Kosei NODA
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Publication number: 20120132907Abstract: One of objects is to provide a semiconductor film having stable characteristics. Further, one of objects is to provide a semiconductor element having stable characteristics. Further, one of objects is to provide a semiconductor device having stable characteristics. Specifically, a structure which includes a seed crystal layer (seed layer) including crystals each having a first crystal structure, one of surfaces of which is in contact with an insulating surface, and an oxide semiconductor film including crystals growing anisotropically, which is on the other surface of the seed crystal layer (seed layer) may be provided. With such a heterostructure, electric characteristics of the semiconductor film can be stabilized.Type: ApplicationFiled: November 23, 2011Publication date: May 31, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei Yamazaki, Masahiro Takahashi, Tetsunori Maruyama
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Publication number: 20120132906Abstract: A transistor in which the state of an interface between an oxide semiconductor layer and an insulating film in contact with the oxide semiconductor layer is favorable and a method for manufacturing the transistor are provided. Nitrogen is added to the vicinity of the interface between the oxide semiconductor layer and the insulating film (gate insulating layer) in contact with the oxide semiconductor layer so that the state of the interface of the oxide semiconductor layer becomes favorable. Specifically, the oxide semiconductor layer has a concentration gradient of nitrogen, and a region containing much nitrogen is provided at the interface with the gate insulating layer. A region having high crystallinity can be formed in the vicinity of the interface with the oxide semiconductor layer by addition of nitrogen, whereby the interface state can be stable.Type: ApplicationFiled: November 16, 2011Publication date: May 31, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Shunpei YAMAZAKI
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Publication number: 20120132904Abstract: An object to provide a material suitably used for used for a semiconductor included in a transistor, a diode, or the like, with the use of a sputtering method. Specifically, an object is to provide a manufacturing process an oxide semiconductor film having high crystallinity. By intentionally adding nitrogen to the oxide semiconductor, an oxide semiconductor film having a wurtzite crystal structure that is a hexagonal crystal structure is formed. In the oxide semiconductor film, the crystallinity of a region containing nitrogen is higher than that of a region hardly containing nitrogen or a region to which nitrogen is not intentionally added. The oxide semiconductor film having high crystallinity and having a wurtzite crystal structure is used as a channel formation region of a transistor.Type: ApplicationFiled: November 16, 2011Publication date: May 31, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Shunpei YAMAZAKI
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Publication number: 20120132903Abstract: A highly reliable semiconductor device is manufactured by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used for a channel. An oxide semiconductor film which can have a first crystal structure by heat treatment and an oxide semiconductor film which can have a second crystal structure by heat treatment are formed so as to be stacked, and then heat treatment is performed; accordingly, crystal growth occurs with the use of an oxide semiconductor film having the second crystal structure as a seed, so that an oxide semiconductor film having the first crystal structure is formed. An oxide semiconductor film formed in this manner is used for an active layer of the transistor.Type: ApplicationFiled: November 16, 2011Publication date: May 31, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Masahiro TAKAHASHI, Tetsunori MARUYAMA
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Publication number: 20120122277Abstract: An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by which a semiconductor device can be manufactured with high productivity. A main point is to perform oxygen radical treatment on a surface of a gate insulating layer. Accordingly, there is a peak of the oxygen concentration at an interface between the gate insulating layer and a semiconductor layer, and the oxygen concentration of the gate insulating layer has a concentration gradient. The oxygen concentration is increased toward the interface between the gate insulating layer and the semiconductor layer.Type: ApplicationFiled: January 23, 2012Publication date: May 17, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO
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Publication number: 20120096928Abstract: A method manufactures a sensor device for sensing a gaseous substance and includes a thin film transistor, which includes a source electrode, a drain electrode and a gate electrode; and an element sensitive to the gaseous substance. In particular, the method includes: forming a first metallic layer on a substrate; defining and patterning the first metallic layer for realizing the gate electrode; depositing a dielectric layer above the gate electrode; depositing a second metallic layer above the layer of dielectric material, defining and patterning the second metallic layer for realizing the source electrode and the drain electrode, and forming the sensitive element by filling a channel region of the thin film transistor with an active layer sensitive to the gaseous substance.Type: ApplicationFiled: October 21, 2011Publication date: April 26, 2012Applicant: STMICROELECTRONICS S.R.L.Inventor: Luigi Giuseppe Occhipinti
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Publication number: 20120091452Abstract: The present invention provides an oxide semiconductor capable of achieving a thin film transistor having stable transistor characteristics, a thin film transistor having a channel layer formed of the oxide semiconductor and a production method thereof, and a display device equipped with the thin film transistor. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor. The oxide semiconductor includes indium, gallium, zinc, and oxygen as constituent atoms, and the oxygen content of the oxide semiconductor is 87% to 95% of the stoichiometric condition set as 100%, in terms of atomic units.Type: ApplicationFiled: March 10, 2010Publication date: April 19, 2012Applicant: SHARP KABUSHIKI KAISHAInventors: Yoshifumi Ohta, Go Mori, Hirohiko Nishiki, Yoshimasa Chikama, Tetsuya Aita, Masahiko Suzuki, Okifumi Nakagawa, Michiko Takei, Yoshiyuki Harumoto, Takeshi Hara
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Publication number: 20120094433Abstract: Provided is a method for manufacturing a semiconductor device so as not expose a semiconductor layer to moisture and the number of masks is reduced. For example, a first conductive film, a first insulating film, a semiconductor film, a second conductive film, and a mask film are formed. The first mask film is processed to form a first mask layer. Dry etching is performed on the first insulating film, the semiconductor film, and the second conductive film with the use of the first mask layer to form a thin film stack body, so that a surface of the first conductive film is at least exposed. Sidewall insulating layers covering side surfaces of the thin film stack body are formed. The first conductive film is side-etched to form a first electrode. A second electrode layer is formed with the second mask layer.Type: ApplicationFiled: September 24, 2011Publication date: April 19, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Takafumi MIZOGUCHI, Kojiro SHIRAISHI
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Patent number: 8158975Abstract: Electric characteristics and reliability of a thin film transistor are impaired by diffusion of an impurity element into a channel region. The present invention provides a thin film transistor in which aluminum atoms are unlikely to be diffused to an oxide semiconductor layer. A thin film transistor including an oxide semiconductor layer including indium, gallium, and zinc includes source or drain electrode layers in which first conductive layers including aluminum as a main component and second conductive layers including a high-melting-point metal material are stacked. An oxide semiconductor layer 113 is in contact with the second conductive layers and barrier layers including aluminum oxide as a main component, whereby diffusion of aluminum atoms to the oxide semiconductor layer is suppressed.Type: GrantFiled: October 8, 2009Date of Patent: April 17, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Kengo Akimoto
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Publication number: 20120085985Abstract: An electrically actuated device includes a reactive metal layer, a first electrode established in contact with the reactive metal layer, an insulating material layer established in contact with the first electrode or the reactive metal layer, an active region established on the insulating material layer, and a second electrode established on the active region. A conductive nano-channel is formed through a thickness of the insulating material layer.Type: ApplicationFiled: October 6, 2010Publication date: April 12, 2012Inventors: Jianhua Yang, Minxian Max Zhang, Gilberto Medeiros Ribeiro
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Patent number: 8154024Abstract: An amorphous oxide containing hydrogen (or deuterium) is applied to a channel layer of a transistor. Accordingly, a thin film transistor having superior TFT properties can be realized, the superior TFT properties including a small hysteresis, normally OFF operation, a high ON/OFF ratio, a high saturated current, and the like. Furthermore, as a method for manufacturing a channel layer made of an amorphous oxide, film formation is performed in an atmosphere containing a hydrogen gas and an oxygen gas, so that the carrier concentration of the amorphous oxide can be controlled.Type: GrantFiled: April 19, 2011Date of Patent: April 10, 2012Assignee: Canon Kabushiki KaishaInventor: Tatsuya Iwasaki
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Patent number: 8148242Abstract: A method for manufacturing a SeOI substrate that includes a thin working layer made from one or more semiconductor material(s); a support layer; and a thin buried oxide layer between the working layer and the support layer. The method includes a manufacturing step of an intermediate SeOI substrate having a buried oxide layer with a thickness greater than a thickness desired for the thin buried oxide layer; and a dissolution step of the buried oxide layer in order to form therewith the thin buried oxide layer. After the dissolution step, an oxidation step of the substrate is conducted for creating an oxidized layer on the substrate, and an oxide migration step for diffusing at least a part of the oxide layer through the working layer in order to increase the electrical interface quality of the substrate and decrease its Dit value.Type: GrantFiled: February 20, 2008Date of Patent: April 3, 2012Assignee: SoitecInventors: Oleg Kononchuk, George K. Celler
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Patent number: 8138548Abstract: A thin film transistor array substrate includes a substrate, a gate layer, a gate insulating layer, a source/drain layer, a patterned protective layer, an oxide semiconductor layer, a resin layer and a pixel electrode. The gate layer is disposed on the substrate. The gate insulating layer is disposed on the gate layer and the substrate. The source/drain layer is disposed on the gate insulating layer. The patterned protective layer is disposed on the source/drain layer and exposes a portion of the source/drain layer. The oxide semiconductor layer is disposed on the patterned protective layer and electrically connected to the source/drain layer. The resin layer is disposed on the oxide semiconductor layer and covers the oxide semiconductor layer. The pixel electrode is disposed on the resin layer and connects to the source/drain layer. The present invention also provides a method for making the thin film transistor array substrate. The thin film transistor array substrate can prevent leakage current.Type: GrantFiled: July 16, 2010Date of Patent: March 20, 2012Assignee: E Ink Holdings Inc.Inventors: Sung-Hui Huang, Wei-Chou Lan, Ted-Hong Shinn
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Publication number: 20120061664Abstract: Provided is a method to manufacture a light-emitting display device in which a contact hole for the electrical connection of the pixel electrode and one of the source and drain electrode of a transistor and a contact hole for the processing of a semiconductor layer are formed simultaneously. The method contributes to the reduction of a photography step. The transistor includes an oxide semiconductor layer where a channel formation region is formed.Type: ApplicationFiled: September 7, 2011Publication date: March 15, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei Yamazaki, Kaoru Hatano
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Publication number: 20120058597Abstract: A thin-film field-effect transistor is formed by forming a dielectric layer adjacent a gate, forming a source region and a drain region, and forming a semiconductor layer on the dielectric layer. The semiconductor layer is deposited by spray pyrolysis and comprises a material selected from a group comprising: oxides; oxide-based materials; mixed oxides; metallic type oxides; group I-IV, II-VI, III-VI, IV-VI, V-VI and VIII-VI binary chalcogenides; and group I-II-VI, II-II-VI, II-III-VI, II-VI-VI and V-II-VI ternary chalcogenides.Type: ApplicationFiled: June 30, 2009Publication date: March 8, 2012Applicant: IMPERIAL INNOVATIONS LIMITEDInventors: Thomas Anthopoulos, Donal Donat Conor Bradley, Jeremy Nicholas Smith
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Publication number: 20120058600Abstract: An object is to increase field effect mobility of a thin film transistor including an oxide semiconductor. Another object is to stabilize electrical characteristics of the thin film transistor. In a thin film transistor including an oxide semiconductor layer, a semiconductor layer or a conductive layer having higher electrical conductivity than the oxide semiconductor is formed over the oxide semiconductor layer, whereby field effect mobility of the thin film transistor can be increased. Further, by forming a semiconductor layer or a conductive layer having higher electrical conductivity than the oxide semiconductor between the oxide semiconductor layer and a protective insulating layer of the thin film transistor, change in composition or deterioration in film quality of the oxide semiconductor layer is prevented, so that electrical characteristics of the thin film transistor can be stabilized.Type: ApplicationFiled: November 9, 2011Publication date: March 8, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hideaki KUWABARA, Kengo AKIMOTO, Toshinari SASAKI
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Publication number: 20120058601Abstract: A thin film transistor includes: an insulating layer; a gate electrode provided on the insulating layer; a gate insulating film provided on the gate electrode; a semiconductor layer provided on the gate insulating film, the semiconductor layer being formed of oxide; source and drain electrodes provided on the semiconductor layer; and a channel protecting layer provided between the source and drain electrodes and the semiconductor layer. The source electrode is opposed to one end of the gate electrode. The drain electrode is opposed to another end of the gate electrode. The another end is opposite to the one end. The drain electrode is apart from the source electrode. The channel protecting layer covers at least a part of a side face of a part of the semiconductor layer. The part of the semiconductor layer is not covered with the source and drain electrodes above the gate electrode.Type: ApplicationFiled: November 10, 2011Publication date: March 8, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Nobuyoshi Saito, Tomomasa Ueda, Shintaro Nakano, Shuichi Uchikoga
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Publication number: 20120052626Abstract: A thin film transistor and a manufacturing method thereof are provided. In the manufacturing method of the thin film transistor a semiconductive active layer and a semiconductor passivation layer are sequentially formed such that the semiconductor passivation layer protectively covers the semiconductive active layer. Then the stacked combination of the semiconductive active layer and semiconductor passivation layer are patterned by using a same patterning mask so that formed islands of the semiconductive active layer continue to be protectively covered by formed islands of the semiconductor passivation layer. In one embodiment, the semiconductive active layer is formed of a semiconductive oxide.Type: ApplicationFiled: October 28, 2011Publication date: March 1, 2012Inventors: Seong-Kweon HEO, Min-Chul Shin, Chang-Mo Park
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Patent number: 8110436Abstract: A method for manufacturing a field-effect transistor is provided. The field-effect transistor includes on a substrate a source electrode, a drain electrode, an oxide semiconductor layer, an insulating layer and a gate electrode. The method includes, after forming the insulating layer on the oxide semiconductor layer, an annealing step of increasing the electrical conductivity of the oxide semiconductor layers by annealing in an atmosphere containing moisture. The steam pressure at the annealing step is higher than the saturated vapor pressure in the atmosphere at the annealing temperature.Type: GrantFiled: September 25, 2008Date of Patent: February 7, 2012Assignee: Canon Kabushiki KaishaInventors: Ryo Hayashi, Hisato Yabuta, Yoshinori Tateishi, Nobuyuki Kaji
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Publication number: 20120012835Abstract: A top gate and bottom gate thin film transistor (TFT) are provided with an associated fabrication method. The TFT is fabricated from a substrate, and an active metal oxide semiconductor (MOS) layer overlying the substrate. Source/drain (S/D) regions are formed in contact with the active MOS layer. A channel region is interposed between the S/D regions. The TFT includes a gate electrode, and a gate dielectric interposed between the channel region and the gate electrode. The active MOS layer may be ZnOx, InOx, GaOx, SnOx, or combinations of the above-mentioned materials. The active MOS layer also includes a primary dopant such as H, K, Sc, La, Mo, Bi, Ce, Pr, Nd, Sm, Dy, or combinations of the above-mentioned dopants. The active MOS layer may also include a secondary dopant.Type: ApplicationFiled: July 14, 2010Publication date: January 19, 2012Inventors: Gregory Herman, Jer-shen Maa, Kanan Puntambekar, Apostolos T. Voutsas
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Publication number: 20110318875Abstract: An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.Type: ApplicationFiled: September 13, 2011Publication date: December 29, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Hidekazu MIYAIRI, Akiharu MIYANAGA, Kengo AKIMOTO, Kojiro SHIRAISHI
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Publication number: 20110309333Abstract: A method of forming a semiconductor device is provided, in which the dopant for the source and drain regions is introduced from a doped dielectric layer. In one example, a gate structure is formed on a semiconductor layer of an SOI substrate, in which the thickness of the semiconductor layer is less than 10 nm. A doped dielectric layer is formed over at least the portion of the semiconductor layer that is adjacent to the gate structure. The dopant from the doped dielectric layer is driven into the portion of the semiconductor layer that is adjacent to the gate structure. The dopant diffused into the semiconductor provides source and drain extension regions.Type: ApplicationFiled: June 21, 2010Publication date: December 22, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kangguo Cheng, Bruce B. Doris, Balasubramanian S. Haran, Ali Khakifirooz, Ghavam G. Shahidi
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Publication number: 20110278563Abstract: A thin film transistor array substrate includes a substrate, a gate layer, a gate insulating layer, a source/drain layer, a patterned protective layer, an oxide semiconductor layer, a resin layer and a pixel electrode. The gate layer is disposed on the substrate. The gate insulating layer is disposed on the gate layer and the substrate. The source/drain layer is disposed on the gate insulating layer. The patterned protective layer is disposed on the source/drain layer and exposes a portion of the source/drain layer. The oxide semiconductor layer is disposed on the patterned protective layer and electrically connected to the source/drain layer. The resin layer is disposed on the oxide semiconductor layer and covers the oxide semiconductor layer. The pixel electrode is disposed on the resin layer and connects to the source/drain layer. The present invention also provides a method for making the thin film transistor array substrate. The thin film transistor array substrate can prevent leakage current.Type: ApplicationFiled: July 16, 2010Publication date: November 17, 2011Applicant: E Ink Holdings Inc.Inventors: SUNG-HUI HUANG, Wei-Chou Lan, Ted-Hong Shinn
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Publication number: 20110281394Abstract: The method for manufacturing the semiconductor device is as follows: forming a gate electrode; forming a first insulating film over the gate electrode; performing halogen doping treatment on the first insulating film so that the first insulating film is supplied with a halogen atom; forming an oxide semiconductor film over the first insulating film so as to overlap with the gate electrode; performing heat treatment on the oxide semiconductor film so that a hydrogen atom is removed in the oxide semiconductor film; performing oxygen doping treatment on the oxide semiconductor film from which the hydrogen atom is removed so that the oxide semiconductor film is supplied with an oxygen atom; performing heat treatment on the oxide semiconductor film to which the oxygen atom is supplied; forming a source electrode and a drain electrode on and in contact with the oxide semiconductor film; forming a second insulating film.Type: ApplicationFiled: May 10, 2011Publication date: November 17, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Shunpei Yamazaki
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Publication number: 20110266674Abstract: The present disclosure provides methods for forming semiconductor devices with laser-etched vias and apparatus including the same. In one embodiment, a method of fabricating a semiconductor device includes providing a substrate having a frontside and a backside, and providing a layer above the frontside of the substrate, the layer having a different composition from the substrate. The method further includes controlling a laser power and a laser pulse number to laser etch an opening through the layer and at least a portion of the frontside of the substrate, filling the opening with a conductive material to form a via, removing a portion of the backside of the substrate to expose the via, and electrically coupling a first element to a second element with the via. A semiconductor device fabricated by such a method is also disclosed.Type: ApplicationFiled: April 28, 2010Publication date: November 3, 2011Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hsing-Kuo Hsia, Chih-Kuang Yu, Ching-Hua Chiu, Troy Wu
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Publication number: 20110260299Abstract: A semiconductor printed circuit board assembly (PCBA) and method for making same for use in electronic packages having a core layer of copper-invar-copper (CIC) with a layer of dielectric substrate placed on the core layer. A second layer of dielectric substrate is placed on the lower surface of the core layer of CIC. The layers are laminated together. Blind vias are laser drilled into the layers of dielectric substrate. The partially completed PCBA is subjected to a reactive ion etch (RIE) plasma as a first step to clean blind vias in the PCBA. After the plasma etch, an acidic etchant liquid solution is used on the blind vias. Pre-plating cleaning of blind vias removes a majority of oxides from the blind vias. Seed copper layers are then applied to the PCBA, followed by a layer of copper plating that can be etched to meet the requirements of the PCBA.Type: ApplicationFiled: April 22, 2010Publication date: October 27, 2011Applicant: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.Inventors: Robert D. Edwards, Frank D. Egitto, Luis J. Matienzo, Susan Pitely, Daniel C. Van Hart
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Publication number: 20110254139Abstract: An improved metal interconnect is formed with reduced metal voids and dendrites. An embodiment includes forming a mask layer on a dielectric layer, forming openings in the mask and dielectric layers, depositing a planarization layer over the mask layer and filling the openings, planarizing to remove the mask layer, removing the planarization layer from the openings, and filling the openings with metal. The planarization step prior to depositing the metal removes the etch undercut that occurs during formation of the openings and reduces the aspect ratio in the openings, thereby improving metal fill uniformity.Type: ApplicationFiled: April 20, 2010Publication date: October 20, 2011Applicant: GLOBALFOUNDRIES Inc.Inventors: Jihong Choi, Tibor Bolom