Abstract: The present invention provides a semiconductor substrate, which comprises a singlecrystalline Si substrate which includes an active layer having a channel region, a source region, and a drain region, the singlecrystalline Si substrate including at least a part of a device structure not containing a well-structure or a channel stop region; a gate insulating film formed on the singlecrystalline Si substrate; a gate electrode formed on the gate insulating film; a LOCOS oxide film whose thickness is more than a thickness of the gate insulating film, the LOCOS oxide film being formed on the singlecrystalline Si substrate by surrounding the active layer; and an insulating film formed over the gate electrode and the LOCOS oxide film.

Abstract: A method for fabricating a semiconductor element on a semiconductor substrate having a support substrate and a semiconductor layer above the support substrate. The method includes preparing the semiconductor substrate having a transistor formation region and an element isolation region both defined thereon; forming a pad oxide film on the semiconductor layer of the semiconductor substrate; forming an oxidation-resistant mask layer on the pad oxide film; forming a resist mask to cover the transistor formation region on the oxidation-resistant mask layer; performing a first etching process for etching the oxidation-resistant mask layer using the resist mask as a mask to expose the pad oxide film of the element isolation region; and removing the resist mask and oxidizing the semiconductor layer below the exposed pad oxide film by LOCOS using the exposed oxidation-resistant mask layer as a mask to form an element isolation layer.

Abstract: An efficient method for the thermal oxidation of preferably silicon semiconductor wafers using LOCOS (local oxidation of silicon) processes is described. The mechanical stresses of the wafers are to be reduced. To this end, an oxidation method is proposed that comprises providing a substrate (1) having a front side (12) to be patterned and a rear side (13). The substrate is oxidized in two steps. In a first step the rear side (13) is covered by a layer (4) that inhibits or hampers the oxidation. During a second step of the oxidation the oxidation-hampering layer (4) is no longer present. During both steps an oxide thickness is obtained on the front side (12) that is greater than an oxide thickness obtained on the rear side (13).

Abstract: In a semiconductor substrate, a shallow trench isolation structure having a dielectric material disposed in voids of a trench-fill material and a method for forming the shallow trench isolation structure. The voids may be formed during a wet clean process after the dielectric material is formed in the trench. A conformal silicon nitride layer is formed over the substrate and in the voids. After removal of the silicon nitride layer, the voids are at least partially filled by the silicon nitride material.

Abstract: A method of dual bird's beak LOCOS may reduce a design rule for a more cost-effective logic device formation. The method may also form a LOCOS layer having a smooth bird's beak to fabricate a stable high-voltage device. The method includes steps of defining a low-voltage device area for a logic device and a high-voltage device area for a high-voltage device, forming a first pad layer in the low-voltage device area and a second pad layer in the high-voltage device area, the first pad layer being thinner than the second pad layer, and forming LOCOS type device isolation layers having bird's beaks differing in size in each of the low-voltage device area and the high-voltage device area, by oxidizing a portion of the semiconductor substrate exposed by a hard mask.

Abstract: A method of fabricating an extended drain MOS transistor which reduces a design rule and prevents the generation of leakage current. The method includes sequentially forming a diffusion film, a first conductive epitaxial layer, a gate oxide layer and a hard mask layer over a semiconductor substrate, forming a first hard mask pattern having a first thickness by performing a first etching process on the hard mask layer, forming a second hard mask pattern having a second thickness by performing a second etching process on the first hard mask layer, and then forming a thin gate oxide layer by performing a third etching process on the gate oxide layer using the second hard mask pattern as a mask.

Abstract: A semiconductor integrated circuit device and a method of manufacturing the same. The surface of a substrate of an active region surrounded by an element isolation trench is horizontally flat in the center portion of the active region but falls toward the side wall of the element isolation trench in the shoulder portion of the active region. This inclined surface contains two inclined surfaces having different inclination angles. The first inclined surface near the center portion of the active region is relatively steep and the second inclined surface near the side wall of the element isolation trench is gentler than the first inclined surface. The surface of the substrate in the shoulder portion of the active region is wholly rounded and has no angular portion.

Abstract: A method for manufacturing a semiconductor device includes subjecting a semiconductor substrate to thermal treatment at a temperature ranging from 770 to 830° C. to fix channel ions then forming a HTO film. The method thereby prevents a threshold voltage of a gate from changing due to diffusion of channel ions.

Abstract: Structures and methods for precision trench formation are disclosed. In one embodiment, a method for manufacturing a semiconductor device comprises forming a first oxygen-containing region in a semiconductor substrate by performing an oxygen ion implantation to a portion of the semiconductor substrate, and oxidizing the first oxygen-containing region using oxygen contained therein by performing a thermal processing to the semiconductor substrate, where the first oxygen-containing region is converted to a first oxide region. The method further comprises forming a groove in the semiconductor substrate by eliminating the first oxide region, where the performing thermal processing comprises subjecting the first oxygen-containing region to a gas low on oxygen.

Abstract: The aim of the invention is to integrate low-voltage logic elements and high-voltage power elements in one and the same silicon circuit. Said aim is achieved by dielectrically chip regions having different potentials from each other with the aid of isolation trenches (10). In order to prevent voltage rises at sharp edges on the bottom of the isolation trenches, said edges are rounded in a simple process, part of the insulating layer (2) being isotropically etched.

Abstract: A process of manufacturing a semiconductor device utilizing a thermo-chemical reaction is started based on preset initial settings, a state function of an atmosphere associated with the thermo-chemical reaction is measured, a state of the atmosphere and a change thereof are analyzed based on measurement data obtained by the measurement, and then, analysis data obtained by the analysis is fed back to a manufacturing process.

Abstract: A method of manufacturing a semiconductor device comprises the following steps: a step of depositing a silicon oxide film on the top surface of an epitaxial layer of the region where a high withstand voltage MOS transistor is formed; a step of subsequently depositing a silicon oxide film on the top surface of the epitaxial layer according to the thickness of a gate oxide film of a low withstand voltage MOS transistor; and a step of subsequently adjusting the thickness of the silicon oxide film on the top surface of the high withstand voltage MOS transistor by etching and forming a P-type diffusion layer by ion-implantation method. This method can manufacture elements having gate oxide films different in thickness at low cost.

Abstract: A method for forming a field oxide is disclosed. In one embodiment, the method comprises providing a semiconductor structure having a substrate, a pad oxide, and a patterned barrier layer, performing a dry oxidation process to form a first field oxide on the substrate in a region not covered with the barrier layer by introducing pure dry oxygen, and performing a wet oxidation process to form a second field oxide adjacent the first field oxide by introducing hydrogen and oxygen. The method of the present invention can improve the quality and electrical property of the semiconductor device, increase the yield, and reduce the cost.

Abstract: A method of fabricating a semiconductor device having a silicon layer disposed on an insulating film. Oxygen ions are implanted into selected parts of the silicon layer, which are then oxidized to form isolation regions dividing the silicon layer into a plurality of mutually isolated active regions. As the oxidation process does not create steep vertical discontinuities, fine patterns can be formed easily on the combined surface of the active and isolation regions. The implanted oxygen ions cause oxidation to proceed quickly, finishing before a pronounced bird's beak is formed. The isolation regions themselves can therefore be narrow and finely patterned.