Abstract: A nonvolatile memory cell includes a semiconductor layer including a first recess and a second recess. A first gate insulation layer is disposed on a bottom surface and side surfaces of the first recess. A second gate insulation layer is disposed on a bottom surface and side surfaces of the second recess. A variable resistive material layer is disposed on a first region of the semiconductor layer disposed between the first and second recesses. An insulation barrier layer disposed on a top surface and side surfaces of the variable resistive material layer. A gate electrode surrounding the insulation barrier layer and extending to fill the first and second recesses.

Abstract: An integrated circuit includes a first electrode, a second electrode, and a damascene structured memory element coupled to the first electrode and the second electrode. The memory element has a height and a width. The height is greater than or equal to the width. The memory element includes resistance changing material doped with dielectric material.

Abstract: A semiconductor device includes a substrate, a semiconductor region provided in the substrate, a group of transistors including a plurality of MIS transistors and provided in the semiconductor region, the MIS transistors including a plurality of gate electrodes which extend in a first direction and are provided on the semiconductor region via gate insulation films, an insulation film provided on the group of transistors, and a first contact layer and a second contact layer extending in the first direction and provided on the semiconductor region at opposite sides of the group of transistors.

Abstract: A semiconductor device includes a substrate, a semiconductor region provided in the substrate, a group of transistors including a plurality of MIS transistors and provided in the semiconductor region, the MIS transistors including a plurality of gate electrodes which extend in a first direction and are provided on the semiconductor region via gate insulation films, an insulation film provided on the group of transistors, and a first contact layer and a second contact layer extending in the first direction and provided on the semiconductor region at opposite sides of the group of transistors.