Abstract: A housing made from a circuit laminate includes first and second layers coupled together. Each includes a rigid, electrically insulating non-planar structural layer, flexible conductive traces disposed on surfaces of the structural layer, and flexible connector layers contacting to the flexible conductive traces. The housing may be formed from the circuit laminate using thermoforming or another process that co-molds the first and second layers. The structural layers stiffen the housing and/or form an environmental or other barrier so that the housing protects an internal component.

Abstract: A circuitry for differential amplifying, logical inversion, NAND and/or NOR operations is provided, which includes at least one depletion mode transistor having JFET characteristics. A method for determining the properties of an electrochemical circuitry is provided, including at least one semi-finished transistor, by applying a solidified electrolyte to selected sets of electrochemically active transistor elements is also provided.