With At Least One Potential Barrier Or Surface Barrier (epo) Patents (Class 257/E27.128)
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Patent number: 11937031Abstract: A system includes a network of a plurality of sensing/control/identification devices distributed throughout a machine, each of the sensing/control/identification devices associated with at least one sub-system component of the machine and operable to communicate through a plurality of electromagnetic signals. Shielding surrounds at least one of the sensing/control/identification devices to contain the electromagnetic signals proximate to the at least one sub-system component. A communication path is integrally formed in a component of the machine to route a portion of the electromagnetic signals through the component and a remote processing unit operable to communicate with the network of the sensing/control/identification devices through the electromagnetic signals, wherein at least a portion of the sensing/control/identification devices comprise a wide band gap semiconductor device and wherein at least a portion of the sensing/control/identification devices comprise an on-chip antenna.Type: GrantFiled: July 9, 2021Date of Patent: March 19, 2024Assignee: RTX CORPORATIONInventors: Joseph V. Mantese, Kurt J. Sobanski
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Patent number: 11923471Abstract: An avalanche diode including a gain region and a readout structure including an n-type (p-type) region having electrically isolated segments each including implanted regions; a p-type (n-type) region; and a first electrode on each of the segments. The gain region includes a p-n junction buried between the n-type region and the p-type region: an n+-type region having a higher n-type dopant density than the n-type region; a p+-type region having a higher p-type dopant density than the p-type region; and the p-n junction between the n+-type region and the p+-type region. A bias between the first electrodes and a second electrode (ohmically contacting the p-type (n-type) region) reverse biases the p-n junction. Electrons generated in response to electromagnetic radiation or charged particles generate additional electrons m the gain region through impact ionization but the segmented region comprises a low field region isolating the gain region from the first electrodes.Type: GrantFiled: October 30, 2020Date of Patent: March 5, 2024Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Carolyn Gee, Simone Michele Mazza, Bruce A. Schumm, Yuzhan Zhao
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Patent number: 11923900Abstract: An Optical Wireless Communication (OWC) receiver configured to receive an incoming optical beam modulated with data and output an output signal including the modulated data. A lens receives the incoming optical beam. Photodiodes positioned at a distance from the lens and proximal to the focal plane of the lens receive a fraction of the incoming optical beam and generate a photocurrent in correspondence with photons received. The photodiodes are provided in a two-dimensional array including rows and columns wherein outputs of the columns are combined and their photocurrents are summed. An amplifier connected to the combined output of the columns converts the summed photocurrents into an output signal. Interconnections of the photodiodes form at least two parallel branches wherein each branch includes a cascade of at least two photodiodes forming a combined photodetector surface.Type: GrantFiled: October 30, 2020Date of Patent: March 5, 2024Assignee: TECHNISCHE UNIVERSITEIT EINDHOVENInventor: Antonius Marcellus Jozef Koonen
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Patent number: 11923846Abstract: A ternary logic circuit includes: a first inverter unit; a second inverter unit arranged in parallel with the first inverter unit; a first junction unit arranged between the first inverter unit and an output terminal and including a tunnel PN junction; and a second junction unit arranged between the second inverter unit and the output terminal and including a tunnel PN junction, wherein, when an absolute value of an input voltage applied to an input terminal is less than a first input voltage, the output terminal outputs a first output voltage, and when the absolute value of the input voltage is greater than the first input voltage and less than a second input voltage, the output terminal outputs a second output voltage, and when the absolute value of the input terminal is greater than the second input voltage, the output terminal outputs a third output voltage.Type: GrantFiled: February 16, 2022Date of Patent: March 5, 2024Assignee: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Jae Won Jeong, Youngeun Choi, Wooseok Kim, Jae Hyeon Jun
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Patent number: 11881498Abstract: Techniques for realizing compound semiconductor (CS) optoelectronic devices on silicon (Si) substrates are disclosed. The integration platform is based on heteroepitaxy of CS materials and device structures on Si by direct heteroepitaxy on planar Si substrates or by selective area heteroepitaxy on dielectric patterned Si substrates. Following deposition of the CS device structures, device fabrication steps can be carried out using Si complimentary metal-oxide semiconductor (CMOS) fabrication techniques to enable large-volume manufacturing. The integration platform can enable manufacturing of optoelectronic devices including photodetector arrays for image sensors and vertical cavity surface emitting laser arrays.Type: GrantFiled: June 23, 2021Date of Patent: January 23, 2024Assignee: Aeluma, Inc.Inventor: Jonathan Klamkin
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Patent number: 11880678Abstract: A chip includes a power pin, a ground pin, a plurality of input/output (I/O) pins, a readable/writable memory, a switching circuit, and a control circuit. The I/O pins include a plurality of mapping pins and a control pin. The readable/writable memory includes a clock port, a plurality of I/O ports, and an enable port. The control circuit selectively activates or does not activate the switching circuit according to the control pin. When the switching circuit is activated, the switching circuit electrically couples the clock port, the I/O ports, and the enable port to the mapping pins respectively.Type: GrantFiled: December 10, 2020Date of Patent: January 23, 2024Assignee: REALTEK SEMICONDUCTOR CORP.Inventors: Neng-Hsien Lin, Wan-Pei Geng, Yao Feng, Chen Shen
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Patent number: 11872017Abstract: A detecting device includes a flexible substrate, a first light-emitting unit provided at the flexible substrate and configured to emit light toward a living body, and a first light-receiving unit provided at the flexible substrate and configured to receive light, based on the light exiting from the first light-emitting unit, from the living body. The first light-emitting unit is constituted by a flexible organic light-emitting diode, and the first light-receiving unit is constituted by a flexible organic photodetector.Type: GrantFiled: February 23, 2023Date of Patent: January 16, 2024Assignee: SEIKO EPSON CORPORATIONInventors: Takashi Tajiri, Takefumi Fukagawa
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Patent number: 11837619Abstract: A semiconductor arrangement includes a photodiode extending to a first depth from a first side in a substrate. An isolation structure laterally surrounds the photodiode and includes a first well that extends into a first side of the substrate. A deep trench isolation extends into a second side of the substrate and at least a portion of the deep trench isolation underlies the first well.Type: GrantFiled: August 27, 2021Date of Patent: December 5, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITEDInventors: Feng-Chien Hsieh, Yun-Wei Cheng, Kuo-Cheng Lee, Cheng-Ming Wu
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Patent number: 11749773Abstract: An embodiment avalanche photodiode includes a substrate, an n-type contact layer, a buffer layer, a multiplication layer, a field-control layer, an absorption layer, and a p-type contact layer. A conductive layer is formed in a central part of the buffer layer. The substrate is constituted of a semiconductor with a higher thermal conductivity than InP such as SiC, and the n-type contact layer is constituted of a same semiconductor as the substrate and is made n-type.Type: GrantFiled: December 4, 2019Date of Patent: September 5, 2023Assignee: Nippon Telegraph and Telephone CorporationInventors: Yuki Yamada, Fumito Nakajima
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Patent number: 11728322Abstract: A monolithic sensor for detecting infrared and visible light according to an example includes a semiconductor substrate and a semiconductor layer coupled to the semiconductor substrate. The semiconductor layer includes a device surface opposite the semiconductor substrate. A visible light photodiode is formed at the device surface. An infrared photodiode is also formed at the device surface and in proximity to the visible light photodiode. A textured region is coupled to the infrared photodiode and positioned to interact with electromagnetic radiation.Type: GrantFiled: February 25, 2022Date of Patent: August 15, 2023Assignee: SIONYX, LLCInventors: Jutao Jiang, Jeffrey McKee, Martin U. Pralle
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Patent number: 11717178Abstract: A measurement sensor package and a measurement sensor reduce susceptibility to noise and enable highly accurate measurement. A measurement sensor package includes a substrate. The substrate includes a first recess including a first bottom surface on which a light emitter is mountable, and a first step surface having a first connection pad thereon, a second recess including a second bottom surface on which a light receiver is mountable, and a second step surface having a second connection pad thereon. In a direction connecting a center of the first bottom surface and a center of the second bottom surface in a plan view, the first step surface is located outward from the first bottom surface and the second step surface is located outward from the second bottom surface.Type: GrantFiled: November 10, 2016Date of Patent: August 8, 2023Assignee: KYOCERA CorporationInventors: Yasushi Oode, Hiroki Ito, Yoshimasa Sugimoto, Noritaka Niino, Shogo Matsunaga, Takuya Hayashi
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Patent number: 11715739Abstract: An embodiment provides a manufacturing method of a polycrystalline silicon layer, including: forming a first amorphous silicon layer on a substrate; doping an N-type impurity into the first amorphous silicon layer; forming a second amorphous silicon layer on the n-doped first amorphous silicon layer; doping a P-type impurity into the second amorphous silicon layer; and crystalizing the n-doped first amorphous silicon layer and the p-doped second amorphous silicon layer by irradiating a laser beam onto n-doped first amorphous silicon layer and the p-doped second amorphous silicon layer to form a polycrystalline silicon layer.Type: GrantFiled: June 4, 2021Date of Patent: August 1, 2023Assignee: Samsung Display Co., Ltd.Inventors: Jong Oh Seo, Jong Jun Baek
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Patent number: 11669242Abstract: A screenshot method includes displaying, by a terminal, a first interface including N areas, receiving, by the terminal, a first operation of a user, displaying, by the terminal, a second interface in response to the first operation, where the second interface includes N controls that are in a one-to-one correspondence with the N areas, and each of the N controls is used to select or deselect content of a corresponding area, receiving, by the terminal, a second operation on the N controls, determining, by the terminal, a selected area in the N areas in response to the second operation, receiving, by the terminal, a third operation, and generating, by the terminal, a first picture in response to the third operation, where the first picture includes content of the selected area in the N areas.Type: GrantFiled: April 28, 2020Date of Patent: June 6, 2023Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventor: Liudong Xiong
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Patent number: 11662462Abstract: The present disclosure provides a proximity sensor. The proximity sensor includes: a substrate including a main surface; a light emitter and a light receiver disposed on the main surface; a resin disposed on the main surface, enclosing the light emitter and the light receiver, and including a boundary surface spaced apart from the main surface; a first crosstalk alleviator disposed on the boundary surface and including a first inclined surface; and a second crosstalk alleviator disposed on the boundary surface and including a second inclined surface.Type: GrantFiled: February 6, 2020Date of Patent: May 30, 2023Assignee: Rohm Co., Ltd.Inventor: Yoshitsugu Uedaira
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Patent number: 11664470Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a photodiode with an integrated, light focusing elements and methods of manufacture. The structure includes: a trench photodiode comprising a domed structure; and a doped material on the domed structure, the doped material having a concave underside surface.Type: GrantFiled: July 13, 2022Date of Patent: May 30, 2023Assignee: GLOBALFOUNDRIES U.S. Inc.Inventors: Rajendran Krishnasamy, Steven M. Shank, John J. Ellis-Monaghan, Ramsey Hazbun
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Patent number: 11616093Abstract: A first light receiving element according to an embodiment of the present disclosure includes a plurality of pixels, a photoelectric converter that is provided as a layer common to the plurality of pixels, and contains a compound semiconductor material, and a first electrode layer that is provided between the plurality of pixels on light incident surface side of the photoelectric converter, and has a light-shielding property.Type: GrantFiled: December 12, 2018Date of Patent: March 28, 2023Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Shuji Manda, Ryosuke Matsumoto, Suguru Saito, Shigehiro Ikehara, Tetsuji Yamaguchi, Shunsuke Maruyama
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Patent number: 11575055Abstract: According to the present disclosure, techniques related to manufacturing and applications of power photodiode structures and devices based on group-III metal nitride and gallium-based substrates are provided. More specifically, embodiments of the disclosure include techniques for fabricating photodiode devices comprising one or more of GaN, AlN, InN, InGaN, AlGaN, and AlInGaN, structures and devices. Such structures or devices can be used for a variety of applications including optoelectronic devices, photodiodes, power-over-fiber receivers, and others.Type: GrantFiled: January 15, 2021Date of Patent: February 7, 2023Inventors: Drew W. Cardwell, Mark P. D'Evelyn
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Patent number: 11508866Abstract: A photoelectric conversion element for detecting the spot size of incident light. The photoelectric conversion element includes a photoelectric conversion substrate having two principal surfaces, and comprises a first sensitive part and a second sensitive part that have mutually different photoelectric conversion characteristics. When a sensitive region appearing in the principal surface of the first sensitive part is defined as a first sensitive region, and a sensitive region appearing in the principal surface of the second sensitive part is defined as a second sensitive region, the first sensitive region is configured to receive at least a portion of light incident on a light-receiving surface and to decrease, proportionally to enlargement in an irradiation region of the principal surface irradiated with the incident light, the ratio of the first sensitive region to the second sensitive region in the irradiation region.Type: GrantFiled: February 7, 2020Date of Patent: November 22, 2022Assignee: KANEKA CORPORATIONInventors: Kunta Yoshikawa, Takashi KuchIyama
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Patent number: 11508870Abstract: The invention relates to a process for fabricating at least tensilely strained planar photodiode 1, comprising producing a stack formed from a semiconductor layer 53, 55 made of a first material and from an antireflection layer 20; producing a peripheral trench 30 that opens onto a seed sublayer 22 made of a second material of the antireflection layer 20; epitaxy of a peripheral section 31 made of the second material in the peripheral trench 30; and returning to room temperature, a detecting section 10 then being tensilely strained because of the difference in coefficients of thermal expansion between the two materials.Type: GrantFiled: October 8, 2020Date of Patent: November 22, 2022Assignee: Commissariat a l'Energie Atomique et aux Energies AlternativesInventors: Abdelkader Aliane, Jean-Louis Ouvrier-Buffet
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Patent number: 11500206Abstract: An example waveguide can include a polymer layer having substantially optically transparent material with first and second major surfaces configured such that light containing image information can propagate through the polymer layer being guided therein by reflecting from the first and second major surfaces via total internal reflection. The first surface can include first smaller and second larger surface portions monolithically integrated with the polymer layer and with each other. The first smaller surface portion can include at least a part of an in-coupling optical element configured to couple light incident on the in-coupling optical element into the polymer layer for propagation therethrough by reflection from the second major surface and the second larger surface portion of the first major surface.Type: GrantFiled: April 1, 2019Date of Patent: November 15, 2022Assignee: Magic Leap, Inc.Inventors: Christophe Peroz, Victor Kai Liu, Samarth Bhargava
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Patent number: 11428646Abstract: Optical fabrication monitor structures can be included in a design fabricated on a wafer from a mask or fabrication reticle. A first set of components can be formed in an initial fabrication cycle, where the first set includes functional components and monitor structures. A second set of components can be formed by subsequent fabrication processes that can potentially cause errors or damage to the first set of components. The monitor structures can be implemented during fabrication (e.g., in a cleanroom) to detect fabrication errors without pulling or scrapping the wafer.Type: GrantFiled: August 28, 2020Date of Patent: August 30, 2022Assignee: OpenLight Photonics, Inc.Inventors: Erik Johan Norberg, Rui Liang, Benjamin M. Curtin, Jared Bauters
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Patent number: 10670456Abstract: An integrated circuit includes a substrate and at least one photo-voltaic cell implemented on the substrate. The at least one photo-voltaic cell is configured to generate a supply voltage. Circuitry is implemented on the substrate. The circuitry is powered by the supply voltage. The at least one photo-voltaic cell can include a number of series-connected photo-voltaic cells.Type: GrantFiled: August 31, 2017Date of Patent: June 2, 2020Assignee: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITEDInventors: Jeffrey M. Raynor, Laurence Stark, Filip Kaklin
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Patent number: 10630392Abstract: According to one embodiment, a quantum communication system includes a transmitting apparatus and a receiving apparatus. The transmitting apparatus includes a plurality of light sources configured to generate a plurality of optical pulses having different wavelengths, an encoder including a single first modulator configured to modulate the optical pulses to encode information, and a transmitting part configured to transmit an optical pulse train including the modulated optical pulses to the receiving apparatus. The receiving apparatus includes a receiving part configured to receive the optical pulse train from the transmitting apparatus, and a decoder configured to obtain information based on the received optical pulse train.Type: GrantFiled: March 15, 2019Date of Patent: April 21, 2020Assignees: KABUSHIKI KAISHA TOSHIBA, Toshiba Infrastructure Systems & Solutions CorporationInventors: Masakazu Kikawada, Masatoshi Hirono
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Patent number: 10605985Abstract: An optoelectronic device includes an integrated circuit including electronic devices formed on a front side of a semiconductor substrate. A barrier layer is formed on a back side of the semiconductor substrate. A photonics layer is formed on the barrier layer. The photonics layer includes a core for transmission of light and a cladding layer encapsulating the core and including a different index of refraction than the core. The core is configured to couple light generated from a component of the optoelectronic device.Type: GrantFiled: March 26, 2018Date of Patent: March 31, 2020Assignee: International Business Machines CorporationInventors: Russell A. Budd, Effendi Leobandung, Ning Li, Jean-Olivier Plouchart, Devendra K. Sadana
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Patent number: 10168044Abstract: A self-contained smoke alarm detector, emergency light and alternate light source mechanism in one unit.Type: GrantFiled: February 27, 2015Date of Patent: January 1, 2019Inventor: Marcia Lawson
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Patent number: 9997414Abstract: Techniques are disclosed for forming Ge/SiGe-channel and III-V-channel transistors on the same die. The techniques include depositing a pseudo-substrate of Ge/SiGe or III-V material on a Si or insulator substrate. The pseudo-substrate can then be patterned into fins and a subset of the fins can be replaced by the other of Ge/SiGe or III-V material. The Ge/SiGe fins can be used for p-MOS transistors and the III-V material fins can be used for n-MOS transistors, and both sets of fins can be used for CMOS devices, for example. In some instances, only the channel region of the subset of fins are replaced during, for example, a replacement gate process. In some instances, some or all of the fins may be formed into or replaced by one or more nanowires or nanoribbons.Type: GrantFiled: June 24, 2014Date of Patent: June 12, 2018Assignee: INTEL CORPORATIONInventors: Glenn A. Glass, Anand S. Murthy, Karthik Jambunathan
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Patent number: 9917418Abstract: Monolithic, wavelength-tunable QCL devices are provided which comprise a substrate, an array of QCLs formed on the substrate and an optical beam combiner formed on the substrate electrically isolated from the array of QCLs. In embodiments, the QCL devices are configured to provide laser emission in the range of from about 3 ?m to about 12 ?m, a wavelength tuning range of at least about 500 cm?1, and a wavelength tuning step size of about 1.0 nm or less.Type: GrantFiled: October 31, 2016Date of Patent: March 13, 2018Assignee: Northwestern UniversityInventor: Manijeh Razeghi
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Patent number: 9864136Abstract: Disclosed are non-planar monolithic hybrid optoelectronic structures. These structures are referred to as non-planar because they contain one or more semiconductor fins. These structures are referred to as monolithic because they contain, within each semiconductor fin, an optical waveguide core positioned laterally between a light sensor and a photodetector. Specifically, each semiconductor fin has end portions and a center portion positioned laterally between the end portions. The center portion is an optical waveguide core and the end portions have trenches that contain the light source and photodetector, respectively. These structures are referred to as hybrid because the optical waveguide core is made of one semiconductor material and the light sensor and photodetector are each made of at least one additional semiconductor material that is different from the semiconductor material of the center portion. Also disclosed herein are methods of forming monolithic non-planar hybrid optoelectronic structures.Type: GrantFiled: August 9, 2016Date of Patent: January 9, 2018Assignee: GLOBALFOUNDRIES Inc.Inventor: Ajey P. Jacob
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Patent number: 9804330Abstract: According to the present invention, a semiconductor device includes a substrate comprising a front end face, a rear end face and side faces, a plurality of semiconductor lasers provided on the substrate, a forward optical multiplexer to multiplex forward output light of the plurality of semiconductor lasers and output the multiplexed light to the front end face, a backward optical multiplexer to multiplex backward output light of the plurality of semiconductor lasers and output the multiplexed light to the rear end face and a plurality of backward waveguides connected to an output section of the backward optical multiplexer, wherein the plurality of backward waveguides includes a main waveguide disposed at a center of the output section and a plurality of lateral waveguides disposed on both sides of the main waveguide to bend toward the side faces and output light from the side faces diagonally to the side faces.Type: GrantFiled: January 9, 2017Date of Patent: October 31, 2017Assignee: Mitsubishi Electric CorporationInventors: Ryosuke Nagao, Yoshifumi Sasahata, Eitaro Ishimura
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Patent number: 9690042Abstract: Disclosed are an optical input/output device and an opto-electronic system including the same. The device includes a bulk silicon substrate, at least one vertical-input light detection element monolithically integrated on a portion of the bulk silicon substrate, and at least one vertical-output light source element monolithically integrated on another portion of the bulk silicon substrate adjacent to the vertical-input light detection element. The vertical-output light source element includes a III-V compound semiconductor light source active layer combined with the bulk silicon substrate by a wafer bonding method.Type: GrantFiled: October 24, 2013Date of Patent: June 27, 2017Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Gyungock Kim, Hyundai Park, In Gyoo Kim, Sang Hoon Kim, Ki Seok Jang, Sang Gi Kim, Jiho Joo, Yongseok Choi, Hyuk Je Kwon, Jaegyu Park, Sun Ae Kim, Jin Hyuk Oh, Myung Joon Kwack
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Patent number: 9632741Abstract: The wireless electronic retail price tag system is a display system for retail shelves. The wireless electronic retail price tag system is a wireless electronic display that attaches readily on shelves and that is used for displaying product, price, and marketing information items on the shelves. The wireless electronic retail price tag system is adapted to communicate with and to be updated by a master computer located in a secure location. The wireless electronic retail price tag system comprises an LCD, a microcontroller, a remote wireless interface, and a housing.Type: GrantFiled: March 30, 2015Date of Patent: April 25, 2017Inventor: Gerardo Alvarez
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Patent number: 9601906Abstract: A first arm portion and a second arm portion are provided so as to have a distance therebetween greater than a distance between input ends of two output waveguides and greater than a distance between an output end of a first output portion and an output end of a second output portion, the first arm portion forming a traveling path of light from one of the two output waveguides to the first output portion through a first optical amplifier, the second arm portion forming a traveling path of light from another one of the two output waveguides to the second output portion through a second optical amplifier. The first optical amplifier and the second optical amplifier have curved portions in which the first output portion and the second output portion are curved in a direction toward each other, and the first optical amplifier and the second optical amplifier respectively output light from the output end of the first output portion and the output end of the second output portion.Type: GrantFiled: February 3, 2016Date of Patent: March 21, 2017Assignee: Mitsubishi Electric CorporationInventors: Masakazu Takabayashi, Yuichiro Horiguchi, Mitsunobu Gotoda, Eitaro Ishimura
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Patent number: 9443423Abstract: An information communication method for use in a portable terminal, e.g., a wristwatch, to obtain information includes a light receiving step of, by at least one of plural solar cells incorporated in the portable terminal and having respective directivities, receiving visible light that is emitted in a direction corresponding to the directivity of the relevant solar cell, and an information acquisition step of obtaining information by demodulating a signal that is specified by the received visible light.Type: GrantFiled: December 26, 2014Date of Patent: September 13, 2016Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICAInventors: Hideki Aoyama, Mitsuaki Oshima
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Patent number: 9431629Abstract: Provided is an organic light-emitting display apparatus including: a substrate having one or more side walls; a display unit positioned on the substrate; and an encapsulation layer deposited over the display unit and contacting each of the one or more side walls, wherein a height of an outer end portion of the encapsulation layer is less than that of each of the side walls.Type: GrantFiled: April 1, 2014Date of Patent: August 30, 2016Assignee: SAMSUNG DISPLAY CO., LTD.Inventor: Seung-Jun Moon
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Patent number: 8928893Abstract: The internal propagation of radiation between a radiation source and radiation detector mounted within a sensor package is prevented by the use of an optical isolator. The optical isolator is formed by the combination of a baffle mounted between the source and detector and a groove formed in an upper surface of the sensor package between the source and detector. A bottom of the groove is positioned adjacent to an upper edge of the baffle.Type: GrantFiled: September 23, 2011Date of Patent: January 6, 2015Assignees: STMicroelectronics (Research & Development) Limited, STMicroelectronics (Grenoble 2) SASInventors: Ewan Findlay, Colin Campbell, Gemma Ramsey, Eric Saugier
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Patent number: 8916917Abstract: According to one embodiment, a solid-state imaging device includes a first element formation region surrounded by an element isolation region in a semiconductor substrate having a first and a second surface, an upper element isolation layer on the first surface in the element formation region, a lower element isolation layer between the second surface and the upper element isolation layer, a first photodiode in the element formation region, a floating diffusion in the element formation region, and a first transistor disposed between the first photodiode and the floating diffusion. A side surface of the lower element isolation layer protrudes closer to the transistor than a side surface of the upper element isolation layer.Type: GrantFiled: February 3, 2012Date of Patent: December 23, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Shogo Furuya, Hirofumi Yamashita, Tetsuya Yamaguchi
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Patent number: 8878265Abstract: According to one embodiment, a solid-state imaging device includes a first element formation region surrounded by an element isolation region in a semiconductor substrate having a first and a second surface, an upper element isolation layer on the first surface in the element formation region, a lower element isolation layer between the second surface and the upper element isolation layer, a first photodiode in the element formation region, a floating diffusion in the element formation region, and a first transistor disposed between the first photodiode and the floating diffusion. A side surface of the lower element isolation layer protrudes closer to the transistor than a side surface of the upper element isolation layer.Type: GrantFiled: February 3, 2012Date of Patent: November 4, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Shogo Furuya, Hirofumi Yamashita, Tetsuya Yamaguchi
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Patent number: 8779544Abstract: A photoelectric conversion apparatus comprises multiple photoelectric conversion portions (51) disposed in a semiconductor substrate (5B) wherein each photoelectric conversion portion (51) includes: a P-type charge accumulating area (107) containing a first impurity; and an N-type well portion (102) that, along with the P-type charge accumulating area, configures a photodiode, and each well portion has: an N-type first semiconductor region (102a) containing arsenic at a first density; an N-type second semiconductor region (102b,102C) disposed below the first semiconductor region and containing arsenic at a second density that is lower than the first density; and an N-type third semiconductor region (102d) disposed below the second semiconductor region and containing a second impurity at a third density that is higher than the first density.Type: GrantFiled: January 26, 2010Date of Patent: July 15, 2014Assignee: Canon Kabushiki KaishaInventors: Yuichiro Yamashita, Takanori Watanabe, Mineo Shimotsusa, Takeshi Ichikawa
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Patent number: 8692295Abstract: A double heterojunction bipolar transistor on a substrate comprises a collector formed of InGaAsP, a base in contact with the collector, an emitter in contact with the base, and electrodes forming separate electrical contacts with each of the collector, base, and emitter, respectively. A device incorporates this transistor and an opto-electronic device optically coupled with the collector of the transistor to interact with light transmitted therethrough.Type: GrantFiled: September 25, 2009Date of Patent: April 8, 2014Assignee: HRL Laboratories, LLCInventors: Rajesh D. Rajavel, Stephen Thomas, III
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Publication number: 20130313668Abstract: A photronic device includes a substrate having an opening through the substrate. The photronic device further includes an insulating layer over the substrate including over the opening. The photronic device further includes an active layer over the insulating layer. The photronic device further includes a photoactive device formed in the active layer, wherein the photoactive device is over the opening. The photronic device further includes active electronic circuitry formed in the active layer. The photronic device further includes a reflective layer on the insulating layer in the opening.Type: ApplicationFiled: May 24, 2012Publication date: November 28, 2013Inventors: Gregory S. Spencer, John R. Alvis, Hsiao-Hui Chen, Joseph F. Orcutt, Srivatsa G. Kundalgurki
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Patent number: 8552414Abstract: An electronically scannable multiplexing device is capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing device generates an electronically scannable conducting channel with two oppositely formed depletion regions. The depletion width of each depletion region is controlled by a voltage applied to a respective control gate at each end of the multiplexing device. The present multi-bit addressing technique allows, for example, 10 to 100 bits of data to be accessed or addressed at a single node. The present invention can also be used to build a programmable nanoscale logic array or for randomly accessing a nanoscale sensor array.Type: GrantFiled: February 16, 2012Date of Patent: October 8, 2013Assignee: International Business Machines CorporationInventors: Hemantha Kumar Wickramasinghe, Kailash Gopalakrishnan
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Publication number: 20130228887Abstract: Methods and structures for providing single-color or multi-color photo-detectors leveraging plasmon resonance for performance benefits. In one example, a radiation detector includes a semiconductor absorber layer having a first electrical conductivity type and an energy bandgap responsive to radiation in a first spectral region, a semiconductor collector layer coupled to the absorber layer and having a second electrical conductivity type, and a plasmonic resonator coupled to the collector layer and having a periodic structure including a plurality of features arranged in a regularly repeating pattern.Type: ApplicationFiled: September 12, 2012Publication date: September 5, 2013Applicant: RAYTHEON COMPANYInventors: Justin Gordon Adams Wehner, Edward Peter Gordon Smith
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Publication number: 20130001731Abstract: A method of fabricating an optoelectronic device includes creating an optoelectronic structure on a first substrate. The optoelectronic structure includes a release layer and a plurality of inorganic semiconductor layers supported by the release layer. The plurality of inorganic semiconductor layers is configured to be active in operation of the optoelectronic device. The plurality of inorganic semiconductor layers are permanently attached to a second substrate, which is flexible. The plurality of inorganic semiconductor layers are released from the first substrate after the attaching step, and the second substrate is deformed to a non-planar configuration.Type: ApplicationFiled: June 28, 2012Publication date: January 3, 2013Applicant: THE REGENTS OF THE UNIVERSITY OF MICHIGANInventors: Stephen Forrest, Jeramy D. Zimmerman, Xin Xu, Christopher Kyle Renshaw
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Publication number: 20120228681Abstract: An image or light sensor chip package includes an image or light sensor chip having a non-photosensitive area and a photosensitive area surrounded by the non-photosensitive area. In the photosensitive area, there are light sensors, a layer of optical or color filter array over the light sensors and microlenses over the layer of optical or color filter array. In the non-photosensitive area, there are an adhesive polymer layer and multiple metal structures having a portion in the adhesive polymer layer. A transparent substrate is formed on a top surface of the adhesive polymer layer and over the microlenses. The image or light sensor chip package also includes wirebonded wires or a flexible substrate bonded with the metal structures of the image or light sensor chip.Type: ApplicationFiled: May 18, 2012Publication date: September 13, 2012Applicant: Megica CorporationInventors: Mou-Shiung Lin, Jin-Yuan Lee
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Publication number: 20120187517Abstract: In a photodetector 1, a low-resistance Si substrate 3, an insulating layer 4, a high-resistance Si substrate 5, and an Si photodiode 20 construct a hermetically sealed package for an InGaAs photodiode 30 placed within a recess 6, while an electric passage part 8 of the low-resistance Si substrate 3 and a wiring film 15 achieve electric wiring for the Si photodiode 20 and InGaAs photodiode 30. While a p-type region 22 of the Si photodiode 20 is disposed in a part on the rear face 21b side of an Si substrate 21, a p-type region 32 of the InGaAs photodiode 30 is disposed in a part on the front face 31a side of an InGaAs substrate 31.Type: ApplicationFiled: July 7, 2010Publication date: July 26, 2012Applicant: HAMAMATSU PHOTONICS K.K.Inventors: Yoshihisa Warashina, Masatoshi Ishihara, Tomofumi Suzuki
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Publication number: 20120168835Abstract: Optical structures having an array of protuberances between two layers having different refractive indices are provided. The array of protuberances has vertical and lateral dimensions less than the wavelength range of lights detectable by a photodiode of a CMOS image sensor. The array of protuberances provides high transmission of light with little reflection. The array of protuberances may be provided over a photodiode, in a back-end-of-line interconnect structure, over a lens for a photodiode, on a backside of a photodiode, or on a window of a chip package.Type: ApplicationFiled: March 13, 2012Publication date: July 5, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: James W. Adkisson, John J. Ellis-Monaghan, Jeffrey P. Gambino, Charles F. Musante
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Publication number: 20120085890Abstract: An object is to reduce the size and manufacturing cost of a photodetector. In order to reduce the area where a visible light sensor and an infrared light sensor are provided, a first photodiode that detects visible light and a second photodiode that detects infrared light are arranged to overlap with each other so that visible light is absorbed first by the first photodiode, whereby significantly little visible light enters the second photodiode. Further, the first photodiode overlapping with the second photodiode is used as an optical filter for the second photodiode. Therefore, a semiconductor layer included in the first photodiode absorbs visible light and transmits infrared light, and a semiconductor layer included in the second photodiode absorbs infrared light.Type: ApplicationFiled: October 5, 2011Publication date: April 12, 2012Inventor: Yoshiyuki Kurokawa
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Patent number: 8120078Abstract: A photodiode structure including a semiconductor of a first conductivity type, the semiconductor having a main surface, a first well formed in the semiconductor at the main surface thereof, the first well being of a second conductivity type opposite to the first conductivity type. A second well formed in the semiconductor at the main surface thereof laterally outside the first well, the second well being of the second conductivity type, and a first terminal electrically connecting the first well and the second well, and a second terminal connecting the semiconductor such that a depletion region of laterally varying distance to the main surface results from applying a reverse voltage to the first and second terminals.Type: GrantFiled: November 19, 2007Date of Patent: February 21, 2012Assignee: Infineon Technologies AGInventor: Stefan Hermann Groiss
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Publication number: 20110309459Abstract: The present disclosure uses at least two cascaded photodetectors. Device area is increased to provide a bigger current than a single photodetector under the same bandwidth. Hence, bandwidth efficiency (BRP) and saturation current-bandwidth product (SCBP) are improved for a high speed, a high responsivity and a high bandwidth with simple structure and low cost.Type: ApplicationFiled: December 1, 2010Publication date: December 22, 2011Applicant: NATIONAL CENTRAL UNIVERSITYInventors: Jin-Wei Shi, Feng-Ming Kuo
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Publication number: 20110233609Abstract: The invention relates to a method for producing an infrared radiation sensor, said sensor comprising an infrared photodiode array formed in a first material and a reading circuit formed in a second material, said method comprising the steps of: sticking, through molecular adhesion, a first material side surface onto an optically transparent crystalline material side surface having infrared radiation and a coefficient of thermal expansion similar to that of the second material, give or take 20%; thinning the body of the first material side surface so that the latter is less that 25 ?m; producing infrared-sensitive photodiodes onto the thus-thinned first material side surface; depositing contact ball bearings onto the infrared photodiodes; and mounting the reading circuit onto the first material side surface through flip chip technology.Type: ApplicationFiled: November 27, 2009Publication date: September 29, 2011Applicant: Sagem Defense SecuriteInventors: Arnaud Cordat, Herve Sik, Stéphane Demiguel