Quantum Box Or Quantum Dot Structures (epo) Patents (Class 257/E29.071)
  • Patent number: 11687473
    Abstract: An electronic component (10) is formed by a semiconductor component or a semiconductor-like structure having gate electrode assemblies (16, 18), for initializing the quantum mechanical state of a qubit.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: June 27, 2023
    Assignees: Rheinisch-Westfälische Technische Hochschule (RWTH) Aachen, Forschungszentrum Jülich GmbH
    Inventors: Matthias Künne, Hendrik Bluhm, Lars Schreiber
  • Patent number: 11613694
    Abstract: A quantum dot-polymer composite film includes: a plurality of quantum dots, wherein a quantum dot of the plurality of quantum dots includes an organic ligand on a surface of a the quantum dot; a cured product of a photopolymerizable monomer including a carbon-carbon unsaturated bond; and a residue including a residue of a high-boiling point solvent, a residue of a polyvalent metal compound, or a combination thereof.
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: March 28, 2023
    Assignees: SAMSUNG ELECTRONICS CO., LTD., SAMSUNG DISPLAY CO., LTD., SAMSUNG SDI CO., LTD.
    Inventors: Tae Gon Kim, Ha Il Kwon, Shin Ae Jun
  • Patent number: 9355764
    Abstract: A magnetoelectric composite device having a free (i.e. switchable) layer of ferromagnetic nanocrystals mechanically coupled a ferroelectric single crystal substrate is presented, wherein application of an electrical field on the composite switches the magnetic state of the switchable layer from a superparamagnetic state having no overall net magnetization to a substantially single-domain ferromagnetic state.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: May 31, 2016
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Sarah H. Tolbert, Gregory P. Carman, Scott Keller, Laura Schelhas, Hyungsuk Kim, Joshua Hockel
  • Patent number: 8994005
    Abstract: Devices (e.g., optoelectronic devices such as solar cells and infrared or THz photodetectors) with a nanomaterial having vertically correlated quantum dots with built-in charge (VC Q-BIC) and methods of making such devices. The VC Q-BIC material has two or more quantum dot layers, where the layers have quantum dots (individual quantum dots or quantum dot clusters) in a semiconductor material, and adjacent quantum dot layers are separated by a spacer layer of doped semiconductor material. The VC-QBIC nanomaterial provides long photocarrier lifetime, which improves the responsivity and sensitivity of detectors or conversion efficiency in solar cells as compared to previous comparable devices.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: March 31, 2015
    Assignee: The Research Foundation for The State University of New York
    Inventors: Vladimir Mitin, Andrei Sergeyev, Gottfried Strasser
  • Patent number: 8872264
    Abstract: A semiconductor device includes a first trench and a second trench extending into a semiconductor body from a surface. A body region of a first conductivity type adjoins a first sidewall of the first trench and a first sidewall of the second trench, the body region including a channel portion adjoining to a source structure and being configured to be controlled in its conductivity by a gate structure. The channel portion is formed at the first sidewall of the second trench and is not formed at the first sidewall of the first trench. An electrically floating semiconductor zone of the first conductivity type adjoins the first trench and has a bottom side located deeper within the semiconductor body than the bottom side of the body region.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: October 28, 2014
    Assignee: Infineon Technologies Austria AG
    Inventors: Frank Pfirsch, Maria Cotorogea, Franz Hirler, Franz-Josef Niedernostheide, Thomas Raker, Hans-Joachim Schulze, Hans Peter Felsl
  • Patent number: 8847201
    Abstract: Provided are quantum dots having a gradual composition gradient shell structure which have an improved luminous efficiency and optical stability, and a method of manufacturing the quantum dots in a short amount of time at low cost. In the method, the quantum dots can be manufactured in a short amount of time at low cost using a reactivity difference between semiconductor precursors, unlike in uneconomical and inefficient conventional methods where shells are formed after forming cores and performing cleaning and redispersion processes. Also, formation of the cores is followed by formation of shells having a composition gradient.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: September 30, 2014
    Assignee: SNU R&DB Foundation
    Inventors: Kookheon Char, Seong Hoon Lee, Wan Ki Bae, Hyuck Hur
  • Patent number: 8772759
    Abstract: A system may include first and second qubits that cross one another and a first coupler having a perimeter that encompasses at least a part of the portions of the first and second qubits, the first coupler being operable to ferromagnetically or anti-ferromagnetically couple the first and the second qubits together. A multi-layered computer chip may include a first plurality N of qubits laid out in a first metal layer, a second plurality M of qubits laid out at least partially in a second metal layer that cross each of the qubits of the first plurality of qubits, and a first plurality N times M of coupling devices that at least partially encompasses an area where a respective pair of the qubits from the first and the second plurality of qubits cross each other.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: July 8, 2014
    Assignee: D-Wave Systems Inc.
    Inventors: Paul Bunyk, Felix Maibaum
  • Patent number: 8748933
    Abstract: Semiconductor nanocrystals including III-V semiconductors can include a core including III-V alloy. The nanocrystal can include an overcoating including a II-VI semiconductor.
    Type: Grant
    Filed: March 12, 2012
    Date of Patent: June 10, 2014
    Assignee: Massachusetts Institute of Technology
    Inventors: Moungi G. Bawendi, Sang-wook Kim, John P. Zimmer
  • Patent number: 8742399
    Abstract: A quantum dot, which is an ultrafine grain, has a core-shell structure having a core portion and a shell portion protecting the core portion. The surface of the shell portion is covered with two kinds of surfactants, a hole-transporting surfactant and an electron-transporting surfactant, which are concurrently present. Moreover, the hole-transporting surfactant has a HOMO level which tunneling-resonates with the valence band of the quantum dot and the electron-transporting surfactant has a LUMO level which tunneling-resonates with the transfer band of the quantum dot. Thus, a nanograin material which has good carrier transport efficiency and is suitable for use in a photoelectric conversion device is achieved.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: June 3, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Koji Murayama
  • Patent number: 8729526
    Abstract: An optical semiconductor device includes a substrate; and an active layer disposed on the substrate, wherein the active layer includes a first barrier layer containing GaAs, a quantum dot layer, which is disposed on the first barrier layer, which includes a quantum dot containing InAs, which includes a side barrier layer which covers at least a part of the quantum dot and a side surface of the quantum dot, and having an elongation strain inherent therein, and a second barrier layer disposed on the quantum dot layer.
    Type: Grant
    Filed: December 10, 2010
    Date of Patent: May 20, 2014
    Assignee: Fujitsu Limited
    Inventor: Nobuaki Hatori
  • Publication number: 20140117311
    Abstract: Semiconductor structures having a nanocrystalline core and nanocrystalline shell pairing compositional transition layers are described. In an example, a semiconductor structure includes a nanocrystalline core composed of a first semiconductor material. A nanocrystalline shell composed of a second semiconductor material surrounds the nanocrystalline core. A compositional transition layer is disposed between, and in contact with, the nanocrystalline core and nanocrystalline shell and has a composition intermediate to the first and second semiconductor materials. In another example, a semiconductor structure includes a nanocrystalline core composed of a first semiconductor material. A nanocrystalline shell composed of a second semiconductor material surrounds the nanocrystalline core. A nanocrystalline outer shell surrounds the nanocrystalline shell and is composed of a third semiconductor material.
    Type: Application
    Filed: October 29, 2012
    Publication date: May 1, 2014
    Inventor: Juanita N. Kurtin
  • Patent number: 8648429
    Abstract: In one embodiment, a semiconductor device includes a plurality of semiconductor chip stacks mounted on a substrate. Bonding terminals disposed on the substrate correspond to the chip stacks, such that at least one chip in each chip stack may be directly connected to a bonding terminal on the substrate and at least one chip in the chip stack is not directly connected to the bonding terminal. The semiconductor chip stacks may each act as one semiconductor device to the outside.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: February 11, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Uk-song Kang, Hoon Lee
  • Patent number: 8581227
    Abstract: A computer-implemented method for encryption and decryption using quantum computational model is disclosed. Such a method includes providing a model of a lattice having a system of non-abelian anyons disposed thereon. From the lattice model, a first quantum state associated with the lattice is determined. Movement of non-abelian anyons within the lattice is modeled to model formation of first and second quantum braids in the space-time of the lattice. The first quantum braid corresponds to first text. The second quantum braid corresponds to second text. A second quantum state associated with the lattice is determined from the lattice model after formation of the first and second quantum braids has been modeled. The second quantum state corresponds to second text that is different from the first text.
    Type: Grant
    Filed: September 27, 2011
    Date of Patent: November 12, 2013
    Assignee: Microsoft Corporation
    Inventors: Michael Freedman, Chetan Nayak, Kirill Shtengel
  • Patent number: 8581235
    Abstract: Provided are a resonance tunneling device and a method of manufacturing the resonance tunneling device. The resonance tunneling device includes a substrate, a plurality of electrodes disposed on the substrate, and a nanoparticle layer disposed between the electrodes, and doped with an impurity. The nanoparticle layer uses the impurity to exhibit resonance tunneling where a current peak occurs at a target bias voltage applied between the electrodes.
    Type: Grant
    Filed: June 12, 2013
    Date of Patent: November 12, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jonghyurk Park, Seung Youl Kang
  • Patent number: 8575591
    Abstract: An apparatus applies a carrier fluid to a semiconductor substrate. The carrier fluid carries nanoparticles. The positions of a plurality of particles in the carrier fluid are manipulated by applying an electric field, removing the carrier fluid from the substrate so as to leave the nanoparticles on the substrate, and sintering the nanoparticles to form a region.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: November 5, 2013
    Assignee: Nokia Corporation
    Inventors: Petri Juhani Korpi, Risto Johannes Johannes Rönkkä
  • Patent number: 8552416
    Abstract: The present invention relates to a quantum dot light emitting diode device in which a hole transportation layer is formed after forming a quantum dot light emitting layer by a solution process by applying an inverted type quantum dot light emitting diode device for making free selection of a hole transportation layer material that enables easy injection of a hole to the quantum dot light emitting layer; and display device and method therewith.
    Type: Grant
    Filed: May 25, 2011
    Date of Patent: October 8, 2013
    Assignees: LG Display Co., Ltd., SNU R&DB Foundation
    Inventors: Young-Mi Kim, Ho-Cheol Kang, Ho-Jin Kim, Chang-Hee Lee, Kook-Heon Char, Seong-Hoon Lee, Jeong-Hun Kwak, Wan-Ki Bae, Dong-Gu Lee, Jae-Hoon Lim
  • Patent number: 8482062
    Abstract: A semiconductor device includes a first trench and a second trench extending into a semiconductor body from a surface. A body region of a first conductivity type adjoins a first sidewall of the first trench and a first sidewall of the second trench, the body region including a channel portion adjoining to a source structure and being configured to be controlled in its conductivity by a gate structure. The channel portion is formed at the first sidewall of the second trench and is not formed at the first sidewall of the first trench. An electrically floating semiconductor zone of the first conductivity type adjoins the first trench and has a bottom side located deeper within the semiconductor body than the bottom side of the body region.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: July 9, 2013
    Assignee: Infineon Technologies Austria AG
    Inventors: Frank Pfirsch, Maria Cotorogea, Franz Hirler, Franz-Josef Niedernostheide, Thomas Raker, Hans-Joachim Schulze, Hans Peter Felsl
  • Patent number: 8481347
    Abstract: Provided are a resonance tunneling device and a method of manufacturing the resonance tunneling device. The resonance tunneling device includes a substrate, a plurality of electrodes disposed on the substrate, and a nanoparticle layer disposed between the electrodes, and doped with an impurity. The nanoparticle layer uses the impurity to exhibit resonance tunneling where a current peak occurs at a target bias voltage applied between the electrodes.
    Type: Grant
    Filed: February 8, 2012
    Date of Patent: July 9, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jonghyurk Park, Seung Youl Kang
  • Patent number: 8455881
    Abstract: A virtual substrate structure includes a crystalline silicon substrate with a first layer of III-N grown on the silicon substrate. Ge clusters or quantum dots are grown on the first layer of III-N and a second layer of III-N is grown on the Ge clusters or quantum dots and any portions of the first layer of III-N exposed between the Ge clusters or quantum dots. Additional alternating Ge clusters or quantum dots and layers of III-N are grown on the second layer of III-N forming an upper surface of III-N. Generally, the additional alternating layers of Ge clusters or quantum dots and layers of III-N are continued until dislocations in the III-N adjacent the upper surface are substantially eliminated.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: June 4, 2013
    Assignee: Translucent, Inc.
    Inventors: Erdem Arkun, Andrew Clark
  • Patent number: 8445967
    Abstract: A semiconductor device includes a semiconductor island having at least one electrical dopant atom and encapsulated by dielectric materials including at least one dielectric material layer. At least two portions of the at least one dielectric material layer have a thickness less than 2 nm to enable quantum tunneling effects. A source-side conductive material portion and a drain-side conductive material portion abuts the two portions of the at least one dielectric material layer. A gate conductor is located on the at least one dielectric material layer between the source-side conductive material portion and the drain-side conductive material portion. The potential of the semiconductor island responds to the voltage at the gate conductor to enable or disable tunneling current through the two portions of the at least one dielectric material layer. Design structures for the semiconductor device are also provided.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: May 21, 2013
    Assignee: International Business Machines Corporation
    Inventors: Zhong-Xiang He, Qizhi Liu
  • Patent number: 8422266
    Abstract: Various embodiment include optical and optoelectronic devices and methods of making same. Under one aspect, an optical device includes an integrated circuit having an array of conductive regions, and an optically sensitive material over at least a portion of the integrated circuit and in electrical communication with at least one conductive region of the array of conductive regions. Under another aspect, a film includes a network of fused nanocrystals, the nanocrystals having a core and an outer surface, wherein the core of at least a portion of the fused nanocrystals is in direct physical contact and electrical communication with the core of at least one adjacent fused nanocrystal, and wherein the film has substantially no defect states in the regions where the cores of the nanocrystals are fused. Additional devices and methods are described.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: April 16, 2013
    Assignee: InVisage Technologies, Inc.
    Inventors: Edward Sargent, Jason Clifford, Gerasimos Konstantatos, Ian Howard, Ethan J. D. Klem, Larissa Levina
  • Patent number: 8421053
    Abstract: A system may include first and second qubits that cross one another and a first coupler having a perimeter that encompasses at least a part of the portions of the first and second qubits, the first coupler being operable to ferromagnetically or anti-ferromagnetically couple the first and the second qubits together. A multi-layered computer chip may include a first plurality N of qubits laid out in a first metal layer, a second plurality M of qubits laid out at least partially in a second metal layer that cross each of the qubits of the first plurality of qubits, and a first plurality N times M of coupling devices that at least partially encompasses an area where a respective pair of the qubits from the first and the second plurality of qubits cross each other.
    Type: Grant
    Filed: March 23, 2009
    Date of Patent: April 16, 2013
    Assignee: D-Wave Systems Inc.
    Inventors: Paul Bunyk, Richard David Neufeld, Felix Maibaum
  • Patent number: 8405063
    Abstract: A component including a substrate, at least one layer including a color conversion material including quantum dots disposed over the substrate, and a layer including a conductive material (e.g., indium-tin-oxide) disposed over the at least one layer. (Embodiments of such component are also referred to herein as a QD light-enhancement substrate (QD-LES).) In certain preferred embodiments, the substrate is transparent to light, for example, visible light, ultraviolet light, and/or infrared radiation. In certain embodiments, the substrate is flexible. In certain embodiments, the substrate includes an outcoupling element (e.g., a microlens array). A film including a color conversion material including quantum dots and a conductive material is also provided. In certain embodiments, a component includes a film described herein. Lighting devices are also provided. In certain embodiments, a lighting device includes a film described herein.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: March 26, 2013
    Assignee: QD Vision, Inc.
    Inventors: Peter T. Kazlas, Seth Coe-Sullivan
  • Publication number: 20130026445
    Abstract: An optoelectronic device and method for fabricating optoelectronic device, comprising: forming a quantum dot layer on a substrate including at least one electronically conductive layer, including a plurality of quantum dots which have organic capping layers; and removing organic capping layers from the quantum dots of the quantum dot layer by physically treating the quantum dot layer, the physical treatment including both thermal treatment and plasma processing.
    Type: Application
    Filed: July 26, 2011
    Publication date: January 31, 2013
    Inventor: Farzad PARSAPOUR
  • Patent number: 8362504
    Abstract: A light emitting diode device includes a light emitting diode chip and a nanocrystal-metal oxide monolith having a nanocrystal-metal oxide composite disposed on a light emitting surface of the light emitting diode chip.
    Type: Grant
    Filed: April 30, 2008
    Date of Patent: January 29, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun Joo Jang, Shin Ae Jun, Jung Eun Lim
  • Patent number: 8330141
    Abstract: A light-emitting device includes an n-type silicon thin film (2), a silicon thin film (3), and a p-type silicon thin film (4). The silicon thin film (3) is formed on the n-type silicon thin film (2) and the p-type silicon thin film (4) is formed on the silicon thin film (3). The n-type silicon thin film (2), the silicon thin film (3), and the p-type silicon thin film (4) form a pin junction. The n-type silicon thin film (2) includes a plurality of quantum dots (21) composed of n-type Si. The silicon thin film (3) includes a plurality of quantum dots (31) composed of p-type Si. The p-type silicon thin film (4) includes a plurality of quantum dots (41) composed of p-type Si. Electrons are injected from the n-type silicon thin film (2) side and holes are injected from the p-type silicon thin film (4) side, whereby light is emitted at a silicon nitride film (3).
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: December 11, 2012
    Assignee: Hiroshima University
    Inventors: Shin Yokoyama, Yoshiteru Amemiya
  • Patent number: 8304757
    Abstract: A semiconductor light-emitting device includes a GaAs substrate; and an active layer provided over the GaAs substrate, the active layer including: a lower barrier layer lattice-matched to the GaAs substrate; a quantum dot provided on the lower barrier layer; a strain relaxation layer covering a side of the quantum dot; and an upper barrier layer contacting the top of the quantum dot, at least a portion of the upper barrier layer contacting the top of the quantum dot being lattice-matched to the GaAs substrate, and having a band gap larger than a band gap of the quantum dot and smaller than a band gap of GaAs.
    Type: Grant
    Filed: September 8, 2010
    Date of Patent: November 6, 2012
    Assignee: Fujitsu Limited
    Inventors: Nobuaki Hatori, Tsuyoshi Yamamoto
  • Patent number: 8284587
    Abstract: Various embodiments include apparatuses including optical and optoelectronic devices and methods of making same. One such device includes an image sensor having an integrated circuit with a number of pixel electrodes, a substantially-continuous optically-sensitive layer, and at least one counter-electrode. The substantially continuous optically sensitive layer is in electrical communication with both the number of pixel electrodes and also the counter-electrode. Additional apparatuses and methods are disclosed.
    Type: Grant
    Filed: December 12, 2011
    Date of Patent: October 9, 2012
    Assignee: InVisage Technologies, Inc.
    Inventors: Edward Sargent, Jason Clifford, Gerasimos Konstantatos, Ian Howard, Ethan J. D. Klem, Larissa Levina
  • Patent number: 8284586
    Abstract: Optical and optoelectronic devices and methods of making same. Under one aspect, an optical device includes an integrated circuit an array of conductive regions; and an optically sensitive material over at least a portion of the integrated circuit and in electrical communication with at least one conductive region of the array of conductive regions. Under another aspect, a method of forming a nanocrystalline film includes fabricating a plurality of nanocrystals having a plurality of first ligands attached to their outer surfaces; exchanging the first ligands for second ligands of different chemical composition than the first ligands; forming a film of the ligand-exchanged nanocrystals; removing the second ligands; and fusing the cores of adjacent nanocrystals in the film to form an electrical network of fused nanocrystals.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: October 9, 2012
    Assignee: InVisage Technologies, Inc.
    Inventors: Edward Sargent, Larissa Levina, Gerasimos Konstantatos, Ian Howard, Ethan J. D. Klem, Jason Clifford
  • Publication number: 20120248415
    Abstract: Provided are a resonance tunneling device and a method of manufacturing the resonance tunneling device. The resonance tunneling device includes a substrate, a plurality of electrodes disposed on the substrate, and a nanoparticle layer disposed between the electrodes, and doped with an impurity. The nanoparticle layer uses the impurity to exhibit resonance tunneling where a current peak occurs at a target bias voltage applied between the electrodes.
    Type: Application
    Filed: February 8, 2012
    Publication date: October 4, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jonghyurk PARK, Seung Youl Kang
  • Patent number: 8264033
    Abstract: A semiconductor device includes a first trench and a second trench extending into a semiconductor body from a surface. A body region of a first conductivity type adjoins a first sidewall of the first trench and a first sidewall of the second trench, the body region including a channel portion adjoining to a source structure and being configured to be controlled in its conductivity by a gate structure. The channel portion is formed at the first sidewall of the second trench and is not formed at the first sidewall of the first trench. An electrically floating semiconductor zone of the first conductivity type adjoins the first trench and has a bottom side located deeper within the semiconductor body than the bottom side of the body region.
    Type: Grant
    Filed: July 21, 2009
    Date of Patent: September 11, 2012
    Assignee: Infineon Technologies Austria AG
    Inventors: Frank Pfirsch, Maria Cotorogea, Franz Hirler, Franz-Josef Niedernostheide, Thomas Raker, Hans-Joachim Schulze, Hans Peter Felsl
  • Patent number: 8258497
    Abstract: A method for manufacturing an electronic-photonic device. Epitaxially depositing an n-doped III-V composite semiconductor alloy buffer layer on a crystalline surface of a substrate at a first temperature. Forming an active layer on the n-doped III-V epitaxial composite semiconductor alloy buffer layer at a second temperature, the active layer including a plurality of spheroid-shaped quantum dots. Depositing a p-doped III-V composite semiconductor alloy capping layer on the active layer at a third temperature. The second temperature is less than the first temperature and the third temperature. The active layer has a photoluminescence intensity emission peak in the telecommunication C-band.
    Type: Grant
    Filed: October 18, 2010
    Date of Patent: September 4, 2012
    Assignee: Alcatel Lucent
    Inventors: Nick Sauer, Nils Weimann, Liming Zhang
  • Patent number: 8242542
    Abstract: A semiconductor device includes a semiconductor island having at least one electrical dopant atom and encapsulated by dielectric materials including at least one dielectric material layer. At least two portions of the at least one dielectric material layer have a thickness less than 2 nm to enable quantum tunneling effects. A source-side conductive material portion and a drain-side conductive material portion abuts the two portions of the at least one dielectric material layer. A gate conductor is located on the at least one dielectric material layer between the source-side conductive material portion and the drain-side conductive material portion. The potential of the semiconductor island responds to the voltage at the gate conductor to enable or disable tunneling current through the two portions of the at least one dielectric material layer. Design structures for the semiconductor device are also provided.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: August 14, 2012
    Assignee: International Business Machines Corporation
    Inventors: Zhong-Xiang He, Qizhi Liu
  • Publication number: 20120175593
    Abstract: A quantum dot, which is an ultrafine grain, has a core-shell structure having a core portion and a shell portion protecting the core portion. The surface of the shell portion is covered with two kinds of surfactants, a hole-transporting surfactant and an electron-transporting surfactant, which are concurrently present. Moreover, the hole-transporting surfactant has a HOMO level which tunneling-resonates with the valence band of the quantum dot and the electron-transporting surfactant has a LUMO level which tunneling-resonates with the transfer band of the quantum dot. Thus, a nanograin material which has good carrier transport efficiency and is suitable for use in a photoelectric conversion device is achieved.
    Type: Application
    Filed: March 26, 2012
    Publication date: July 12, 2012
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventor: Koji Murayama
  • Patent number: 8203137
    Abstract: A photonic structure includes a plurality of annealed, substantially smooth-surfaced ellipsoids arranged in a matrix. Additionally, a method of producing a photonic structure is provided. The method includes providing a semiconductor material, providing an etch mask comprising a two-dimensional hole array, and disposing the etch mask on at least one surface of the semiconductor material. The semiconductor material is then etched through the hole array of the etch mask to produce holes in the semiconductor material and thereafter applying a passivation layer to surfaces of the holes. Additionally, the method includes repeating the etching and passivation-layer application to produce a photonic crystal structure that contains ellipsoids within the semiconductor material and annealing the photonic crystal structure to smooth the surfaces of the ellipsoids.
    Type: Grant
    Filed: July 13, 2009
    Date of Patent: June 19, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Hans S. Cho, David A. Fattal, Theodore I. Kamins
  • Patent number: 8193010
    Abstract: A method of uniformly transferring luminescent quantum dots onto a substrate, comprising: a) preparing a colloidal suspension of luminescent quantum dots in a hydrophobic solvent, wherein the density of the hydrophobic solvent is from 0.67 g/cm3 to 0.96 g/cm3; b) dispensing the suspension onto a convex aqueous surface; c) allowing the hydrophobic solvent to evaporate; d) contacting the film of luminescent quantum dots with a hydrophobic stamp; and e) depositing the film of luminescent quantum dots onto a substrate with the hydrophobic stamp is described herein. Further described is a method of preparing quantum dot based light emitting diodes.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: June 5, 2012
    Assignee: Board of Regents, The University of Texas System
    Inventors: Ashwini Gopal, Sunmin Kim, Xiaojing Zhang, Kazunori Hoshino
  • Patent number: 8183073
    Abstract: The method of manufacturing the semiconductor device comprises the step of forming quantum dots 16 on a base layer 10 by self-assembled growth; the step of irradiating Sb or GaSb to the surface of the base layer 10 before or in the step of forming quantum dots 16; the step of etching the surfaces of the quantum dots 16 with an As raw material gas to thereby remove an InSb layer 18 containing Sb deposited on the surfaces of the quantum dots 16; and growing a capping layer 22 on the quantum dots 16 with the InSb layer 18 removed.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: May 22, 2012
    Assignees: Fujitsu Limited, The University of Tokyo
    Inventors: Yasuhiko Arakawa, Denis Guimard, Shiro Tsukamoto, Hiroji Ebe, Mitsuru Sugawara
  • Patent number: 8164150
    Abstract: The present disclosure relates to illumination devices and methods of generating light for extended periods of time without requiring an outside source of power, recharging, refueling or maintenance. The devices of the present disclosure comprise a plurality of quantum dots and a radioisotope, and may be used in numerous ways, for example, for the marking critical areas or paths, for the illumination of pathways in aircraft, ships, trains, buildings, and other facilities where these routes must be precisely delineated or identified for safety reasons, for the inclusion of signs or other indicia that must be illuminated at all times, as well as many military uses, such as for the demarcation of temporary airfields for fixed-wing aircraft or helicopters or for IFF (identification friend or foe).
    Type: Grant
    Filed: November 10, 2008
    Date of Patent: April 24, 2012
    Assignee: The Boeing Company
    Inventors: Maurice P. Bianchi, Timothy R. Kilgore, Arthur F. Cooper, David A. Deamer
  • Patent number: 8164082
    Abstract: A spin bus quantum computing architecture includes a spin bus formed of multiple strongly coupled and always on qubits that define a string of spin qubits. A plurality of information bearing qubits are disposed adjacent a qubit of the spin bus. Electrodes are formed to the information bearing qubits and the spin bus qubits to allow control of the establishment and breaking of coupling between qubits to allow control of the establishment and breaking of coupling between each information bearing qubit and the spin bus qubit adjacent to it. The spin bus architecture allows rapid and reliable long-range coupling of qubits.
    Type: Grant
    Filed: September 27, 2006
    Date of Patent: April 24, 2012
    Assignee: Wisconsin Alumni Research Foundation
    Inventor: Mark G. Friesen
  • Patent number: 8138493
    Abstract: The present invention provides an optoelectronic semiconductor device comprising at least one semiconductor nanowire, wherein the nanowire comprises a nanowire core and at least one shell layer arranged around at least a portion of the nanowire core. The nanowire core and the shell layer form a pn or pin junction that in operation provides an active region for carrier generation or carrier recombination. Quantum dots adapted to act as carrier recombination centres or carrier generation centres are arranged in the active region. By using the nanowire core as template for formation of the quantum dots and the shell layer, quantum dots of homogeneous size and uniform distribution can be obtained. Basically, the optoelectronic semiconductor device can be used for light generation or light absorption.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: March 20, 2012
    Assignee: QuNano AB
    Inventors: Jonas Ohlsson, Lars Samuelson
  • Publication number: 20120063253
    Abstract: An optical memory device and a method of recording/reproducing information by using the optical memory device. The optical memory device includes a substrate; a first barrier layer formed on the substrate; a quantum well layer; a second barrier layer; a quantum dot layer; and a third barrier layer. The quantum well layer has an energy band gap which is wider than that of the quantum dot layer, and the second barrier layer has an energy band gap which is wider than that of the quantum well layer, so that electrons in excitons which are generated in the quantum dot layer by light of a certain wavelength are captured by the quantum well layer to record information, and then, recorded information may be erased or reproduced by irradiating light of a certain wavelength to the optical memory device.
    Type: Application
    Filed: April 14, 2010
    Publication date: March 15, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-Cheol Bae, Joo-Ho Kim, Jin-Kyung Lee
  • Patent number: 8134175
    Abstract: Semiconductor nanocrystals including III-V semiconductors can include a core including III-V alloy. The nanocrystal can include an overcoating including a II-VI semiconductor.
    Type: Grant
    Filed: January 11, 2005
    Date of Patent: March 13, 2012
    Assignee: Massachusetts Institute of Technology
    Inventors: Moungi G. Bawendi, Sang-wook Kim, John P. Zimmer
  • Patent number: 8134141
    Abstract: A semiconductor detector has a tunable spectral response. These detectors may be used with processing techniques that permit the creation of “synthetic” sensors that have spectral responses that are beyond the spectral responses attainable by the underlying detectors. For example, the processing techniques may permit continuous and independent tuning of both the center wavelength and the spectral resolution of the synthesized spectral response. Other processing techniques can also generate responses that are matched to specific target signatures.
    Type: Grant
    Filed: April 2, 2007
    Date of Patent: March 13, 2012
    Assignee: STC.UNM
    Inventors: Sanjay Krishna, J. Scott Tyo, Majeed M. Hayat, Sunil Raghavan, Unal Sakoglu
  • Publication number: 20120056159
    Abstract: The present disclosure generally relates to techniques for controlled quantum dot growth as well as a quantum dot structures. In some examples, a method is described that includes one or more of providing a substrate, forming a defect on the substrate, depositing a layer on the substrate and forming quantum dots along the defect.
    Type: Application
    Filed: November 10, 2011
    Publication date: March 8, 2012
    Applicant: Empire Technology Development LLC
    Inventor: EZEKIEL KRUGLICK
  • Patent number: 8106378
    Abstract: A p-type semiconductor barrier layer is provided in the vicinity of undoped quantum dots, and holes in the p-type semiconductor barrier layer are injected in advance in the ground level of the valence band of the quantum dots. Lowering the threshold electron density of conduction electrons in the ground level of the conduction band of quantum dots in this way accelerates the relaxation process of electrons from an excited level to the ground level in the conduction band.
    Type: Grant
    Filed: December 18, 2006
    Date of Patent: January 31, 2012
    Assignee: NEC Corporation
    Inventor: Hideaki Saito
  • Patent number: 8102693
    Abstract: Optical and optoelectronic devices and methods of making same. Under one aspect, an optical device includes an integrated circuit an array of conductive regions; and an optically sensitive material over at least a portion of the integrated circuit and in electrical communication with at least one conductive region of the array of conductive regions. Under another aspect, a method of forming a nanocrystalline film includes fabricating a plurality of nanocrystals having a plurality of first ligands attached to their outer surfaces; exchanging the first ligands for second ligands of different chemical composition than the first ligands; forming a film of the ligand-exchanged nanocrystals; removing the second ligands; and fusing the cores of adjacent nanocrystals in the film to form an electrical network of fused nanocrystals.
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: January 24, 2012
    Assignee: InVisage Technologies, Inc.
    Inventors: Edward Sargent, Jason Clifford, Gerasimos Konstantatos, Ian Howard, Ethan J. D. Klem, Larissa Levina
  • Patent number: 8076740
    Abstract: A photo detector is provided with a plurality of quantum dot layers and first conductive type contact layers provided at both sides of the plurality of quantum dot layers so as to sandwich them; a second conductive type impurity is doped in a first semiconductor layer formed between one first conductive type contact layer and a first quantum dot layer which is closest to the one first conductive type contact layer so that it results in a barrier against a carrier positioned at the one first conductive contact layer.
    Type: Grant
    Filed: June 14, 2006
    Date of Patent: December 13, 2011
    Assignee: Fujitsu Limited
    Inventors: Yasuhito Uchiyama, Hironori Nishino
  • Patent number: 8058638
    Abstract: Apparatus and methods for performing quantum computations are disclosed. Such quantum computational systems may include quantum computers, quantum cryptography systems, quantum information processing systems, quantum storage media, and special purpose quantum simulators.
    Type: Grant
    Filed: November 6, 2008
    Date of Patent: November 15, 2011
    Assignee: Microsoft Corporation
    Inventors: Michael Freedman, Chetan Nayak, Kirill Shtengel
  • Publication number: 20110272671
    Abstract: A semiconductor device comprising a quantum dot and a plurality of layers, wherein said plurality of layers comprises: a first layer; a stressor layer; and a patterned layer wherein said stressor layer overlies said first layer and said patterned layer overlies said stressor layer; wherein said stressor layer has a substantially different lattice constant to said first layer and said patterned layer and has a pit provided in said layer; said quantum dot lying above said patterned layer aligned with said pit.
    Type: Application
    Filed: May 10, 2011
    Publication date: November 10, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Joanna Krystyna SKIBA-SZYMANSKA, Andrew James SHIELDS
  • Patent number: 8053754
    Abstract: A computer-implemented method for encryption and decryption using a quantum computational model is disclosed. Such a method includes providing a model of a lattice having a system of non-abelian anyons disposed thereon. From the lattice model, a first quantum state associated with the lattice is determined. Movement of non-abelian anyons within the lattice is modeled to model formation of first and second quantum braids in the space-time of the lattice. The first quantum braid corresponds to first text. The second quantum braid corresponds to second text. A second quantum state associated with the lattice is determined from the lattice model after formation of the first and second quantum braids has been modeled. The second quantum state corresponds to second text that is different from the first text.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: November 8, 2011
    Assignee: Microsoft Corporation
    Inventors: Michael Freedman, Chetan Nayak, Kirill Shtengel