Abstract: The present invention prevents the diffusion of an aluminum element into a polysilicon layer in a heating step when an aluminum-based conductive layer is used in a source/drain electrode which is in contact with low-temperature polysilicon whereby the occurrence of defective display can be obviated. An aluminum-based conductive layer is used in a source/drain electrode and a barrier layer made of molybdenum or a molybdenum alloy layer is formed between the aluminum-based conductive layer and a polysilicon layer. Further, a molybdenum oxide nitride film formed by the rapid heat treatment (rapid heat annealing) in a nitrogen atmosphere is formed over a surface of the molybdenum or the molybdenum alloy which constitutes the barrier layer.

Abstract: The present invention is a compound semiconductor device characterized in that it is Cu-metalized to improved the reliability of the device and to greatly reduce the cost of production.

Abstract: A semiconductor device exhibits a first metal layer, made of a first metal, with at least one contiguous subsection. At least one second metal layer, made of a second metal, is placed on the contiguous subsection of the first metal layer. The second metal is harder than the first metal. The second metal layer is structured to form at least two layer regions, which are disposed on the contiguous subsection of the first metal layer. The second metal exhibits a boron-containing or phosphorus-containing metal or a boron-containing or phosphorus-containing metal alloy.

Abstract: The present invention provides an ohmic contact for a copper metallization whose heat diffusion is improved and cost is reduced. Therein, the ohmic contact is formed through a depositing and an annealing of three metal layers of Pd, Ge and Cu; and, the contact resistance of the ohmic contact is adjusted by the thicknesses of the three layers.

Abstract: A silicon-based IR photodetector is formed within a silicon-on-insulator (SOI) structure by placing a metallic strip (preferably, a silicide) over a portion of an optical waveguide formed within a planar silicon surface layer (i.e., “planar SOI layer”) of the SOI structure, the planar SOI layer comprising a thickness of less than one micron. Room temperature operation of the photodetector is accomplished as a result of the relatively low dark current associated with the SOI-based structure and the ability to use a relatively small surface area silicide strip to collect the photocurrent. The planar SOI layer may be doped, and the geometry of the silicide strip may be modified, as desired, to achieve improved results over prior art silicon-based photodetectors.

Abstract: A semiconductor chip according to the present invention includes a semiconductor substrate, a bump of a metal projecting from a surface of the semiconductor substrate, and an alloy film covering the entire surface of the bump, the alloy film being composed of an alloy of the metal of the bump and a second metal.

Abstract: A nickel silicon alloy barrier layer formed between a metal bonding pad on an integrated circuit and a tin-based solder ball, for example, a lead-free solder. The nickel silicon alloy contains at least 2 wt % silicon and preferably less than 20 wt %. An adhesion layer may be formed between the barrier layer and the bonding pad. For copper metallization, the adhesion layer may contain titanium or tantalum; for aluminum metallization, it may be aluminum. The nickel silicon alloy may be deposited by magnetron sputtering. Commercially available NiSi4.5% sputter targets have provided a superior under-bump metallization (UBM) with lead-free tin solder bumps. Dopants other than silicon/may be used to reduce the magnetic permeability and provide other advantages of the invention.

Abstract: A method of manufacturing a microelectronic device including forming a dielectric layer surrounding a dummy feature located over a substrate, removing the dummy feature to form an opening in the dielectric layer, and forming a metal-silicide layer conforming to the opening by a metal deposition process employing a target which includes metal and silicon. The metal-silicide layer may then be annealed.

Abstract: A Ni2Si-nSiC Ohmic contact is formed by pulsed laser ablation deposition (PLD) of Ni2Si source target deposited on a n-SiC substrate or SiC substrate wafer with SiC epilayer. The Ni2Si Ohmic contact on n-SiC was rapid thermal annealed at 950° C. for 30 s in a N2 ambient. The resultant Ohmic contact is characterized by excellent current-voltage (I-V) characteristics, an abrupt void free contact-SiC interface, retention of the PLD as-deposited contact layer width, smooth surface morphology, and absence of residual carbon within the contact layer or at the interface. The detrimental effects of contact delamination due to stress associated with interfacial voiding; and wire bond failure, non-uniformity of current flow and SiC polytype alteration due to extreme surface roughness; have been eliminated as has electrical instability associated with carbon inclusions at the contact-SiC interface, after prolonged high temperature and power device operation.

Abstract: A semiconductor device of the present invention comprises a Group III-V nitride semiconductor layer of gallium nitride or the like having n-type conductivity and at least one ohmic electrode formed on the Group III-V nitride semiconductor layer of gallium nitride or the like having n-type conductivity. The ohmic electrode is formed of a conductive material containing a metal boride.

Abstract: A method of producing a semiconductor device according to an aspect of the present invention comprises forming a seed film of Cu on a substrate; polycrystallizing the seed film formed on the substrate; and forming a plated film of Cu on the polycrystallized seed film by electrolytic plating.

Abstract: CVD metallization processes and CVD apparatus used therein are provided. The processes include forming a barrier metal layer on a semiconductor substrate and cooling the semiconductor substrate having the barrier metal layer without breaking vacuum. An additional metal layer may be formed on the cooled barrier metal layer. The in-situ cooling process is preferably performed inside a cooling chamber installed between first and second transfer chambers, which are separated from each other. The barrier metal layer may be formed inside a CVD process chamber attached to the first transfer chamber, and the additional metal layer may be formed inside another CVD process chamber attached to the second transfer chamber.