Abstract: A semiconductor device includes: a first semiconductor layer of p-type AlxGa1-xN (0?x?1); a second semiconductor layer of n-type AlyGa1-yN (0<y<1, x<y) formed on the first semiconductor layer; a control electrode formed on the second semiconductor layer; a first main electrode connected to the first semiconductor layer and the second semiconductor layer; and a second main electrode connected to the second semiconductor layer. An interface between the first semiconductor layer and the second semiconductor layer has a surface orientation of (1-101) or (11-20).

Abstract: A semiconductor device has a substrate of one type of semiconductor material, such as silicon. A contact structure is formed on the substrate, and the contact structure is formed of a compound of a metal and a second type of semiconductor material, such as germanium. The contact structure according to embodiments of the present invention include a semiconductor material which a different semiconductor material forming the substrate. Higher or lower barrier height is obtained by embodiment of the invention. A method for forming a contact structure in which a substrate of one type of semiconductor material is provided. A layer of another different semiconductor material is formed on the substrate. A layer of metal is then formed on the layer of the other different semiconductor material. Upon annealing, a contact structure is formed on the substrate, which is a compound of the metal and the other different semiconductor material, onto the substrate.

Abstract: There is provided a hetero junction field effect transistor including: a first layer of a nitride based, group III-V compound semiconductor; a second layer of a nitride based, group III-V compound semiconductor containing a rare earth element, overlying the first layer; a pair of third layers of a nitride based, group III-V compound semiconductor, overlying the second layer, the third layers being spaced from each other; a gate electrode disposed between the third layers at least a region of the second layer; and a source electrode overlying one of the third layers and a drain electrode overlying an other of the third layers. A method of fabricating the hetero junction field effect transistor is also provided.

Abstract: One-transistor ferroelectric memory devices using an indium oxide film (In2O3), an In2O3 film structure, and corresponding fabrication methods have been provided. The method for controlling resistivity in an In2O3 film comprises: depositing an In film using a PVD process, typically with a power in the range of 200 to 300 watts; forming a film including In overlying a substrate material; simultaneously (with the formation of the In-including film) heating the substrate material, typically the substrate is heated to a temperature in the range of 20 to 200 degrees C.; following the formation of the In-including film, post-annealing, typically in an O2 atmosphere; and, in response to the post-annealing: forming an In2O3 film; and, controlling the resistivity in the In2O3 film. For example, the resistivity can be controlled in the range of 260 to 800 ohm-cm.