Device Comprising Active Layer Formed Only By Group Ii-vi Compound (e.g., Hgcdte Ir Photodiode) (epo) Patents (Class 257/E31.058)
  • Patent number: 11784805
    Abstract: A physically unclonable function (PUF) device is provided, comprising an excitation source providing light for exciting quantum dots (QDs); a first layer of a material having contained therein a first random distribution of first QDs of a first type that are configured to generate a first color in response to being excited by the excitation source; a second layer of a second material having contained therein a second random distribution of second QDs of a second type that are configured to generate a second color, different from the first color, in response to being excited by the first excitation source, and a detector fixedly attached to one of the first and second layers and configured for detecting a pattern of light emitted by at least one of the first QDs and the second QDs and for providing an output indicative of the detected pattern.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: October 10, 2023
    Inventors: Stacey L. Franklin, Kalin Spariosu
  • Patent number: 11721778
    Abstract: Provided is a radiation detecting element that has high adhesion between electrode portions and a substrate and does not suffer from performance failures due to insufficient insulation between the electrode portions, even if a distance between the electrode portions is narrower in order to obtain a high-definition radiation drawn image. The radiation detecting element includes: a plurality of electrode portions; and an insulating portion provided between the electrode portions on a surface of a substrate made of a compound semiconductor crystal containing cadmium telluride or cadmium zinc telluride, wherein an intermediate layer containing tellurium oxide is present between each of the electrode portions and the substrate, and wherein tellurium oxide is present on an upper portion of the insulating portion, and the tellurium oxide on the upper portion of the insulating portion has a maximum thickness of 30 nm or less.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: August 8, 2023
    Assignee: JX NIPPON MINING & METALS CORPORATION
    Inventors: Kohei Yamada, Koji Murakami
  • Patent number: 9029926
    Abstract: A solid-state imaging device includes a substrate, a photoelectric conversion section, a first impurity layer having a carrier polarity of a second conductivity type, a charge-to-voltage converting section, an amplifying section, and a second impurity layer having a carrier polarity of the second conductivity type. The second impurity layer is disposed in a region between the photoelectric conversion section and the amplifying section. The second impurity concentration of the second P-type impurity layer is made higher than the first impurity concentration of the first impurity layer.
    Type: Grant
    Filed: December 31, 2013
    Date of Patent: May 12, 2015
    Assignee: Sony Corporation
    Inventors: Kazuki Nomoto, Kaneyoshi Takeshita, Hiroyuki Ohri
  • Patent number: 9013023
    Abstract: A photoelectric element includes a first electrode; and a second electrode positioned so as to face the first electrode; and a semiconductor disposed on a face of the first electrode, the face being positioned so as to face the second electrode; and a photosensitizer carried on the semiconductor; and a first charge-transport layer interposed between the first electrode and the second electrode; and a second charge-transport layer interposed between the first charge-transport layer and the second electrode. The first charge-transport layer and the second charge-transport layer contain different oxidation-reduction materials. The oxidation-reduction material in the first charge-transport layer has an oxidation-reduction potential higher than an oxidation-reduction potential of the oxidation-reduction material in the second charge-transport layer.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: April 21, 2015
    Assignees: Panasonic Corporation, Waseda University
    Inventors: Michio Suzuka, Takashi Sekiguchi, Naoki Hayashi, Hiroyuki Nishide, Kenichi Oyaizu, Fumiaki Kato
  • Patent number: 8994083
    Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein. and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: March 31, 2015
    Assignee: Sony Corporation
    Inventors: Ryoji Suzuki, Keiji Mabuchi, Tomonori Mori
  • Patent number: 8981517
    Abstract: A solid-state image pickup element 1 is structured so as to include: a semiconductor layer 2 having a photodiode formed therein, photoelectric conversion being carried out in the photodiode; a first film 21 having negative fixed charges and formed on the semiconductor layer 2 in a region in which at least the photodiode is formed; and a second film 22 having the negative fixed charges, made of a material different from that of the first film 21 having the negative fixed charges, and formed on the first film 21 having the negative fixed charges.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: March 17, 2015
    Assignee: Sony Corporation
    Inventors: Itaru Oshiyama, Susumu Hiyama
  • Patent number: 8916905
    Abstract: It is an object to provide a photoelectric conversion device with high photoelectric conversion efficiency that improves reliability by increasing contact force between a light absorbing layer and an electrode layer. The photoelectric conversion device includes an electrode layer, and a light absorbing layer located on the electrode layer. The light absorbing layer contains a compound semiconductor. The light absorbing layer comprises a first layer close to the electrode layer and a second layer located on the first layer. The first layer has a void ratio lower than that of the second layer.
    Type: Grant
    Filed: April 22, 2011
    Date of Patent: December 23, 2014
    Assignee: KYOCERA Corporation
    Inventors: Shintaro Kubo, Shuji Nakazawa, Rui Kamada, Seiji Oguri, Shinnosuke Ushio, Shuichi Kasai, Seiichiro Inai
  • Patent number: 8790952
    Abstract: A manufacturing method forms a photoelectric conversion device having a photoreceiving portion provided in a substrate and an interlayer film arranged over the substrate. The method includes forming a layer of a lower etching rate rather than the interlayer film so that the layer of the lower etching rate covers a whole surface of the photoreceiving portion, forming the interlayer film over the layer of the lower etching rate, etching a portion of the interlayer film corresponding to the photoreceiving portion to form a hole penetrating through the interlayer film and reaching the layer of the lower etching rate, and disposing in the hole a material of a higher refractive index rather than the interlayer film.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: July 29, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Sakae Hashimoto
  • Patent number: 8785994
    Abstract: An X-ray detector including: a substrate that is divided into a light detection area and a non-detection area and includes a plurality of pixels; a photodiode disposed on the light detection area; a thin film transistor that is disposed on the non-detection area and is electrically connected to a lower portion of the photodiode; a plurality of wires that are electrically connected to the thin film transistor and are positioned on the non-detection area; at least one insulating layer disposed so as to cover at least the thin film transistor and the plurality of wires; a scintillator layer disposed on the at least one insulating layer over an entire surface of the substrate; and a shielding part disposed between the at least one insulating layer and the scintillator layer to shield the non-detection area.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: July 22, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventor: Dong-Hyuk Kim
  • Patent number: 8742398
    Abstract: A photodetector includes one or more photodiodes and a signal processing circuit. Each photodiode includes a transparent first electrode, a second electrode, and a heterojunction interposed between the first electrode and the second electrode. Each heterojunction includes a quantum dot layer and a fullerene layer disposed directly on the quantum dot layer. The signal processing circuit is in signal communication each the second electrode. The photodetector may be responsive to wavelengths in the infrared, visible, and/or ultraviolet ranges. The quantum dot layer may be treated with a chemistry that increases the charge carrier mobility of the quantum dot layer.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: June 3, 2014
    Assignee: Research Triangle Institute, Int'l.
    Inventors: Ethan Klem, John Lewis
  • Patent number: 8633524
    Abstract: A solid-state imaging device includes a substrate, a photoelectric conversion section, a first impurity layer having a carrier polarity of a second conductivity type, a charge-to-voltage converting section, an amplifying section, and a second impurity layer having a carrier polarity of the second conductivity type. The second impurity layer is disposed in a region between the photoelectric conversion section and the amplifying section. The second impurity concentration of the second P-type impurity layer is made higher than the first impurity concentration of the first impurity layer.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: January 21, 2014
    Assignee: Sony Corporation
    Inventors: Kazuki Nomoto, Kaneyoshi Takeshita, Hiroyuki Ohri
  • Patent number: 8552483
    Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein. and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: October 8, 2013
    Assignee: Sony Corporation
    Inventors: Ryoji Suzuki, Keiji Mabuchi, Tomonori Mori
  • Patent number: 8552482
    Abstract: A CMOS single photon avalanche diode (SPAD) design uses conventional, or at least known, CMOS processes to produce a device having a breakdown region in which the main p-n junction is formed of a deep n-well layer, and optionally on the other side, a p-add layer. The SPAD may also have a guard ring region which comprises the p-epi layer without any implant. The SPAD may have curved or circular perimeters. A CMOS chip comprises SPADs as described and other NMOS devices all sharing the same deep n-well.
    Type: Grant
    Filed: April 24, 2012
    Date of Patent: October 8, 2013
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventors: Robert K. Henderson, Justin Richardson
  • Patent number: 8519460
    Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein, and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. Wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: August 27, 2013
    Assignee: Sony Corporation
    Inventors: Ryoji Suzuki, Keiji Mabuchi, Tomonori Mori
  • Patent number: 8486815
    Abstract: A method for fabricating a back-side illumination image sensor includes: implanting a first type of dopant into an epitaxial layer disposed over a first side of a substrate layer to form a first dopant layer in a first side of the epitaxial layer; adhering a carry layer over the first dopant layer for carrying the substrate layer; grinding a second side of the substrate layer for exposing a second side of the epitaxial layer; implanting the first type of dopant into the epitaxial layer from the second side of the epitaxial layer to form a second dopant layer in the second side of the epitaxial layer; forming at least one metal layer over the second dopant layer after forming the second dopant layer in the second side of the epitaxial layer; removing the carry layer; and forming a color filtering module over the first dopant layer.
    Type: Grant
    Filed: May 5, 2011
    Date of Patent: July 16, 2013
    Assignees: Himax Imaging, Inc., Himax Semiconductor, Inc.
    Inventors: Fang-Ming Huang, Tsung-Chieh Chang
  • Patent number: 8471317
    Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein, and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer, wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: June 25, 2013
    Assignee: Sony Corporation
    Inventors: Ryoji Suzuki, Keiji Mabuchi, Tomonori Mori
  • Patent number: 8362532
    Abstract: A pixel of an image sensor, the pixel includes a floating diffusion node to sense photo-generated charge, a reset diode to reset the floating diffusion node in response to a reset signal, and a set diode to set the floating diffusion node.
    Type: Grant
    Filed: April 15, 2011
    Date of Patent: January 29, 2013
    Assignee: Intellectual Ventures II LLC
    Inventor: Jaroslav Hynecek
  • Patent number: 8349640
    Abstract: A method of manufacturing an image sensor having a plurality of pixels, each pixel having a photoelectric converter including an accumulation region, and a transfer gate, the accumulation region extending under a corresponding transfer gate, the plurality of pixels including a plurality of pixel groups, each pixel group including N adjacent pixels, and the channels of the N adjacent pixels, in each pixel group, being configured to transfer the charges of the N adjacent pixels away from each other, the method comprising a step of forming a resist pattern having one opening corresponding to each pixel group, and a step of forming a charge accumulation region for each of the N adjacent pixels by implanting ions into a substrate through the one opening of the resist pattern along N ion implantation directions so as to implant the ions under the transfer gate of each of the N adjacent pixels.
    Type: Grant
    Filed: April 28, 2011
    Date of Patent: January 8, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takehiko Soda
  • Patent number: 8338856
    Abstract: A backside illuminated (“BSI”) complementary metal-oxide semiconductor (“CMOS”) image sensor includes a photosensitive region disposed within a semiconductor layer and a stress adjusting layer. The photosensitive region is sensitive to light incident on a backside of the BSI CMOS image sensor to collect an image charge. The stress adjusting layer is disposed on a backside of the semiconductor layer to establish a stress characteristic that encourages photo-generated charge carriers to migrate towards the photosensitive region.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: December 25, 2012
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hsin-Chih Tai, Howard E. Rhodes, Wei Zheng, Vincent Venezia, Yin Qian, Duli Mao
  • Patent number: 8309383
    Abstract: A camera with a solid-state imaging device which includes a plurality of pixels in an arrangement, each of the pixels including a photoelectric conversion element, pixel transistors including a transfer transistor, and a floating diffusion region, in which the channel width of transfer gate of the transfer transistor is formed to be larger on a side of the floating diffusion region than on a side of the photoelectric conversion element.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: November 13, 2012
    Assignee: Sony Corporation
    Inventor: Yoshiharu Kudoh
  • Patent number: 8299484
    Abstract: An optoelectronic semiconductor chip including a radiation passage area, where a contact metallization is applied to the radiation passage area, and a first reflective layer sequence is applied to that surface of the contact metallization which is remote from the radiation passage area, and an optoelectronic component that includes such a chip.
    Type: Grant
    Filed: June 23, 2008
    Date of Patent: October 30, 2012
    Assignee: Osram Opto Semiconductors GmbH
    Inventors: Stefan Grötsch, Norbert Linder
  • Patent number: 8242547
    Abstract: A solid-state imaging device which includes a plurality of pixels in an arrangement, each of the pixels including a photoelectric conversion element, pixel transistors including a transfer transistor, and a floating diffusion region, in which the channel width of transfer gate of the transfer transistor is formed to be larger on a side of the floating diffusion region than on a side of the photoelectric conversion element.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: August 14, 2012
    Assignee: Sony Corporation
    Inventor: Yoshiharu Kudoh
  • Patent number: 8207010
    Abstract: It is an object to form a high-quality crystalline semiconductor layer directly over a large-sized substrate with high productivity without reducing the deposition rate and to provide a photoelectric conversion device in which the crystalline semiconductor layer is used as a photoelectric conversion layer. A photoelectric conversion layer formed of a semi-amorphous semiconductor is formed over a substrate as follows: a reaction gas is introduced into a treatment chamber where the substrate is placed; and a microwave is introduced into the treatment chamber through a slit provided for a waveguide that is disposed in approximately parallel to and opposed to the substrate, thereby generating plasma. By forming a photoelectric conversion layer using such a semi-amorphous semiconductor, a rate of deterioration in characteristics by light deterioration is decreased from one-fifth to one-tenth, and thus a photoelectric conversion device that has almost no problems for practical use can be obtained.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: June 26, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai
  • Patent number: 8183609
    Abstract: Disclosed is a solid-state imaging device which includes a plurality of pixels in an arrangement, each of the pixels including a photoelectric conversion element, pixel transistors including a transfer transistor, and a floating diffusion region, in which the channel width of transfer gate of the transfer transistor is formed to be larger on a side of the floating diffusion region than on a side of the photoelectric conversion element.
    Type: Grant
    Filed: May 4, 2010
    Date of Patent: May 22, 2012
    Assignee: Sony Corporation
    Inventor: Yoshiharu Kudoh
  • Patent number: 8120062
    Abstract: A complementary metal oxide semiconductor (CMOS) device and a method for fabricating the same are provided. The CMOS image sensor includes: a first conductive type substrate including a trench; a channel stop layer formed by using a first conductive type epitaxial layer over an inner surface of the trench; a device isolation layer formed on the channel stop layer to fill the trench; a second conductive type photodiode formed in a portion of the substrate in one side of the channel stop layer; and a transfer gate structure formed on the substrate adjacent to the photodiode to transfer photo-electrons generated from the photodiode.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: February 21, 2012
    Assignee: Intellectual Ventures II LLC
    Inventor: Sang-Young Kim
  • Patent number: 8120060
    Abstract: Methods and structures for monolithically integrating monocrystalline silicon and monocrystalline non-silicon materials and devices are provided. In one structure, a monolithically integrated semiconductor device structure comprises a silicon substrate and a first monocrystalline semiconductor layer disposed over the silicon substrate, wherein the first monocrystalline semiconductor layer has a lattice constant different from a lattice constant of relaxed silicon. The structure also includes an insulating layer disposed over the first monocrystalline semiconductor layer in a first region and a monocrystalline silicon layer disposed over the insulating layer in the first region. The structure includes at least one silicon-based electronic device comprising an element including at least a portion of the monocrystalline silicon layer.
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: February 21, 2012
    Assignee: Massachusetts Institute of Technology
    Inventor: Eugene A. Fitzgerald
  • Patent number: 8084284
    Abstract: A complementary metal oxide semiconductor (CMOS) device and a method for fabricating the same are provided. The CMOS image sensor includes: a first conductive type substrate including a trench; a channel stop layer formed by using a first conductive type epitaxial layer over an inner surface of the trench; a device isolation layer formed on the channel stop layer to fill the trench; a second conductive type photodiode formed in a portion of the substrate in one side of the channel stop layer; and a transfer gate structure formed on the substrate adjacent to the photodiode to transfer photo-electrons generated from the photodiode.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: December 27, 2011
    Assignee: Intellectual Ventures II LLC
    Inventor: Sang-Young Kim
  • Patent number: 8048705
    Abstract: A method of forming a CMOS image sensor device, the method includes providing a semiconductor substrate having a P-type impurity characteristic including a surface region. The method forma first thickness of silicon dioxide in a first region of the surface region, a second thickness of silicon dioxide in a second region of the surface region, and a third thickness of silicon dioxide in a third region of the surface region. The method includes forming a first gate layer overlying the second region and a second gate layer overlying the third region, while exposing a portion of the first thickness of silicon dioxide. An N-type impurity characteristic is formed within a region within a vicinity underlying the first thickness of silicon dioxide in the first region of the surface region to cause formation of a photo diode device characterized by the N-type impurity region and the P-type substrate.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: November 1, 2011
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Jieguang Huo, Jianping Yang
  • Patent number: 8048710
    Abstract: A photoelectric conversion device according to the present invention has a plurality of photoreceiving portions provided in a substrate, an interlayer film overlying the photoreceiving portion, a large refractive index region which is provided so as to correspond to the photoreceiving portion and has a higher refractive index than the interlayer film, and a layer which is provided in between the photoreceiving portion and the large refractive index region, and has a lower etching rate than the interlayer film, wherein the layer of the lower etching rate is formed so as to cover at least the whole surface of the photoreceiving portion. In addition, the layer of the lower etching rate has a refractive index in between the refractive indices of the large refractive index region and the substrate. Such a configuration can provide the photoelectric conversion device which inhibits the lowering of the sensitivity and the variation of the sensitivity among picture elements.
    Type: Grant
    Filed: September 22, 2008
    Date of Patent: November 1, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventor: Sakae Hashimoto
  • Patent number: 7999259
    Abstract: A display includes: a substrate having a pixel region and a sensor region in which photo-sensor parts are formed; an illuminating section operative to illuminate the substrate from one surface side of the substrate; a thin film photodiode disposed in the sensor region, having at least a P-type semiconductor region and an N-type semiconductor region, and operative to receive light incident from the other surface side of the substrate; and a metallic film formed on the one surface side of the substrate so as to face the thin film photodiode through an insulator film, operative to restrain light generated from the illuminating section from being directly incident on the thin film photodiode from the one surface side, and fixed to a predetermined potential, wherein in the thin film photodiode, the width of the P-type semiconductor region and the width of the N-type semiconductor region are different from each other.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: August 16, 2011
    Assignee: Sony Corporation
    Inventors: Masanobu Ikeda, Ryoichi Ito, Daisuke Takama, Kenta Seki, Natsuki Otani
  • Patent number: 7943962
    Abstract: A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region.
    Type: Grant
    Filed: December 2, 2009
    Date of Patent: May 17, 2011
    Assignee: Sony Corporation
    Inventors: Keiji Tatani, Hideshi Abe, Masanori Ohashi, Atsushi Masagaki, Atsuhiko Yamamoto, Masakazu Furukawa
  • Patent number: 7928484
    Abstract: A pixel of an image sensor, the pixel includes a floating diffusion node to sense photo-generated charge, a reset diode to reset the floating diffusion node in response to a reset signal, and a set diode to set the floating diffusion node.
    Type: Grant
    Filed: May 13, 2008
    Date of Patent: April 19, 2011
    Assignee: Crosstek Capital, LLC
    Inventor: Jaroslav Hynecek
  • Patent number: 7898000
    Abstract: A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: March 1, 2011
    Assignee: Sony Corporation
    Inventors: Keiji Tatani, Hideshi Abe, Masanori Ohashi, Atsushi Masagaki, Atsuhiko Yamamoto, Masakazu Furukawa
  • Patent number: 7898001
    Abstract: A semiconductor device includes a semiconductor substrate, a photon avalanche detector in the semiconductor substrate. The photon avalanche detector includes an anode of a first conductivity type and a cathode of a second conductivity type. A guard ring is in the semiconductor substrate and at least partially surrounds the photon avalanche detector. A passivation layer of the first conductivity type is in contact with the guard ring to reduce an electric field at an edge of the photon avalanche detector.
    Type: Grant
    Filed: December 3, 2008
    Date of Patent: March 1, 2011
    Assignees: STMicroelectronics (Research & Development) Limited, The University Court of the University of Edinburgh, Ecole Polytechnique Federale De Lausanne
    Inventors: Justin Richardson, Lindsay Grant, Marek Gersbach, Edoardo Charbon, Cristiano Niclass, Robert Henderson
  • Patent number: 7893452
    Abstract: Optoelectronic components with a semiconductor chip, which is suitable for emitting primary electromagnetic radiation, a basic package body, which has a recess for receiving the semiconductor chip and electrical leads for the external electrical connection of the semiconductor chip and a chip encapsulating eclement, which encloses the semiconductor chip in the recess. The basic package body is at least partly optically transmissive at least for part of the primary radiation and an optical axis of the semiconductor chip runs through the basic package body The basic package body comprises a luminescence conversion material, which is suitable for converting at least part of the primary radiation into secondary radiation with wavelengths that are at least partly changed in comparison with the primary radiation.
    Type: Grant
    Filed: September 28, 2005
    Date of Patent: February 22, 2011
    Assignee: Osram Opto Semiconductors GmbH
    Inventor: Volker Härle
  • Patent number: 7884391
    Abstract: Embodiments relate to an image sensor. According to embodiments, an image sensor may include a metal interconnection, readout circuitry, a first substrate, a metal layer, and an image sensing device. The metal interconnection and the readout circuitry may be formed on and/or over the first substrate. The image sensing device may include a first conduction type conduction layer and a second conduction type conduction layer and may be electrically connected to the metal layer. According to embodiments, an electric field may not be generated on and/or over an Si surface. This may contribute to a reduction in a dark current of a 3D integrated CMOS image sensor.
    Type: Grant
    Filed: December 28, 2008
    Date of Patent: February 8, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Joon Hwang
  • Patent number: 7884392
    Abstract: One embodiment exemplarily described herein can be characterized as an image sensor including a substrate having a front surface and a rear surface; a photoelectric converting portion on the front surface of the substrate; a through via extending through the substrate, wherein the through via is electrically connected to the photoelectric converting portion; an external connection terminal on the rear surface of the substrate, wherein the external connection terminal is connected to the through via; and a light shading layer formed on a portion of the rear surface of the substrate, wherein the light shading layer is substantially opaque with respect to an external light. In some embodiments, the portion of the rear surface of the substrate on which the light shading layer is formed is not overlapped by the through via or the external connection terminal.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: February 8, 2011
    Inventors: Hyuek-Jae Lee, Tae-Je Cho, Yong-Hwan Kwon, Un-Byoung Kang, Chung-Sun Lee, Woon-Seong Kwon, Hyung-Sun Jang
  • Patent number: 7880179
    Abstract: A process for producing electrical contact connections for a component integrated in a substrate material is provided, the substrate material having a first surface region, and at least one terminal contact being arranged at least partially in the first surface region for each component, which is distinguished in particular by application of a covering to the first surface region and production of at least one contact passage which, in the substrate material, runs transversely with respect to the first surface region, in which process, in order to form at least one contact location in a second surface region which is to be provided, at least one electrical contact connection from the contact location to at least one of the terminal contacts is produced via the respective contact passages.
    Type: Grant
    Filed: November 20, 2009
    Date of Patent: February 1, 2011
    Assignee: Wafer-Level Packaging Portfolio LLC
    Inventors: Dipl.-Ing. Florian Bieck, Jürgen Leib
  • Patent number: 7875917
    Abstract: An image sensor and a method for manufacturing the same are provided. In the image sensor, a semiconductor substrate has a pixel region and a peripheral region defined by a first device isolation layer. First and second photodiode patterns are formed on the pixel region and are connected to lower metal lines to first and second readout circuitries. The first photodiode pattern performs as an active photodiode and the second photodiode pattern functions as a dummy pixel. The dummy pixel can measure leakage current.
    Type: Grant
    Filed: December 2, 2008
    Date of Patent: January 25, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Jong Man Kim
  • Patent number: 7875916
    Abstract: An image sensor with an image area having a plurality of photodetectors of a first conductivity type includes a substrate of the second conductivity type; a first layer of the first conductivity type spanning the image area; a second layer of the second conductivity type; wherein the first layer is between the substrate and the second layer, and the plurality of photodetectors is disposed in the second layer and abut the first layer.
    Type: Grant
    Filed: June 15, 2006
    Date of Patent: January 25, 2011
    Assignee: Eastman Kodak Company
    Inventors: Eric G. Stevens, David N. Nichols
  • Patent number: 7875949
    Abstract: An image sensor device is disclosed. The image sensor device comprises a substrate having a pixel region and at least one integrated circuit in the substrate of the pixel region. A photodiode is disposed on the substrate of the pixel region, comprising a lower electrode, a transparent upper electrode and a photoelectric conversion layer. The lower electrode is disposed on the substrate and is electrically connected to the integrated circuit. The photoelectric conversion layer is disposed on the lower electrode and has a submicron structure therein. The transparent upper electrode is disposed on the photoelectric conversion layer.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: January 25, 2011
    Assignee: VisEra Technologies Company Limited
    Inventor: Hsiao-Wen Lee
  • Patent number: 7872284
    Abstract: An imager having a pixel cell having an associated strained silicon layer. The strained silicon layer increases charge transfer efficiency, decreases image lag, and improves blue response in imaging devices.
    Type: Grant
    Filed: December 29, 2008
    Date of Patent: January 18, 2011
    Assignee: Micron Technology, Inc.
    Inventor: Chandra Mouli
  • Patent number: 7816161
    Abstract: An organic electroluminescent device includes: a switching element and a driving element connected to each other on a substrate including a pixel region; a planarization layer on the switching element and the driving element, the planarization layer having a substantially flat top surface; a cathode on the planarization layer, the cathode connected to the driving element; an emitting layer on the cathode; and an anode on the emitting layer.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: October 19, 2010
    Assignee: LG Display Co., Ltd.
    Inventors: Jae-Hee Park, Kyung-Min Park, Seok-Jong Lee
  • Publication number: 20100230720
    Abstract: The present invention is directed to a semiconductor device that includes at least one p-n junction including a p-type material, an n-type material, and a depletion region. The at least one p-n junction is configured to generate bulk photocurrent in response to incident light. The at least one p-n junction is characterized by a conduction band energy level, a valence band energy level and a surface Fermi energy level. The surface Fermi energy level is pinned either near or above the conduction band energy level or near or below the valence band energy level. A unipolar barrier structure is disposed in a predetermined region within the at least one p-n junction.
    Type: Application
    Filed: February 16, 2010
    Publication date: September 16, 2010
    Applicant: UNIVERSITY OF ROCHESTER
    Inventor: Gary W. Wicks
  • Patent number: 7795069
    Abstract: An image sensor includes a lower metal interconnection, an interlayer dielectric, a first substrate, a photodiode, an upper electrode and an amorphous silicon layer. The lower metal interconnection and the interlayer dielectric are formed over the first substrate including a pixel region and a peripheral region. The photodiode is formed over the pixel region of the first substrate. The upper electrode layer is connected to the photodiode. The amorphous silicon layer is formed between the photodiode and the interlayer dielectric.
    Type: Grant
    Filed: December 27, 2008
    Date of Patent: September 14, 2010
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Sung-Ho Jun
  • Patent number: 7781798
    Abstract: Disclosed herein is a solid-state image pickup device, including, a light receiving pixel section, a black level reference pixel section, a multi-layer wiring line section, a first light blocking film, a second light blocking film, a third light blocking film, and a fourth light blocking layer.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: August 24, 2010
    Assignee: Sony Corporation
    Inventors: Yusaku Kobayashi, Koji Watanabe, Toshihiko Hayashi
  • Patent number: 7723815
    Abstract: A wafer bonded composite structure is provided for matching a coefficient of thermal expansion of a first semiconductor chip to a coefficient of thermal expansion of a second semiconductor chip in order to provide a thermally matched hybridized semiconductor chip assembly. The wafer bonded composite structure includes a first semiconductor chip having a top and a bottom surface. The first semiconductor chip has a coefficient of thermal expansion which is less than the coefficient of thermal expansion of the second semiconductor chip. Preferably, the first semiconductor chip is an readout integrated circuit (ROIC) and the second semiconductor chip is an infrared detector chip. Further, the wafer bonded composite structure also includes a substrate wafer bonded to a bottom surface of the first semiconductor chip to form the wafer bonded composite structure itself.
    Type: Grant
    Filed: July 9, 2004
    Date of Patent: May 25, 2010
    Assignee: Raytheon Company
    Inventors: Jeffrey M Peterson, Eric F Schulte
  • Patent number: 7723206
    Abstract: A photodiode in which increased sensitivity and speed are balanced. The photodiode includes: a semiconductor substrate; a plurality of active regions formed on the substrate by selective epitaxial growth; and a comb electrode provided for each of the plurality of active regions and in communication with each other to electrically connect the active regions together.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: May 25, 2010
    Assignees: FUJIFILM Corporation, Massachusetts Institute of Technology
    Inventors: Yukiya Miyachi, Wojciech P. Giziewicz, Jurgen Michel, Lionel C. Kimerling
  • Patent number: 7719028
    Abstract: A semiconductor light-receiving device and its manufacturing method are provided which are capable of suppressing dark current and deterioration. Semiconductor crystals were sequentially grown over an n-type InP substrate, including an n-type InP buffer layer, an undoped GaInAs light absorption layer, an undoped InP diffusion buffer layer, and a p-type InP window layer. Next, a first mesa was formed by removing a part from the p-type InP window layer to the n-type InP buffer layer with a Br-based etchant having low etching selectivity, so as to form a sloped “normal” mesa structure. Next, a second mesa having a smaller diameter than the first mesa was formed by dry etching, by precisely removing a part from the p-type InP window layer to a certain mid position of the undoped InP diffusion buffer layer.
    Type: Grant
    Filed: April 15, 2008
    Date of Patent: May 18, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Eiji Yagyu, Eitaro Ishimura, Masaharu Nakaji
  • Patent number: 7705370
    Abstract: Methods and structures for monolithically integrating monocrystalline silicon and monocrystalline non-silicon materials and devices are provided. In one structure, a monolithically integrated semiconductor device structure comprises a silicon substrate and a first monocrystalline semiconductor layer disposed over the silicon substrate, wherein the first monocrystalline semiconductor layer has a lattice constant different from a lattice constant of relaxed silicon. The structure further includes an insulating layer disposed over the first monocrystalline semiconductor layer in a first region and a monocrystalline silicon layer disposed over the insulating layer in the first region. The structure includes at least one silicon-based photodetector comprising an active region including at least a portion of the monocrystalline silicon layer.
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: April 27, 2010
    Assignee: Massachusetts Institute of Technology
    Inventor: Eugene A. Fitzgerald