For Device Having Potential Or Surface Barrier (e.g., Phototransistor) (epo) Patents (Class 257/E31.053)

  • Patent number: 8963274
    Abstract: A low noise infrared photo detector with a vertically integrated field effect transistor (FET) structure is formed without thermal diffusion. The FET structure includes a high sensitivity photo detector layer, a charge well layer, a transfer well layer, a charge transfer gate, and a drain electrode. In an embodiment, the photo detector layer and charge well are InGaAs and the other layers are InP layers.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: February 24, 2015
    Assignee: Sensors Unlimited, Inc.
    Inventor: Peter Dixon
  • Patent number: 8957357
    Abstract: A solid-state imaging device includes plural photodiodes which are formed in a photodiode area of a unit pixel with no element separating area interposed therebetween and in which impurity concentrations of pn junction areas are different from each other.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: February 17, 2015
    Assignee: Sony Corporation
    Inventor: Kazuichiro Itonaga
  • Patent number: 8841714
    Abstract: A solid state imaging device 1 is provided with a photoelectric conversion portion 2 having a plurality of photosensitive regions 7, and a potential gradient forming portion 3 having an electroconductive member 8 arranged opposite to the photosensitive regions 7. A planar shape of each photosensitive region 7 is a substantially rectangular shape. The photosensitive regions 7 are juxtaposed in a first direction intersecting with the long sides. The potential gradient forming portion 3 forms a potential gradient becoming higher along a second direction from one of the short sides to the other of the short sides of the photosensitive regions 7. The electroconductive member 8 includes a first region 8a extending in the second direction and having a first electric resistivity, and a second region 8b extending in the second direction and having a second electric resistivity smaller than the first electric resistivity.
    Type: Grant
    Filed: November 11, 2011
    Date of Patent: September 23, 2014
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Tomohiro Ikeya, Yasuhito Yoneta, Hisanori Suzuki, Masaharu Muramatsu
  • Patent number: 8779481
    Abstract: A method of manufacturing a CMOS image sensor is disclosed. A silicon-on-insulator substrate is provided, which includes providing a silicon-on-insulator substrate including a mechanical substrate, an insulator layer substantially overlying the mechanical substrate, and a seed layer substantially overlying the insulator layer. A semiconductor substrate is epitaxially grown substantially overlying the seed layer. The mechanical substrate and at least a portion of the insulator layer are removed. An ultrathin oxide later is formed substantially underlying the semiconductor substrate. A mono layer of metal is formed substantially underlying the ultrathin oxide layer.
    Type: Grant
    Filed: January 24, 2013
    Date of Patent: July 15, 2014
    Assignee: SRI International
    Inventor: James Robert Janesick
  • Patent number: 8753917
    Abstract: A design structure embodied in a machine readable medium used in a design process includes a first dielectric layer disposed on an intermediary layer, a first conductive pad portion and a first interconnect portion disposed on the first dielectric layer, a second dielectric layer disposed on the first dielectric layer, a first capping layer disposed on the first interconnect portion and a portion of the first conductive pad portion, a second capping layer disposed on the first capping layer and a portion of the second dielectric layer, an n-type doped silicon layer disposed on the second capping layer and the first conductive pad portion, an intrinsic silicon layer disposed on the n-type doped silicon layer, and a p-type doped silicon layer disposed on the intrinsic silicon layer.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: June 17, 2014
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey P. Gambino, Robert K. Leidy, Richard J. Rassel
  • Patent number: 8716771
    Abstract: Optical structures having an array of protuberances between two layers having different refractive indices are provided. The array of protuberances has vertical and lateral dimensions less than the wavelength range of lights detectable by a photodiode of a CMOS image sensor. The array of protuberances provides high transmission of light with little reflection. The array of protuberances may be provided over a photodiode, in a back-end-of-line interconnect structure, over a lens for a photodiode, on a backside of a photodiode, or on a window of a chip package.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: May 6, 2014
    Assignee: International Business Machines Corporation
    Inventors: James W. Adkisson, John J. Ellis-Monaghan, Jeffrey P. Gambino, Charles F. Musante
  • Patent number: 8704321
    Abstract: Solid-state imaging device of the present invention is a backside-illumination-type solid-state imaging device including wiring layer formed on first surface side of semiconductor substrate; and light receiving section that photoelectrically converts light incident from second surface side that is opposite from first surface side, wherein spontaneous polarization film formed of a material having spontaneous polarization is formed on a light receiving surface of light receiving section. Accordingly, a hole accumulation layer can be formed on the light receiving surface of light receiving section, and a dark current can be suppressed.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: April 22, 2014
    Assignee: Panasonic Corporation
    Inventors: Toru Okino, Yoshihisa Kato, Yutaka Hirose, Mitsuyoshi Mori
  • Patent number: 8698207
    Abstract: The instant disclosure describes a photodetector that includes at least one portion of a semiconducting layer formed directly on at least a portion of a reflective layer and to be illuminated with a light beam, at least one pad being formed on the portion of the semiconducting layer opposite the reflective layer portion, wherein the pad and the reflective layer portion are made of a metal or of a negative permittivity material, the optical cavity formed between said at least one reflective layer portion and said at least one pad has a thickness strictly lower than a quarter of the ratio of the light beam wavelength to the optical index of the semiconducting layer, and typically representing about one tenth of said ratio.
    Type: Grant
    Filed: December 14, 2009
    Date of Patent: April 15, 2014
    Assignee: Commissariat a l'Energie Atomique et Aux Energies Alternatives
    Inventors: Jérôme Le Perchec, Yohan Desieres
  • Patent number: 8685803
    Abstract: A semiconductor device includes: a thin film transistor having a gate line (3a), a first insulating film (5), an island-shaped oxide semiconductor layer (7a), a second insulating film (9), a source line (13as), a drain electrode (13ad), and a passivation film; and a terminal portion having a first connecting portion (3c) made of the same conductive film as the gate line, a second connecting portion (13c) made of the same conductive film as the source line and the drain electrode, and a third connecting portion (19c) formed on the second connecting portion.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: April 1, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshimasa Chikama, Hirohiko Nishiki, Yoshifumi Ohta, Takeshi Hara, Tetsuya Aita, Masahiko Suzuki, Michiko Takei, Okifumi Nakagawa, Yoshiyuki Harumoto, Hinae Mizuno
  • Publication number: 20140061737
    Abstract: A system and method for isolating semiconductor devices is provided. An embodiment comprises an isolation region that is laterally removed from source/drain regions of semiconductor devices and has a dielectric material extending over the isolation implant between the source/drain regions. The isolation region may be formed by forming an opening through a layer over the substrate, depositing a dielectric material along the sidewalls of the opening, implanting ions into the substrate after the deposition, and filling the opening with another dielectric material.
    Type: Application
    Filed: August 29, 2012
    Publication date: March 6, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wen-I Hsu, Min-Feng Kao, Jen-Cheng Liu, Dun-Nian Yaung, Tzu-Hsuan Hsu, Wen-De Wang
  • Patent number: 8664662
    Abstract: A thin-film transistor array includes first and second bottom-gate transistors, a passivation film, a conductive oxide film below the passivation film, and a relay electrode between a first conductive material in a same layer as a first electrode of the first transistor and a second conductive material in an electroluminescence layer. A first line is in a layer lower than the passivation film and a second line is above the passivation film. A terminal to which an external signal is input is provided in a periphery of the substrate in the same layer as the first electrode. The conductive oxide film covers an upper surface of the terminal and is between the relay electrode and the first conductive material. The relay electrode is formed in a same layer and comprises a same material as the second line.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: March 4, 2014
    Assignees: Panasonic Corporation, Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Shinya Ono, Arinobu Kanegae, Genshirou Kawachi
  • Patent number: 8664739
    Abstract: In accordance with the invention, an improved image sensor includes an array of germanium photosensitive elements integrated with a silicon substrate and integrated with silicon readout circuits. The silicon transistors are formed first on a silicon substrate, using well known silicon wafer fabrication techniques. The germanium elements are subsequently formed overlying the silicon by epitaxial growth. The germanium elements are advantageously grown within surface openings of a dielectric cladding. Wafer fabrication techniques are applied to the elements to form isolated germanium photodiodes. Since temperatures needed for germanium processing are lower than those for silicon processing, the formation of the germanium devices need not affect the previously formed silicon devices. Insulating and metallic layers are then deposited and patterned to interconnect the silicon devices and to connect the germanium devices to the silicon circuits.
    Type: Grant
    Filed: May 26, 2011
    Date of Patent: March 4, 2014
    Assignee: Infrared Newco, Inc.
    Inventors: Clifford A. King, Conor S. Rafferty
  • Patent number: 8659107
    Abstract: A radiation receiver has a semiconductor body including a first active region and a second active region, which are provided in each case for detecting radiation. The first active region and the second active region are spaced vertically from one another. A tunnel region is arranged between the first active region and the second active region. The tunnel region is connected electrically conductively with a land, which is provided between the first active region and the second active region for external electrical contacting of the semiconductor body. A method of producing a radiation receiver is additionally indicated.
    Type: Grant
    Filed: December 17, 2008
    Date of Patent: February 25, 2014
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Rainer Butendeich, Reiner Windisch
  • Patent number: 8610179
    Abstract: An amorphous-silicon thin film transistor and a shift resister shift resister having the amorphous-silicon TFT include a first conductive region, a second conductive region and a third conductive region. The first conductive region is formed on a first plane spaced apart from a substrate by a first distance. The second conductive region is formed on a second plane spaced apart from the substrate by a second distance. The second conductive region includes a body conductive region and two hand conductive regions elongated from both ends of the body conductive region to form an U-shape. The third conductive region is formed on the second plane. The third conductive region includes an elongated portion. The elongated portion is disposed between the two hand conductive regions of the second conductive region. The amorphous-silicon TFT and the shift resister having the amorphous TFT reduce a parasitic capacitance between the gate electrode and drain electrode.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: December 17, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Seung-Hwan Moon, Back-Won Lee
  • Publication number: 20130312816
    Abstract: Disclosed is a tandem type integrated photovoltaic module. The tandem type integrated photovoltaic module includes a first cell and a second cell, all of which are formed respectively by stacking on a substrate a lower electrode, a photoelectric conversion layer and an upper electrode, wherein the photoelectric conversion layer comprises a first unit cell layer, a second unit cell layer and an intermediate reflector located between the first unit cell layer and the second unit cell layer; wherein the lower electrode of the first cell and the lower electrode of the second cell are separated by a lower electrode separation groove, and wherein a plurality of through holes are formed to be spaced from each other in the photoelectric conversion layer on the lower electrode of the first cell in order to connect the upper electrode of the second cell with the lower electrode of the first cell.
    Type: Application
    Filed: May 22, 2012
    Publication date: November 28, 2013
    Inventors: La-Sun Jeon, Seung-Yeop Myong
  • Patent number: 8546901
    Abstract: A high sensitivity image sensor including a pixel, the pixel including a single electron field effect transistor (SEFET), the SEFET including a first conductive type well in a second conductive type substrate, second conductive type source and drain regions in the well and a first conductive type gate region in the well between the source and the drain regions.
    Type: Grant
    Filed: April 12, 2010
    Date of Patent: October 1, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eric R. Fossum, Dae-Kil Cha, Young-Gu Jin, Yoon-Dong Park, Soo-Jung Hwang
  • Patent number: 8476730
    Abstract: An embodiment of a Geiger-mode avalanche photodiode, having: a body made of semiconductor material of a first type of conductivity, provided with a first surface and a second surface and forming a cathode region; and an anode region of a second type of conductivity, extending inside the body on top of the cathode region and facing the first surface. The photodiode moreover has: a buried region of the second type of conductivity, extending inside the body and surrounding an internal region of the body, which extends underneath the anode region and includes the internal region and defines a vertical quenching resistor; a sinker region extending through the body starting from the first surface and in direct contact with the buried region; and a contact region made of conductive material, overlying the first surface and in direct contact with the sinker region.
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: July 2, 2013
    Assignee: STMicroelectronics S.r.l.
    Inventors: Delfo Nunziato Sanfilippo, Massimo Cataldo Mazzillo, Piero Giorgio Fallica
  • Patent number: 8476102
    Abstract: A method for manufacturing a solid state image pickup device including a first active region provided with a first conversion unit, a second active region provided with a second conversion unit, and a third active region adjoining the first and the second active regions with a field region therebetween and being provided with a pixel transistor, the method including the steps of ion-implanting first conductivity type impurity ions to form a semiconductor region serving as a potential barrier against the signal carriers at a predetermined depth in the third active region and ion-implanting second conductivity type impurity ions into the third active region with energy lower than the above-described ion-implantation energy.
    Type: Grant
    Filed: February 16, 2011
    Date of Patent: July 2, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideaki Takada, Toru Koizumi, Yasuo Yamazaki, Tatsuya Ryoki
  • Patent number: 8466499
    Abstract: In a rear surface incidence type CMOS image sensor having a wiring layer 720 on a first surface (front surface) of an epitaxial substrate 710 in which a photodiode, a reading circuit (an n-type region 750 and an n+ type region 760) and the like are disposed, and a light receiving plane in a second surface (rear surface), the photodiode and a P-type well region 740 on the periphery of the photodiode are disposed in a layer structure that does not reach the rear surface (light receiving surface) of the substrate, and an electric field is formed within the substrate 710 to properly lead electrons entering from the rear surface (light receiving surface) of the substrate to the photodiode. The electric field is realized by providing a concentration gradient in a direction of depth of the epitaxial substrate 710. Alternatively, the electric field can be realized by providing a rear-surface electrode 810 or 840 for sending a current.
    Type: Grant
    Filed: July 8, 2011
    Date of Patent: June 18, 2013
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 8461635
    Abstract: The invention relates to a DEPFET transistor (1) for detecting a radio-generated signal charge (2) and for generating an electronic output signal in a manner dependent on the detected signal charge (2) according to a predetermined characteristic curve. The invention provides for the characteristic curve to have a degressive characteristic curve profile in order to combine a high measurement sensitivity in the case of small signal charges (2) with a large measurement range through to large signal charges (2).
    Type: Grant
    Filed: October 8, 2008
    Date of Patent: June 11, 2013
    Assignee: Max-Planck-Gesellschaft zur Foerderung der Wissenschaften e.V.
    Inventors: Lothar Strueder, Gerhard Lutz
  • Publication number: 20130112256
    Abstract: A photovoltaic device operable to convert light to electricity, comprising a substrate, one or more structures essentially perpendicular to the substrate, and a wavelength-selective layer disposed on the substrate, wherein the structures comprise a crystalline semiconductor material.
    Type: Application
    Filed: November 3, 2011
    Publication date: May 9, 2013
    Inventors: Young-June YU, Munib WOBER
  • Patent number: 8436443
    Abstract: A backside illuminated image sensor is provided which includes a substrate having a front side and a backside, a sensor formed in the substrate at the front side, the sensor including at least a photodiode, and a depletion region formed in the substrate at the backside, a depth of the depletion region is less than 20% of a thickness of the substrate.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: May 7, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Hsuan Hsu, Han-Chi Liu, Ching-Chun Wang
  • Publication number: 20130061926
    Abstract: Provided is a solar cell element comprising a semiconductor substrate which has a p-type semiconductor region, wherein one or more surface layer-internal regions which have Si—O bonds are formed in the surface layer part of the p-type semiconductor region and a passivation layer is formed on the surface layer-internal regions. Also provided is a solar cell module comprising the solar cell element. A method for producing a solar cell element is further provided, said method comprising: a substrate preparation step for preparing a semiconductor substrate which has a p-type semiconductor region; a surface treatment step for exposing the surface of the p-type semiconductor region to plasma produced using an oxygen-containing gas, and forming surface layer-internal regions which have Si—O bonds in the surface layer part of the p-type semiconductor region; and a layer formation process for forming a passivation layer on the surface layer-internal regions.
    Type: Application
    Filed: May 20, 2011
    Publication date: March 14, 2013
    Applicant: KYOCERA CORPORATION
    Inventors: Manabu Komoda, Kazuaki Iwameji, Kazuyoshi Fujimoto
  • Patent number: 8389319
    Abstract: A method of manufacturing a CMOS image sensor is disclosed. A silicon-on-insulator substrate is provided, which includes providing a silicon-on-insulator substrate including a mechanical substrate, an insulator layer substantially overlying the mechanical substrate, and a seed layer substantially overlying the insulator layer. A semiconductor substrate is epitaxially grown substantially overlying the seed layer. The mechanical substrate and at least a portion of the insulator layer are removed. An ultrathin oxide layer is formed substantially underlying the semiconductor substrate. A mono layer of metal is formed substantially underlying the ultrathin oxide layer.
    Type: Grant
    Filed: July 27, 2010
    Date of Patent: March 5, 2013
    Assignee: SRI International
    Inventor: James Robert Janesick
  • Publication number: 20130050552
    Abstract: A solid-state imaging apparatus includes: photoelectric conversion sections that generate signal charge corresponding to an amount of received light; and a plurality of pixel transistors that read the signal charge generated in the photoelectric conversion sections, and include amplification transistors each being formed of an amplification gate electrode which is formed on a substrate, a high-concentration impurity region which is formed in a substrate region on a drain side of the amplification gate electrode, and a low-concentration impurity region which is formed to have an impurity concentration lower than that of the high-concentration impurity region and is formed on a substrate region on a source side of the amplification gate electrode.
    Type: Application
    Filed: August 3, 2012
    Publication date: February 28, 2013
    Applicant: Sony Corporation
    Inventor: Tetsuya Oishi
  • Patent number: 8384178
    Abstract: In a rear surface incidence type CMOS image sensor having a wiring layer 720 on a first surface (front surface) of an epitaxial substrate 710 in which a photodiode, a reading circuit (an n-type region 750 and an n+ type region 760) and the like are disposed, and a light receiving plane in a second surface (rear surface), the photodiode and a P-type well region 740 on the periphery of the photodiode are disposed in a layer structure that does not reach the rear surface (light receiving surface) of the substrate, and an electric field is formed within the substrate 710 to properly lead electrons entering from the rear surface (light receiving surface) of the substrate to the photodiode. The electric field is realized by providing a concentration gradient in a direction of depth of the epitaxial substrate 710. Alternatively, the electric field can be realized by providing a rear-surface electrode 810 or 840 for sending a current.
    Type: Grant
    Filed: April 20, 2010
    Date of Patent: February 26, 2013
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 8368122
    Abstract: A multiple-junction photoelectric device includes a substrate with a first conducting layer thereon, at least two elementary photoelectric devices of p-i-n or p-n configuration, with a second conducting layer thereon, and at least one intermediate layer between two adjacent elementary photoelectric devices. The intermediate layer has, on the incoming light side, opposite top and bottom faces, the top and bottom faces having respectively a surface morphology including inclined elementary surfaces so ?90bottom is smaller than ?90top by at least 3°, preferably 6°, more preferably 10°, and even more preferably 15°; where ?90top is the angle for which 90% of the elementary surfaces of the top face of the intermediate layer have an inclination equal to or less than this angle, and ?90bottom is the angle for which 90% of the elementary surfaces of the bottom face of the intermediate layer have an inclination equal to or less than this angle.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: February 5, 2013
    Assignee: Universite de Neuchatel
    Inventors: Didier Domine, Peter Cuony, Julien Bailat
  • Patent number: 8368164
    Abstract: A phototransistor used for an image sensor is provided. The phototransistor can reduce a dark current that occurs in the phototransistor and improve sensitivity at low luminance without crosstalk with a neighboring pixel or an image lag by including a buried collector. In the phototransistor including the buried collector, since the collector is not directly connected to outside, the phototransistor has a low dark current and a high photosensitive characteristic at low luminance. Since each image sensor is isolated, crosstalk between pixels or an image lag does not occur.
    Type: Grant
    Filed: May 7, 2008
    Date of Patent: February 5, 2013
    Assignee: Siliconfile Technologies Inc.
    Inventor: Byoung-Su Lee
  • Patent number: 8350302
    Abstract: An organic light emitting display apparatus is disclosed. The organic light emitting display apparatus includes: a substrate, a seal facing the substrate, bonded to the substrate, a display area disposed on the substrate configured to produce an image, a pad area disposed on the substrate, present on at least one side of the display area, an insulating layer directly extending from the display area, formed on the pad area, a first adhesive layer surrounding the display area, which bonds the substrate to the seal, and comprising an organic material, and a second adhesive layer insulated from the pad area by the insulating layer, disposed outside the first adhesive layer, which bonds the substrate to the seal.
    Type: Grant
    Filed: November 1, 2010
    Date of Patent: January 8, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sun-Young Lee, Jong-Hyuk Lee, Yoon-Hyeung Cho, Min-Ho Oh, Byoung-Duk Lee, So-Young Lee
  • Publication number: 20130002918
    Abstract: A solid-state imaging apparatus includes a transfer gate electrode formed on a semiconductor substrate; a photoelectric conversion unit including an electric charge storage area that is formed from a surface side of the semiconductor substrate in a depth direction, a transfer auxiliary area formed of a second conductive type impurity area that is formed in such a manner as to partially overlap the transfer gate electrode, and a dark current suppression area that is a first dark current suppression area formed in an upper layer of the transfer auxiliary and formed so as to have positional alignment in such a manner that the end portion of the transfer auxiliary area on the transfer gate electrode side is at the same position as the end portion of the transfer auxiliary area; and a signal processing circuit configured to process an output signal output from the solid-state imaging apparatus.
    Type: Application
    Filed: June 20, 2012
    Publication date: January 3, 2013
    Applicant: SONY CORPORATION
    Inventors: Mikiko Kobayashi, Sanghoon Ha
  • Patent number: 8319262
    Abstract: A CMOS image sensor is disclosed. The CMOS imager includes a lightly doped semiconductor substrate of a first conductivity type. At least one CMOS pixel of a second conductivity type is formed in the semiconductor substrate. The semiconductor substrate is configured to receive a bias voltage applied for substantially depleting the semiconductor substrate and for forming a depletion edge within the semiconductor substrate. A well of the second conductivity type substantially surrounds the at least one CMOS pixel to form a depletion region about the at least one CMOS pixel operable to form a minimum predetermined barrier to the depletion edge within the semiconductor substrate to pinch off substrate bias in proximity to the return contact.
    Type: Grant
    Filed: July 27, 2010
    Date of Patent: November 27, 2012
    Assignee: SRI International
    Inventor: James Robert Janesick
  • Patent number: 8299484
    Abstract: An optoelectronic semiconductor chip including a radiation passage area, where a contact metallization is applied to the radiation passage area, and a first reflective layer sequence is applied to that surface of the contact metallization which is remote from the radiation passage area, and an optoelectronic component that includes such a chip.
    Type: Grant
    Filed: June 23, 2008
    Date of Patent: October 30, 2012
    Assignee: Osram Opto Semiconductors GmbH
    Inventors: Stefan Grötsch, Norbert Linder
  • Patent number: 8294234
    Abstract: A mesa photodiode which includes a mesa, the sidewall of the mesa is a surface that is inclined in the direction in which the bottom of the mesa becomes wider. At least the sidewall of the mesa is covered with a semiconductor layer of a first conductivity type, a second conductivity type, a semi-insulating type, or an undoped type. The semiconductor layer is grown on at least the sidewall of the mesa. The inclined angle of the inclined surface of the mesa at the upper end portion is smaller than the inclined angle of the inclined surface of the mesa at the lower end portion.
    Type: Grant
    Filed: April 20, 2010
    Date of Patent: October 23, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Isao Watanabe, Tomoaki Koi
  • Patent number: 8288212
    Abstract: A method of fabricating a pixel structure of a thin film transistor liquid crystal display is provided. A transparent conductive layer and a first metallic layer are sequentially formed over a substrate. The first metallic layer and the transparent conductive layer are patterned to form a gate pattern and a pixel electrode pattern. A gate insulating layer and a semiconductor layer are sequentially formed over the substrate. A patterning process is performed to remove the first metallic layer in the pixel electrode pattern while remaining the gate insulating layer and the semiconductor layer over the gate pattern. A second metallic layer is formed over the substrate. The second metallic layer is patterned to form a source/drain pattern over the semiconductor layer. A passivation layer is formed over the substrate and then the passivation layer is patterned to expose the transparent conductive layer in the pixel electrode pattern.
    Type: Grant
    Filed: March 15, 2011
    Date of Patent: October 16, 2012
    Assignee: Au Optronics Corporation
    Inventors: Mao-Tsun Huang, Tzufong Huang
  • Publication number: 20120235028
    Abstract: Apparatuses capable of and techniques for detecting the visible light spectrum are provided.
    Type: Application
    Filed: May 31, 2012
    Publication date: September 20, 2012
    Applicant: UNIVERSITY OF SEOUL INDUSTRY COOPERATION FOUNDATION
    Inventor: Doyeol AHN
  • Patent number: 8264013
    Abstract: A device separation insulating film and a device separation semiconductor layer are provided for a device separation section for separating adjacent devices from each other, end portions of the device separation insulating film and end portions of the device separation semiconductor layer are provided to overlap each other in order to surround two sides of an outer-periphery of the voltage conversion section and also to surround a channel section of the charge transfer device and the light receiving devices and an end portion of the device separation insulating film facing an end face of the light receiving device is arranged inwardly below a control electrode with respect to an end face of the control electrode on the light receiving device side.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: September 11, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Tomohiko Kawamura
  • Patent number: 8247854
    Abstract: Disclosed is a CMOS image sensor and a manufacturing method thereof. According to an aspect of the present invention, each pixel of CMOS image sensor includes a photo detector that includes an electon Collection layer doped with a concentration of 5×1015/cm3 to 2×1016/cm3; and a transfer transistor that is connected to the photo detector and is formed of a vertical type trench gate of which the equivalent oxide thickness is 120 ? or more.
    Type: Grant
    Filed: October 6, 2010
    Date of Patent: August 21, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventor: Jin Yeong Kang
  • Publication number: 20120168892
    Abstract: A lateral overflow drain and a channel stop are fabricated using a double mask process. Each lateral overflow drain is formed within a respective channel stop. Due to the use of two mask layers, one edge of each lateral overflow drain is aligned, or substantially aligned, with an edge of a respective channel stop.
    Type: Application
    Filed: March 8, 2012
    Publication date: July 5, 2012
    Inventors: Edmund K. Banghart, Eric G. Stevens, Hung Q. Doan
  • Patent number: 8207562
    Abstract: An image sensor can include a gate insulation layer, a gate electrode, a photodiode, and a floating diffusion region. The gate insulation layer can be formed on and/or over a semiconductor substrate for a transfer transistor. The gate insulation layer includes a first gate insulation layer having a central opening and a second gate insulation layer formed on and/or over an uppermost surface of the first gate insulation layer including the opening. The gate electrode can be formed on and/or over the gate insulation layer. The photodiode can be formed in the semiconductor substrate at one side of the gate electrode so as to generate an optical charge. The floating diffusion region can be formed in the semiconductor at the other side of the gate electrode opposite to the photodiode. The floating diffusion region can be electrically connected to the photodiode through a channel so as to store the optical charge generated from the photodiode.
    Type: Grant
    Filed: October 19, 2009
    Date of Patent: June 26, 2012
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Ji-Hoon Hong
  • Publication number: 20120154650
    Abstract: A solid-state image sensor includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type that is arranged to contact a lower face of the first semiconductor region and functions as a charge accumulation region, a third semiconductor region including side faces surrounded by the second semiconductor region, a fourth semiconductor region of the second conductivity type that is arranged apart from the second semiconductor region, and a transfer gate that forms a channel to transfer charges accumulated in the second semiconductor region to the fourth semiconductor region. The third semiconductor region is one of a semiconductor region of the first conductivity type and a semiconductor region of the second conductivity type whose impurity concentration is lower than that in the second semiconductor region.
    Type: Application
    Filed: November 30, 2011
    Publication date: June 21, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Mahito Shinohara
  • Patent number: 8168977
    Abstract: The present invention provides a thin film transistor having high performance in a liquid crystal display, and a manufacturing method of a liquid crystal display according to an exemplary embodiment of the present invention that includes: forming a gate line including a gate electrode on a substrate; forming a gate insulating layer on the gate line; forming a data line including a source electrode and a drain electrode facing the source electrode on the gate insulating layer; forming a partition defining a pixel area and having an opening region exposing the gate insulating layer on the gate electrode, the source electrode and the drain electrode on the gate line, and the data line and the drain electrode; forming a semiconductor in the opening region; forming a color filter in the pixel area defined by the partition; and forming a pixel electrode connected to the drain electrode on the color filter.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: May 1, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae-Young Choi, Bo-Sung Kim, Young-Min Kim
  • Patent number: 8168523
    Abstract: The invention provides a technique to manufacture a highly reliable semiconductor device and a display device at high yield. As an exposure mask, an exposure mask provided with a diffraction grating pattern or an auxiliary pattern formed of a semi-transmissive film with a light intensity reducing function is used. With such an exposure mask, various light exposures can be more accurately controlled, which enables a resist to be processed into a more accurate shape. Therefore, when such a mask layer is used, the conductive film and the insulating film can be processed in the same step into different shapes in accordance with desired performances. As a result, thin film transistors with different characteristics, wires in different sizes and shapes, and the like can be manufactured without increasing the number of steps.
    Type: Grant
    Filed: January 7, 2011
    Date of Patent: May 1, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideto Ohnuma, Masayuki Sakakura
  • Publication number: 20120097859
    Abstract: The invention relates to an operating method for a semiconductor structure (1), particularly for a detecting element, in a semiconductor detector, particularly in a blocked impurity band detector, comprising the following steps: a) generating free signal charge carriers (2) in the semiconductor detector by impinging radiation, b) collecting the radiation-generated signal charge carriers (2) in a storage area (IG) in the semiconductor structure (1), wherein the storage area (IG) forms a potential well in which the signal charge carriers (2) are captured, c) deleting the signal charge carriers (2) collected in the storage area (IG) in IG that the signal charge carriers (2) are removed from the storage area (IG), d) generating an electric tunnel field in the area of the storage area (IG), so that the signal charge carriers (2) present in the storage area (IG) can tunnel out of the potential well of the storage area (IG) using the tunnel effect, into a conduction band in which the signal charge carriers (2) are f
    Type: Application
    Filed: May 12, 2010
    Publication date: April 26, 2012
    Applicant: Max-Planck-Gesellschaft zur Foerderung der Wissens chaften e.V.
    Inventors: Gerhard Lutz, Lothar Strueder, Valentin Fedl
  • Patent number: 8164152
    Abstract: A liquid crystal display and a method of manufacturing the same are provided. The liquid crystal display includes an insulating substrate, a gate electrode formed on the insulating substrate, an oxide semiconductor layer formed on the gate electrode, an etch stopper formed on the oxide semiconductor layer in a channel area, a common electrode formed on the insulating substrate, source and drain electrodes separated from each other on the etch stopper and extending to an upper portion of the oxide semiconductor layer, a passivation layer formed on the etch stopper, the common electrode, the source and drain electrodes, and a pixel electrode formed on the passivation layer and connected to the drain electrode.
    Type: Grant
    Filed: July 27, 2009
    Date of Patent: April 24, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je-Hun Lee, Do-Hyun Kim
  • Patent number: 8154007
    Abstract: A mesoporous silica having adjustable pores is obtained to form a template and thus a three-terminal metal-oxide-semiconductor field-effect transistor (MOSFET) photodetector is obtained. A gate dielectric of a nano-structural silicon-base membrane is used as infrared light absorber in it. Thus, a semiconductor photodetector made of pure silicon having a quantum-dot structure is obtained with excellent near-infrared optoelectronic response.
    Type: Grant
    Filed: February 9, 2010
    Date of Patent: April 10, 2012
    Assignee: National Applied Research Laboratories
    Inventors: Jia-Min Shieh, Wen-Chein Yu, Chao-Kei Wang, Bau-Tong Dai, Ci-Ling Pan, Hao-Chung Kuo, Jung-Y. Huang
  • Publication number: 20120068078
    Abstract: The present invention discloses a radiation detector, an imaging device and an electrode structure thereof, and a method for acquiring an image.
    Type: Application
    Filed: June 28, 2011
    Publication date: March 22, 2012
    Applicant: NUCTECH COMPANY LIMITED
    Inventors: Lan Zhang, Zhiqiang Chen, Ziran Zhao, Wanlong Wu, Yuanjing Li, Zhi Deng, Xiaocui Zheng
  • Patent number: 8138534
    Abstract: Optical structures having an array of protuberances between two layers having different refractive indices are provided. The array of protuberances has vertical and lateral dimensions less than the wavelength range of lights detectable by a photodiode of a CMOS image sensor. The array of protuberances provides high transmission of light with little reflection. The array of protuberances may be provided over a photodiode, in a back-end-of-line interconnect structure, over a lens for a photodiode, on a backside of a photodiode, or on a window of a chip package.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: March 20, 2012
    Assignee: International Business Machines Corporation
    Inventors: James W. Adkisson, John J. Ellis-Monaghan, Jeffrey P. Gambino, Charles F. Musante
  • Publication number: 20120049043
    Abstract: An image sensor cell, wherein at least one of a plurality of transistors included in image sensor cell is a recess transistor having a channel region recessed into a substrate. The image sensor cell includes an image charge generating unit for generating an image charge corresponding to an image signal, and an image charge converting unit for converting the image charge into an electrical signal, wherein at least one of a plurality of transistors included in the image charge converting unit is a recess transistor including a channel region that is recessed into a substrate.
    Type: Application
    Filed: August 19, 2011
    Publication date: March 1, 2012
    Inventors: Kyung-ho LEE, Hoon-sang Oh, Jung-chak Ahn
  • Publication number: 20120043589
    Abstract: An image sensor pixel includes a semiconductor layer, a photosensitive region to accumulate photo-generated charge, a floating node, a trench, and an entrenched transfer gate. The photosensitive region and the trench are disposed within the semiconductor layer. The trench extends into the semiconductor layer between the photosensitive region and the floating node and the entrenched transfer gate is disposed within the trench to control transfer of the photo-generated charge from the photosensitive region to the floating node.
    Type: Application
    Filed: August 20, 2010
    Publication date: February 23, 2012
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Hidetoshi Nozaki, Tiejun Dai
  • Publication number: 20120032241
    Abstract: An image sensor includes: a substrate, at least a pixel, and at least a light shield is provided. Wherein the pixel includes a photodiode and at least a transistor, and the transistor is connected to a metal line via a contact. The light shield is positioned around at least one side of the pixel, wherein the light shield is made while forming the contact.
    Type: Application
    Filed: August 3, 2010
    Publication date: February 9, 2012
    Inventors: Fang-Ming Huang, Chung-Wei Chang, Ping-Hung Yin