Pn Heterojunction Potential Barrier (epo) Patents (Class 257/E31.067)
  • Patent number: 8969851
    Abstract: The present invention provides an image pickup device used to capture an image of an object by receiving light in a near infrared region reflected from the object. The image pickup device includes semiconductor light-receiving elements each having a light-receiving layer with a band gap wavelength of 1.65 to 3.0 ?m.
    Type: Grant
    Filed: December 10, 2010
    Date of Patent: March 3, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi Inada, Yasuhiro Iguchi, Youichi Nagai, Hiroki Mori, Kouhei Miura
  • Patent number: 8963274
    Abstract: A low noise infrared photo detector with a vertically integrated field effect transistor (FET) structure is formed without thermal diffusion. The FET structure includes a high sensitivity photo detector layer, a charge well layer, a transfer well layer, a charge transfer gate, and a drain electrode. In an embodiment, the photo detector layer and charge well are InGaAs and the other layers are InP layers.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: February 24, 2015
    Assignee: Sensors Unlimited, Inc.
    Inventor: Peter Dixon
  • Patent number: 8866199
    Abstract: An object of the present invention is to provide a group III-V compound semiconductor photo detector comprising an absorption layer having a group III-V compound semiconductor layer containing Sb as a group V constituent element, and an n-type InP window layer, resulting in reduced dark current. The InP layer 23 grown on the absorption layer 23 contains antimony as impurity, due to the memory effect with antimony which is supplied during the growth of a GaAsSb layer of the absorption layer 21. In the group III-V compound semiconductor photo detector 11, the InP layer 23 contains antimony as impurity and is doped with silicon as n-type dopant. Although antimony impurities in the InP layer 23 generate holes, the silicon contained in the InP layer 23 compensates for the generated carriers. As a result, the second portion 23d of the InP layer 23 has sufficient n-type conductivity.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: October 21, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Katsushi Akita, Takashi Ishizuka, Kei Fujii, Youichi Nagai
  • Patent number: 8759886
    Abstract: A solid-state image capturing device including: a substrate; a substrate voltage source which applies a first potential to the substrate during a light reception period and applies a second potential to the substrate during a non-light reception period; and a plurality of pixels which each includes a light receiver which is formed on a front surface of the substrate and generates signal charges in accordance with received light, a storage capacitor which is formed adjacent to the light receiver and accumulates and stores signal charges generated by the light receiver, dark-current suppressors which are formed in the light receiver and the storage capacitor, an electronic shutter adjusting layer which is formed in an area facing the light receiver in the substrate and distant from the storage capacitor and which adjusts potential distribution, and a floating diffusion portion to which the signal charges accumulated in the storage capacitor are transmitted.
    Type: Grant
    Filed: May 22, 2013
    Date of Patent: June 24, 2014
    Assignee: Sony Corporation
    Inventor: Hideo Kanbe
  • Publication number: 20130234202
    Abstract: Image sensors comprising an isolation region according to embodiments are disclosed, as well as methods of forming the image sensors with isolation region. An embodiment is a structure comprising a semiconductor substrate, a photo element in the semiconductor substrate, and an isolation region in the semiconductor substrate. The isolation region is proximate the photo element and comprises a dielectric material and an epitaxial region. The epitaxial region is disposed between the semiconductor substrate and the dielectric material.
    Type: Application
    Filed: March 8, 2012
    Publication date: September 12, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shiu-Ko JangJian, Min Hao Hong, Kei-Wei Chen, Szu-An Wu
  • Patent number: 8530933
    Abstract: A highly sensitive and wide spectra-range mesa type photodetector having the impurity diffusion along the mesa-sidewall is provided. A mesa-type hetero-bipolar phototransistor or photodiode having a photo-absorption layer formed by a first semiconductor layer of a first conductivity type, an anode layer (or base layer) formed by a second semiconductor layer of a second conductivity type which has an opposite polarity with the first conductivity type, a wide band gap emitter or window layer formed by the third semiconductor layer on the anode layer, and the wide band gap buffer layer of the first conductivity type which has a relatively wide band gap semiconductor as compared with the second semiconductor layer on the substrate, which also serves as the cathode layer. And the first semiconductor layer, the second semiconductor layer and the wide band gap emitter or window layer is selectively etched to form the mesa structure.
    Type: Grant
    Filed: October 6, 2009
    Date of Patent: September 10, 2013
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventor: Mutsuo Ogura
  • Patent number: 8482040
    Abstract: A solid-state image capturing device includes: a substrate; a substrate voltage source which applies a first potential to the substrate during a light reception period and applies a second potential to the substrate during a non-light reception period; and a plurality of pixels which each includes a light receiver which is formed on a front surface of the substrate and generates signal charges in accordance with received light, a storage capacitor which is formed adjacent to the light receiver and accumulates and stores signal charges generated by the light receiver, dark-current suppressors which are formed in the light receiver and the storage capacitor, an electronic shutter adjusting layer which is formed in an area facing the light receiver in the substrate and distant from the storage capacitor and which adjusts potential distribution, and a floating diffusion portion to which the signal charges accumulated in the storage capacitor are transmitted.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: July 9, 2013
    Assignee: Sony Corporation
    Inventor: Hideo Kanbe
  • Patent number: 8441089
    Abstract: This bispectral detector comprises a plurality of unitary elements for detecting a first and a second electromagnetic radiation range, consisting of a stack of upper and lower semiconductor layers of a first conductivity type which are separated by an intermediate layer that forms a potential barrier between the upper and lower layers; and for each unitary detection element, two upper and lower semiconductor zones of a second conductivity type opposite to the first conductivity type, are arranged respectively so that they are in contact with the upper faces of the upper and lower layers so as to form PN junctions, the semiconductor zone being positioned, at least partially, in the bottom of an opening that passes through the upper and intermediate layers. The upper face of at least one of the upper and lower layers is entirely covered in a semiconductor layer of the second conductivity type.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: May 14, 2013
    Assignee: Commissariat a l′Energie Atomique et Aux Energies Alternatives
    Inventors: Olivier Gravrand, Jacques Baylet
  • Patent number: 8399911
    Abstract: A method is disclosed for producing Group III-N field-effect devices, such as HEMT, MOSHFET, MISHFET or MESFET devices, comprising two active layers, e.g. a GaN/AlGaN layer. The method produces an enhancement mode device of this type, i.e. a normally-off device, by providing a passivation layer on the AlGaN layer, etching a hole in the passivation layer and not in the layers underlying the passivation layer, and depositing the gate contact in the hole, while the source and drain are deposited directly on the passivation layer. The characteristics of the active layers and/or of the gate are chosen such that no two-dimensional electron gas layer is present underneath the gate, when a zero voltage is applied to the gate. A device with this behavior is also disclosed.
    Type: Grant
    Filed: June 6, 2007
    Date of Patent: March 19, 2013
    Assignee: IMEC
    Inventors: Joff Derluyn, Steven Boeykens, Marianne Germain, Gustaaf Borghs
  • Publication number: 20130039664
    Abstract: Tensile strained germanium is provided that can be sufficiently strained to provide a nearly direct band gap material or a direct band gap material. Compressively stressed or tensile stressed stressor materials in contact with germanium regions induce uniaxial or biaxial tensile strain in the germanium regions. Stressor materials may include silicon nitride or silicon germanium. The resulting strained germanium structure can be used to emit or detect photons including, for example, generating photons within a resonant cavity to provide a laser.
    Type: Application
    Filed: August 12, 2011
    Publication date: February 14, 2013
    Inventors: Paul A. Clifton, Andreas Goebel, R. Stockton Gaines
  • Publication number: 20130029449
    Abstract: Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique.
    Type: Application
    Filed: August 24, 2012
    Publication date: January 31, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Zhiyuan Cheng, James G. Fiorenza, Calvin Sheen, Anthony Lochtefeld
  • Publication number: 20130019934
    Abstract: Methods are generally disclosed for forming a thin film photovoltaic device. According to one embodiment, a transparent conductive oxide layer and an oxygen getter layer can be formed on a transparent substrate. The transparent conductive oxide layer and the oxygen getter layer can then be annealed together such that oxygen atoms move from the transparent conductive oxide layer into the oxygen getter layer. A photovoltaic heterojunction can be formed on the TCO layer. Thin film photovoltaic devices are also generally disclosed.
    Type: Application
    Filed: July 22, 2011
    Publication date: January 24, 2013
    Applicant: PRIMESTAR SOLAR, INC.
    Inventors: Robert Dwayne Gossman, Scott Daniel Feldman-Peabody, Jeffrey Todd Knapp
  • Publication number: 20120240989
    Abstract: A method for fabricating a thin film photovoltaic device is provided. The method includes providing a substrate comprising a thin film photovoltaic absorber which has a surface including copper, indium, gallium, selenium, and sulfur. The method further includes subjecting the surface to a material containing at least a zinc species substantially free of any cadmium. The surface is heated to cause formation of a zinc doped material. The zinc doped material is free from cadmium. Furthermore the method includes forming a zinc oxide material overlying the zinc doped material and forming a transparent conductive material overlying the zinc oxide material.
    Type: Application
    Filed: September 19, 2011
    Publication date: September 27, 2012
    Applicant: Stion Corporation
    Inventors: Kannan Ramanathan, Robert D. Wieting
  • Patent number: 8264013
    Abstract: A device separation insulating film and a device separation semiconductor layer are provided for a device separation section for separating adjacent devices from each other, end portions of the device separation insulating film and end portions of the device separation semiconductor layer are provided to overlap each other in order to surround two sides of an outer-periphery of the voltage conversion section and also to surround a channel section of the charge transfer device and the light receiving devices and an end portion of the device separation insulating film facing an end face of the light receiving device is arranged inwardly below a control electrode with respect to an end face of the control electrode on the light receiving device side.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: September 11, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Tomohiko Kawamura
  • Publication number: 20120175677
    Abstract: A photocell which operates at multiple wavelengths for efficient power generation from broadband incident radiation. According to a preferred embodiment, the photocell is a multi-layer device that includes a first outer layer, a middle layer and an inner layer disposed on a substrate. All three layers are formed from II-VI semiconductor layers. The device is arranged such that the outer layer has a high band gap, the middle layer has a band gap which is less than half the band gap of the outer layer and the inner layer has a band gap which is less than half that of the substrate. Thus, there is a step change in band gap between various layers.
    Type: Application
    Filed: September 21, 2010
    Publication date: July 12, 2012
    Applicant: QINETIQ LIMITED
    Inventors: Neil Thomson Gordon, Timothy Ashley
  • Publication number: 20120168720
    Abstract: An object of the present invention is to provide a group III-V compound semiconductor photo detector comprising an absorption layer having a group III-V compound semiconductor layer containing Sb as a group V constituent element, and an n-type InP window layer, resulting in reduced dark current. The InP layer 23 grown on the absorption layer 23 contains antimony as impurity, due to the memory effect with antimony which is supplied during the growth of a GaAsSb layer of the absorption layer 21. In the group III-V compound semiconductor photo detector 11, the InP layer 23 contains antimony as impurity and is doped with silicon as n-type dopant. Although antimony impurities in the InP layer 23 generate holes, the silicon contained in the InP layer 23 compensates for the generated carriers. As a result, the second portion 23d of the InP layer 23 has sufficient n-type conductivity.
    Type: Application
    Filed: July 21, 2010
    Publication date: July 5, 2012
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Katsushi Akita, Takashi Ishizuka, Kei Fujii, Youichi Nagai
  • Publication number: 20120104460
    Abstract: Embodiments of the invention generally relate to optoelectronic semiconductor devices such as photovoltaic devices including solar cells. In one aspect, an optoelectronic semiconductor device includes an absorber layer made of gallium arsenide (GaAs) and having only one type of doping. An emitter layer is located closer than the absorber layer to a back side of the device, the emitter layer made of a different material than the absorber layer and having a higher bandgap than the absorber layer. A heterojunction formed between the emitter layer and the absorber layer, and a p-n junction is formed between the emitter layer and the absorber layer and at least partially within the different material at a location offset from the heterojunction. The p-n junction causes a voltage to be generated in the device in response to the device being exposed to light at a front side of the device.
    Type: Application
    Filed: November 3, 2010
    Publication date: May 3, 2012
    Applicant: ALTA DEVICES, INC.
    Inventors: Hui NIE, Brendan M. KAYES, Isik C. KIZILYALLI
  • Publication number: 20110303273
    Abstract: There is disclosed a photovoltaic cell, such as a solar cell, incorporating one or more epitaxially grown layers of SiGe or another germanium material, substantially lattice matched to GaAs. A GaAs substrate used for growing the layers may be removed by a method which includes using a boundary between said GaAs and the germanium material as an etch stop.
    Type: Application
    Filed: February 17, 2010
    Publication date: December 15, 2011
    Inventor: Robert Cameron Harper
  • Publication number: 20110291103
    Abstract: A Schottky photodiode may include a monocrystalline semiconductor substrate having a front surface, a rear surface, and a first dopant concentration and configured to define a cathode of the Schottky photodiode, a doped epitaxial layer over the front surface of the monocrystalline semiconductor substrate having a second dopant concentration less than the first dopant concentration, and parallel spaced apart trenches in the doped epitaxial layer and having of a depth less than a depth of the doped epitaxial layer.
    Type: Application
    Filed: August 11, 2011
    Publication date: December 1, 2011
    Applicant: STMicroelectronics S.r.l
    Inventor: Massimo Cataldo MAZZILLO
  • Publication number: 20110291109
    Abstract: An avalanche photodetector comprising a multiplication layer formed of a first material having a first polarization; the multiplication layer having a first electric field upon application of a bias voltage; an absorption layer formed of a second material having a second polarization forming an interface with the multiplication layer; the absorption layer having a second electric field upon application of the bias voltage, the second electric field being less than the first electric field or substantially zero, carriers created by light absorbed in the absorption layer being multiplied in the multiplication layer due to the first electric field; the absorption layer having a second polarization which is greater or less than the first polarization to thereby create an interface charge; the interface charge being positive when the first material predominately multiplies holes, the interface charge being negative when the first material predominately multiplies electrons, the change in electric field at the inte
    Type: Application
    Filed: May 26, 2011
    Publication date: December 1, 2011
    Applicant: U.S. Government as represented by the Secretary of the Army
    Inventors: MICHAEL WRABACK, Paul H. Shen, Anand V. Sampath
  • Publication number: 20110249163
    Abstract: A photoelectric conversion device comprises a p-type region, an n-type buried layer formed under the p-type region, an element isolation region, and a channel stop region which covers at least a lower portion of the element isolation region, wherein the p-type region and the buried layer form a photodiode, and a diffusion coefficient of a dominant impurity of the channel stop region is smaller than a diffusion coefficient of a dominant impurity of the buried layer.
    Type: Application
    Filed: January 20, 2010
    Publication date: October 13, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hajime Ikeda, Yoshihisa Kabaya, Takanori Watanabe, Takeshi Ichikawa, Mineo Shimotsusa
  • Publication number: 20110233609
    Abstract: The invention relates to a method for producing an infrared radiation sensor, said sensor comprising an infrared photodiode array formed in a first material and a reading circuit formed in a second material, said method comprising the steps of: sticking, through molecular adhesion, a first material side surface onto an optically transparent crystalline material side surface having infrared radiation and a coefficient of thermal expansion similar to that of the second material, give or take 20%; thinning the body of the first material side surface so that the latter is less that 25 ?m; producing infrared-sensitive photodiodes onto the thus-thinned first material side surface; depositing contact ball bearings onto the infrared photodiodes; and mounting the reading circuit onto the first material side surface through flip chip technology.
    Type: Application
    Filed: November 27, 2009
    Publication date: September 29, 2011
    Applicant: Sagem Defense Securite
    Inventors: Arnaud Cordat, Herve Sik, Stéphane Demiguel
  • Publication number: 20110227131
    Abstract: A method for manufacturing a multilayered structure may include forming a transparent conductive oxide layer including cadmium stannate adjacent to a substrate and annealing the structure in an annealing environment including a reducing agent at a temperature greater than 500 degrees C. to crystallize the cadmium stannate.
    Type: Application
    Filed: March 16, 2011
    Publication date: September 22, 2011
    Inventors: Zhibo Zhao, Dale Roberts, Yu Yang, Douglas Dauson
  • Publication number: 20110147707
    Abstract: The present invention provides an image pickup device used to capture an image of an object by receiving light in a near infrared region reflected from the object. The image pickup device includes semiconductor light-receiving elements each having a light-receiving layer with a band gap wavelength of 1.65 to 3.0 ?m.
    Type: Application
    Filed: December 10, 2010
    Publication date: June 23, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hiroshi INADA, Yasuhiro IGUCHI, Youichi NAGAI, Hiroki MORI, Kouhei MIURA
  • Publication number: 20110108884
    Abstract: Disclosed is a photoelectric conversion element comprising an anode, a cathode, and an active layer between the anode and the cathode, wherein the active layer includes an n-type semiconductor and a p-type semiconductor, and an area of a p-n junction between the n-type semiconductor and the p-type semiconductor is 100 ?m2 or more per 1 ?m3 of the active layer.
    Type: Application
    Filed: July 7, 2009
    Publication date: May 12, 2011
    Applicant: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Yasunori Uetani, Yoshiaki Honda, Yukiko Takenaka
  • Publication number: 20110101306
    Abstract: Provided are a photodiode array and its manufacturing method, which maintain the crystalline quality of an absorption layer formed on a group III-V semiconductor substrate to obtain excellent characteristics, and which improve the crystallinity at the surface of a window layer; an epitaxial wafer used for manufacturing the photodiode array; and a method for manufacturing the epitaxial wafer. A method for manufacturing a photodiode array 1 having a plurality of absorption regions 21, includes the steps of: growing an absorption layer 7 on an n-type InP substrate 3; growing an InP window layer on the absorption layer 7; and diffusing a p-type impurity in regions, in the window layer 11, corresponding to the plurality of absorption regions 21. The window layer 11 is grown by MOVPE using only metal-organic sources, at a growth temperature equal to or lower than that of the absorption layer 7.
    Type: Application
    Filed: October 29, 2010
    Publication date: May 5, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Katsushi AKITA, Takashi ISHIZUKA, Kei FUJII, Youichi NAGAI, Hideaki NAKAHATA
  • Patent number: 7928473
    Abstract: The invention relates to a photo-detector with a reduced G-R noise, which comprises a sequence of a p-type contact layer, a middle barrier layer and an n-type photon absorbing layer, wherein the middle barrier layer has an energy bandgap significantly greater than that of the photon absorbing layer, and there is no layer with a narrower energy bandgap than that in the photon-absorbing layer.
    Type: Grant
    Filed: August 4, 2010
    Date of Patent: April 19, 2011
    Assignee: An Elbit Systems-Rafael Partnership
    Inventor: Philip Klipstein
  • Patent number: 7897425
    Abstract: A method for fabricating an image sensor. The method may include forming a gate, a photo diode, and a floating diffusion region on a pixel region of a semiconductor substrate; forming an oxide film on the pixel region and on an edge region of the semiconductor substrate; forming a sacrificial oxide layer by etching the oxide film using a first photoresist pattern as a mask; forming a metal layer on the first photoresist pattern, the gate, and the floating diffusion region; forming a salicide layer on the gate and the floating diffusion region; etching a remaining non-salicided portion of the metal layer, the first photoresist pattern, and the sacrificial oxide layer; forming an interlayer insulating film on the semiconductor substrate and planarizing the interlayer insulating film; and forming contact holes and forming an edge open part by etching the interlayer insulating film using a second photoresist pattern as a mask.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: March 1, 2011
    Assignee: Dongbu Hitek Co., Ltd.
    Inventors: In Cheol Baek, Kyung Min Park, Sun Chan Lee, Han Choon Lee
  • Patent number: 7859075
    Abstract: An image sensor for minimizing a dark level defect is disclosed. The image sensor includes an isolation layer formed on a substrate. A field region and an active region are defined on the substrate by the isolation layer. A photodiode is formed in the image sensor in such a structure that a first region is formed below a surface of the substrate in the active region and a second region is formed under the first region. A first conductive type impurity is implanted into the first region and a second conductive type impurity is implanted into the second region. A dark current suppressor is formed on side and bottom surfaces of the isolation layer adjacent to the first region, and the dark current suppressor is doped with the second conductive type impurity. The dark current suppressor suppresses the dark current to minimize the dark level defect caused by the dark current.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: December 28, 2010
    Assignee: Samsung Electronics, Co., Ltd.
    Inventor: Sang-Il Jung
  • Patent number: 7829915
    Abstract: The present invention changes layer polarities of an epitaxy structure of an avalanche photodiode into n-i-n-i-p. A transport layer is deposed above an absorption layer to prevent absorbing photon and producing electrons and holes. A major part of electric field is concentrated on a multiplication layer for producing avalanche and a minor part of the electric field is left on the absorption layer for transferring carrier without avalanche. Thus, bandwidth limit from a conflict between RC bandwidth and carrier transferring time is relieved. Meanwhile, active area is enlarged and alignment error is improved without sacrificing component velocity too much.
    Type: Grant
    Filed: August 7, 2008
    Date of Patent: November 9, 2010
    Assignee: National Central University
    Inventors: Jin-Wei Shi, Yen-Hsiang Wu
  • Patent number: 7795640
    Abstract: The invention relates to a photo-detector with a reduced G-R noise, which comprises a sequence of a p-type contact layer, a middle barrier layer and an n-type photon absorbing layer, wherein the middle barrier layer has an energy bandgap significantly greater than that of the photon absorbing layer, and there is no layer with a narrower energy bandgap than that in the photon-absorbing layer.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: September 14, 2010
    Assignee: Semi-Conductor Devices-An Elbit Systems-Rafael Partnership
    Inventor: Philip Klipstein
  • Patent number: 7749800
    Abstract: Provided is a photoelectric conversion device including: a semiconductor substrate (3) of a first conductivity type; a photoelectric conversion region (7) of a second conductivity type which is located in the semiconductor substrate (3), the second conductivity type being opposite to the first conductivity type; and a buried layer (17) of the first conductivity type which is formed in an inner portion of the semiconductor substrate (3) to cover a lower side of the photoelectric conversion region (7), the buried layer (17) including a higher impurity concentration than the semiconductor substrate (3).
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: July 6, 2010
    Assignee: Seiko Instruments Inc.
    Inventors: Toshihiko Omi, Yoichi Mimuro
  • Patent number: 7589366
    Abstract: A solid-state imaging device includes a semiconductor substrate (1) with a photodetector portion (15). The photodetector portion (15) includes a p-type first impurity region (surface inversion layer) (6) formed in the semiconductor substrate (1) and an n-type second impurity region (photoelectric conversion region) (4) formed below the surface inversion layer (6). The photoelectric conversion region (4) is formed by introducing an n-type impurity into the semiconductor substrate (1). The surface inversion layer (6) is formed by introducing indium into a region of the semiconductor substrate (1) where the photoelectric conversion region (4) is formed.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: September 15, 2009
    Assignee: Panasonic Corporation
    Inventor: Masakatsu Suzuki
  • Patent number: 7576371
    Abstract: Structures and methods to improve the crosstalk between adjacent pixels of back-illuminated photodiode arrays on a substrate having first and second surfaces, including providing a first matrix of regions of a first conductivity type of a higher conductivity than the substrate extending into the substrate from the first surface and surrounding each photodiode of the array, and providing a second matrix of regions of a first conductivity type of a higher conductivity than the substrate extending into the substrate from the second surface, the second matrix being a mirror image of and aligned with the first matrix, the matrices extending into the substrate less than one half the thickness of the substrate so as to not touch each other. The methods and corresponding structures may be applied to p/n diodes, pin diodes, avalanche photodiodes, photoconductive cells (no p-n junction at all), or similar photosensitive device arrays.
    Type: Grant
    Filed: March 3, 2006
    Date of Patent: August 18, 2009
    Assignee: Array Optronix, Inc.
    Inventor: Alexander O. Goushcha
  • Patent number: 7459328
    Abstract: An image sensor for minimizing a dark level defect is disclosed. The image sensor includes an isolation layer formed on a substrate. A field region and an active region are defined on the substrate by the isolation layer. A photodiode is formed in the image sensor in such a structure that a first region is formed below a surface of the substrate in the active region and a second region is formed under the first region. A first conductive type impurity is implanted into the first region and a second conductive type impurity is implanted into the second region. A dark current suppressor is formed on side and bottom surfaces of the isolation layer adjacent to the first region, and the dark current suppressor is doped with the second conductive type impurity. The dark current suppressor suppresses the dark current to minimize the dark level defect caused by the dark current.
    Type: Grant
    Filed: February 12, 2008
    Date of Patent: December 2, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sang-Il Jung
  • Publication number: 20080290369
    Abstract: A semiconductor light-receiving device and its manufacturing method are provided which are capable of suppressing dark current and deterioration. Semiconductor crystals were sequentially grown over an n-type InP substrate, including an n-type InP buffer layer, an undoped GaInAs light absorption layer, an undoped InP diffusion buffer layer, and a p-type InP window layer. Next, a first mesa was formed by removing a part from the p-type InP window layer to the n-type InP buffer layer with a Br-based etchant having low etching selectivity, so as to form a sloped “normal” mesa structure. Next, a second mesa having a smaller diameter than the first mesa was formed by dry etching, by precisely removing a part from the p-type InP window layer to a certain mid position of the undoped InP diffusion buffer layer.
    Type: Application
    Filed: April 15, 2008
    Publication date: November 27, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Eiji Yagyu, Eitaro Ishimura, Masaharu Nakaji
  • Patent number: 7407830
    Abstract: A CMOS imaging device including a two pixel detection system for red, green, and blue light. One pixel detects red and blue light and another pixel detects green light. The detection of red and blue is based on wavelength and the device is structured such that in the red/blue pixel, detection of blue light is at a shallow substrate depth, while detection of red is at a deeper substrate depth. The pixel array is structured such that the red/blue pixel is adjacent to the green pixel and alternates between red/blue and green pixels. The invention is also related to methods of forming such an imager array and pixels.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: August 5, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Sungkwon (Chris) Hong
  • Patent number: 7397100
    Abstract: An image sensor for minimizing a dark level defect is disclosed. The image sensor includes an isolation layer formed on a substrate. A field region and an active region are defined on the substrate by the isolation layer. A photodiode is formed in the image sensor in such a structure that a first region is formed below a surface of the substrate in the active region and a second region is formed under the first region. A first conductive type impurity is implanted into the first region and a second conductive type impurity is implanted into the second region. A dark current suppressor is formed on side and bottom surfaces of the isolation layer adjacent to the first region, and the dark current suppressor is doped with the second conductive type impurity. The dark current suppressor suppresses the dark current to minimize the dark level defect caused by the dark current.
    Type: Grant
    Filed: August 2, 2005
    Date of Patent: July 8, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sang-Il Jung
  • Patent number: 7368762
    Abstract: The present invention provides a heterojunction photodiode which includes a pn or Schottky-barrier junction formed in a first material region having a bandgap energy Eg1. When reverse-biased, the junction creates a depletion region which expands towards a second material region having a bandgap energy Eg2 which is less than Eg1. This facilitates signal photocurrent generated in the second region to flow efficiently through the junction in the first region while minimizing the process-related dark currents and associated noise due to near junction defects and imperfect surfaces which typically reduce photodiode device performance. The heterojunction photodiode can be included in an imaging system which includes an array of junctions to form an imager.
    Type: Grant
    Filed: January 6, 2005
    Date of Patent: May 6, 2008
    Assignee: Teledyne Licensing, LLC
    Inventors: William E. Tennant, Eric C. Piquette, Donald L. Lee, Mason L. Thomas, Majid Zandian
  • Publication number: 20080099872
    Abstract: The objective of this invention is to provide a photodiode which has high sensitivity even to light with a wavelength in the blue region while maintaining the high-frequency characterstics. The n type second semiconductor layer (13) containing an n type electroconductive impurity at a low concentration is formed directly or via an intrinsic semiconductor layer (11) on the p type first semiconductor layer (10). The third semiconductor layer (20) containing an n type electroconductive impurity at a medium concentration is formed shallower than said second semiconductor layer (13) in its main plane. The fourth semiconductor layer (21) containing an n type electroconductive impurity at a high concentration is formed shallower than said third semiconductor layer (20) in the main plane of the third semiconductor layer (20).
    Type: Application
    Filed: August 6, 2007
    Publication date: May 1, 2008
    Applicant: Texas Instruments Incorporated
    Inventors: Hiroyuki TOMOMATSU, Tohru KATOH, Motoaki KUSAMAKI, Tetsuhiko KINOSHITA
  • Patent number: 7307291
    Abstract: A structure for a gallium-nitride (GaN) based ultraviolet photo detector is provided. The structure contains an n-type contact layer, a light absorption layer, a light penetration layer, and a p-type contact layer, sequentially stacked on a substrate from bottom to top in this order. The layers are all made of aluminum-gallium-indium-nitride (AlGaInN) compound semiconductors. By varying the composition of aluminum, gallium, and indium, the layers, on one hand, can achieve the desired band gaps so that the photo detector is highly responsive to ultraviolet lights having specific wavelengths. On the other hand, the layers have compatible lattice constants so that problems associated with excessive stress are avoided and high-quality epitaxial structure is obtained. The structure further contains a positive electrode, a light penetration contact layer, and an anti-reflective coating layer on top of the p-type contact layer, and a negative electrode on the n-type contact layer.
    Type: Grant
    Filed: January 22, 2005
    Date of Patent: December 11, 2007
    Assignee: Formosa Epitaxy Incorporation
    Inventors: Liang-Wen Wu, Ru-Chin Tu, Cheng-Tsang Yu, Tzu-Chi Wen, Fen-Ren Chien
  • Publication number: 20070252136
    Abstract: A bulk-doped semiconductor that is at least one of the following: a single crystal, an elongated and bulk-doped semiconductor that, at any point along its longitudinal axis, has a largest cross-sectional dimension less than 500 nanometers, and a free-standing and bulk-doped semiconductor with at least one portion having a smallest width of less than 500 nanometers. Such a semiconductor may comprise an interior core comprising a first semiconductor; and an exterior shell comprising a different material than the first semiconductor. Such a semiconductor may be elongated and may have, at any point along a longitudinal section of such a semiconductor, a ratio of the length of the section to a longest width is greater than 4:1, or greater than 10:1, or greater than 100:1, or even greater than 1000:1.
    Type: Application
    Filed: July 2, 2007
    Publication date: November 1, 2007
    Applicant: President and Fellows of Harvard College
    Inventors: Charles Lieber, Yi Cui, Xiangfeng Duan, Yu Huang
  • Publication number: 20070235758
    Abstract: The invention relates to a photo-detector with a reduced G-R noise, which comprises a sequence of a p-type contact layer, a middle barrier layer and an n-type photon absorbing layer, wherein the middle barrier layer has an energy bandgap significantly greater than that of the photon absorbing layer, and there is no layer with a narrower energy bandgap than that in the photon-absorbing layer.
    Type: Application
    Filed: June 28, 2004
    Publication date: October 11, 2007
    Inventor: Philip Klipstein
  • Publication number: 20070034898
    Abstract: The present invention provides a heterojunction photodiode which includes a pn or Schottky-barrier junction formed in a first material region having a bandgap energy Eg1. When reverse-biased, the junction creates a depletion region which expands towards a second material region having a bandgap energy Eg2 which is less than Eg1. This facilitates signal photocurrent generated in the second region to flow efficiently through the junction in the first region while minimizing the process-related dark currents and associated noise due to near junction defects and imperfect surfaces which typically reduce photodiode device performance. The heterojunction photodiode can be included in an imaging system which includes an array of junctions to form an imager.
    Type: Application
    Filed: January 6, 2005
    Publication date: February 15, 2007
    Inventors: William Tennant, Eric Piquette, Donald Lee, Mason Thomas, Majid Zandian