Characterized By Two Potential Or Surface Barriers (epo) Patents (Class 257/E31.068)
  • Patent number: 8507311
    Abstract: A method for forming an image sensing device is disclosed. An epitaxy layer having the first conductivity type is formed on a substrate, wherein the epitaxy layer comprises a first pixel area corresponding to a first incident light, a second pixel area corresponding to a second incident light, and a third pixel area corresponding to a third incident light. A first deep well is formed in a lower portion of the epitaxy layer for reducing pixel-to-pixel talk of the image sensing device. A second deep well is formed in a lower portion of the epitaxy layer.
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: August 13, 2013
    Assignee: Himax Imaging, Inc.
    Inventors: Chang-Wei Chang, Fang-Ming Huang, Chi-Shao Lin, Yu-Ping Hu
  • Publication number: 20130026382
    Abstract: A photovoltaic UV detector configured to generate an electrical output under UV irradiation. The photovoltaic UV detector comprises a first layer comprising an electrically polarized dielectric thin layer configured to generate a first electrical output under the UV irradiation; and a second, layer configured to form an electrical energy barrier at an interface between the second layer and the first layer so as to generate a second electrical output under the UV irradiation, the second electrical output having a same polarity as the first electrical output, the electrical output of the photovoltaic UV detector being a sum of at least the first electrical output and the second electrical output. The electrically polarized dielectric thin layer may be a ferroelectric thin film, which may comprise PZT or PZLT. The second layer may be a metal and the electrical energy barrier may be a Schottky barrier.
    Type: Application
    Filed: April 12, 2011
    Publication date: January 31, 2013
    Inventors: Kui Yao, Bee Keen Gan, Szu Cheng Lai
  • Publication number: 20130009265
    Abstract: An avalanche photodiode (APD) has a first semiconductor substrate having a first doping type. A first semiconductor layer is on top of the first semiconductor substrate. The first semiconductor layer is doped with the first doping type. A second epitaxial layer is on top of the first semiconductor layer. The second epitaxial layer is in-situ doped with the first doping type at a concentration higher than a concentration of the first doping type in the first semiconductor layer. A third epitaxial layer is on top of the second epitaxial layer. The third epitaxial layer is in-situ doped with a second doping type. The doping of the third epitaxial region forms a first p-n junction with the doping of the second epitaxial layer, wherein a carrier multiplication region includes the first p-n junction, and wherein the third epitaxial layer forms an absorption region for photons. A first implanted region is within the third epitaxial layer. The implanted region is doped with the second doping type.
    Type: Application
    Filed: July 8, 2011
    Publication date: January 10, 2013
    Applicant: Excelitas Technologies Corp.
    Inventors: Henri DAUTET, Martin COUTURE
  • Patent number: 8247853
    Abstract: A stratified photodiode for high resolution CMOS image sensors implemented with STI technology is provided. The photodiode includes a semi-conductive layer of a first conductivity type, multiple doping regions of a second conductivity type, multiple doping regions of the first conductivity type, and a pinning layer. The multiple doping regions of the second conductivity type are formed to different depths in the semi-conductive layer. The multiple doping regions of the first conductivity type are disposed between the multiple doping regions of the second conductivity type and form multiple junction capacitances without full depletion. In particular, the stratified doping arrangement allows the photodiode to have a small size, high charge storage capacity, low dark current, and low operation voltages.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: August 21, 2012
    Assignee: Intellectual Ventures II LLC
    Inventor: Jaroslav Hynecek
  • Publication number: 20110303904
    Abstract: A photovoltaic device and method of manufacturing is disclosed. In one embodiment, the device includes a silicon layer and first and second organic layers. The silicon layer has a first face and a second face. First and second electrodes electrically are coupled to the first and second organic layers. A first heterojunction is formed at a junction between the one of the faces of the silicon layer and the first organic layer. A second heterojunction is formed at a junction between one of the faces of the silicon layer and the second organic layer. The silicon layer may be formed without a p-n junction. At least one organic layer may be configured as an electron-blocking layer or a hole-blocking layer. At least one organic layer may be comprised of phenanthrenequinone (PQ). A passivating layer may be disposed between at least one of the organic layers and the silicon layer. The passivating layer may be organic. At least one of the organic layers may passivate a surface of the silicon layer.
    Type: Application
    Filed: May 23, 2011
    Publication date: December 15, 2011
    Inventors: Sushobhan Avasthi, James C. Sturm, Jeffrey Schwartz
  • Patent number: 8035186
    Abstract: A photodetector is formed from a body of semiconductor material substantially surrounded by dielectric surfaces. A passivation process is applied to at least one surface to reduce the rate of carrier generation and recombination on that surface. Photocurrent is read out from at least one electrical contact, which is formed on a doped region whose surface lies entirely on a passivated surface. Unwanted leakage current from un-passivated surfaces is reduced through one of the following methods. (a) The un-passivated surface is separated from the photo-collecting contact by at least two junctions (b) The un-passivated surface is doped to a very high level, at least equal to the conduction band or valence band density of states of the semiconductor (c) An accumulation or inversion layer is formed on the un-passivated surface by the application of an electric field. Electrical contacts are made to all doped regions, and bias is applied so that a reverse bias is maintained across all junctions.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: October 11, 2011
    Assignee: Infrared Newco, Inc.
    Inventors: Conor S. Rafferty, Clifford A. King
  • Publication number: 20110147877
    Abstract: A broadband radiation detector includes a first layer having a first type of electrical conductivity type. A second layer has a second type of electrical conductivity type and an energy bandgap responsive to radiation in a first spectral region. A third layer has the second type of electrical conductivity type and an energy bandgap responsive to radiation in a second spectral region comprising longer wavelengths than the wavelengths of the first spectral region. The broadband radiation detector further includes a plurality of internal regions. Each internal region may be disposed at least partially within the third layer and each internal region may include a refractive index that is different from a refractive index of the third layer. The plurality of internal regions may be arranged according to a regularly repeating pattern.
    Type: Application
    Filed: December 17, 2009
    Publication date: June 23, 2011
    Applicant: Raytheon Company
    Inventors: Justin G. A. Wehner, Scott M. Johnson
  • Publication number: 20090321642
    Abstract: A detector of incident infrared radiation has a first region with a first spectral response, and a second region with a second, different spectral response. The second absorption region is stacked on the first and may be separated therefrom by a region in which the chemical composition of the compound semiconductor is graded. Separate contacts are provided to the first and second absorption regions and a further common contact is provided so as to permit the application of either a bias voltage or a skimming voltage across the respective pn junctions. The detector may be operated such that a preselected one of the absorption regions responds to incident infrared radiation of a predetermined waveband while the other absorption region acts as a skimmer of dark current, thereby enhancing the signal to noise ratio of the detector.
    Type: Application
    Filed: April 30, 2008
    Publication date: December 31, 2009
    Applicant: EPIR TECHNOLOGIES, INC.
    Inventors: Silviu VELICU, Christoph GREIN, Sir B. Rafol, Sivalingam SIVANANTHAN
  • Publication number: 20090121308
    Abstract: A two-dimensional, temporally modulated electromagnetic wavefield, preferably in the ultraviolet, visible or infrared spectral range, can be locally detected and demodulated with one or more sensing elements. Each sensing element consists of a resistive, transparent electrode (E) on top of an insulated layer (O) that is produced over a semiconducting substrate whose surface is electrically kept in depletion. The electrode (E) is connected with two or more contacts (C1; C2) to a number of clock voltages that are operated synchronously with the frequency of the modulated wavefield. In the electrode and in the semiconducting substrate lateral electric fields are created that separate and transport photogenerated charge pairs in the semiconductor to respective diffusions (D1; D2) close to the contacts (C1; C2).
    Type: Application
    Filed: January 19, 2009
    Publication date: May 14, 2009
    Applicant: MESA IMAGING AG
    Inventor: Peter Seitz
  • Publication number: 20080265282
    Abstract: Disclosed is an improved semiconductor structure (e.g., a silicon germanium (SiGe) hetero-junction bipolar transistor) having a narrow essentially interstitial-free SIC pedestal with minimal overlap of the extrinsic base. Also, disclosed is a method of forming the transistor which uses laser annealing, as opposed to rapid thermal annealing, of the SIC pedestal to produce both a narrow SIC pedestal and an essentially interstitial-free collector. Thus, the resulting SiGe HBT transistor can be produced with narrower base and collector space-charge regions than can be achieved with conventional technology.
    Type: Application
    Filed: April 30, 2007
    Publication date: October 30, 2008
    Inventors: Oleg Gluschenkov, Rajendran Krishnasamy, Kathryn T. Schonenberg