Abstract: An approach is provided for forming a backside illuminated image sensor that includes a semiconductor substrate having a front side and backside, a sensor element formed overlying the frontside of the semiconductor substrate, and a capacitor formed overlying the sensor element.

Abstract: A backside illuminated image sensor includes a semiconductor substrate having a front side and backside, a sensor element formed overlying the frontside of the semiconductor substrate, and a capacitor formed overlying the sensor element.

Abstract: A non-uniform gate dielectric charge for pixel sensor cells, e.g., CMOS optical imagers, and methods of manufacturing are provided. The method includes forming a gate dielectric on a substrate. The substrate includes a source/drain region and a photo cell collector region. The method further includes forming a non-uniform fixed charge distribution in the gate dielectric. The method further includes forming a gate structure on the gate dielectric.

Abstract: A method for manufacturing a semiconductor device includes steps of forming an embedded channel 12 in a semiconductor substrate 11, forming a resist layer on the embedded channel 12 through an oxide film 14, exposing the resist layer using a grating mask the light transmissivity of which varies toward transfer directions of electric charges, developing the exposed resist layer to form a resist mask having a gradient, forming a first impurity region 13 having a concentration gradient by injecting ions into the embedded channel 12 through the resist mask, and arranging transfer electrodes 15 at prescribed positions on the first impurity region 13 through the oxide film 14 after removing the resist mask, wherein a potential profile becomes deeper toward the transfer directions of the electric charges.

Abstract: In the manufacture of an electronic device such as an active matrix display, a vertical amorphous PIN photodiode or similar thin-film diode (D) is advantageously integrated with a polysilicon TFT (TFT1, TFT2) in a manner that permits a good degree of optimization of the respective TFT and diode properties while being compatible with the complex pixel context of the display. High temperature processes for making the active semiconductor film (10) of the TFT more crystalline than an active semiconductor film (40) of the diode and for forming the source and drain doped regions (s1,s2, d1,d2) of the TFT are carried out before depositing the active semiconductor film (40) of the diode. Thereafter, the lateral extent of the diode is defined by etching while protecting with an etch-stop film (30) an interconnection film (20) that can provide a doped bottom electrode region (41) of the diode as well as one of the doped regions (s2, g1) of the TFT.

Abstract: Provided is a manufacturing method of a CCD solid-state imaging device having such an impurity concentration distribution with which shading is reduced and formation of a buried channel endowed with a large saturation signal charge amount is made possible. The manufacturing method includes: an oxide layer forming step of forming an oxide layer (12) on a semiconductor substrate (11); an ion implantation step of performing ion implantation through the oxide layer (12) to the semiconductor substrate (11) thereby forming a well in a position corresponding to a charge transfer portion; and an insulation layer forming step of performing insulation layer forming processing to the oxide layer (12) having undergone the ion implantation step, at least in a position corresponding to the well.

Abstract: An image sensor and a method of fabricating the image sensor are provided. The image sensor includes a semiconductor substrate having a first conductivity type, a deep well having a second conductivity type. The deep well is formed at a predetermined depth in the semiconductor substrate to divide the semiconductor substrate into a first conductivity type upper substrate area and a lower substrate area. The image sensor further includes a plurality of unit pixels integrating charges corresponding to incident light and comprising first conductivity type ion-implantation areas. The first conductivity type ion-implantation areas are separated from one another. Moreover, at least one unit pixel among the plurality of unit pixels further comprises the first conductivity type upper substrate area that is positioned under a first conductivity type ion-implantation area included in the unit pixel.

Abstract: A solid image capturing element comprising a plurality of vertical shift registers arranged to each correspond to a column of a plurality of light receiving pixels in a matrix arrangement, a horizontal shift register provided on an output side of the plurality of vertical shift registers, and an output section provided on an output side of the horizontal shift register. In this solid image capturing element, a reverse conductive semiconductor region is formed over one major surface of one conductive semiconductor substrate, the plurality of light receiving pixels, the plurality of vertical shift registers, the horizontal shift register, and the output section are formed in the semiconductor region, and a portion of the semiconductor region where the output section is formed has a higher dopant concentration than the portion of the semiconductor region where the horizontal shift register is formed.

Abstract: A source region and drain region are formed in a surface region of a first semiconductor region. Moreover, a second semiconductor region connected to the drain region is formed in the surface region of the first semiconductor region. A third semiconductor region is formed in the first semiconductor region under the second semiconductor region, connected to the second semiconductor region, and accumulates signal charges in accordance with an incident light. A fourth semiconductor region is formed in the surface region of the first semiconductor region between the drain region and source region. Moreover, these source region, drain region, second semiconductor region, and third semiconductor region constitute a pixel, and different voltages are supplied to the drain region in an accumulation period of the signal charges in the pixel, signal readout period, and discharge period of the signal charges.

Abstract: A semiconductor apparatus comprises: a light input/output portion provided in an upper portion of a semiconductor substrate, the light input/output portion having an opening region for light associated to the light input/output portion to pass through; a transparent film covering the opening region; and an interlayer lens provided on the transparent film, the interlayer lens positioned such that an optical axis of the interlayer lens is parallel to a central axis of the opening region.

Abstract: An interline transfer type image sensing device that can be operated at high speed and with low image smear is described. The device incorporates a refractory metal layer which is used for both a light shield over the vertical charge transfer region and as a wiring layer for low resistance strapping of poly crystalline silicon (polysilicon) gate electrodes for the vertical charge transfer region. Plugs provided by a separate metallization layer connect the refractory light shield to the polysilicon gate electrode. These plugs allow high temperature processing after refractory light shield patterning for improved sensor performance without degradation of the polysilicon gate electrode or the refractory lightshield layer.