Abstract: A silicon-on-insulator (SOI) neutron detector comprising a silicon-on-insulator structure, wherein the silicon-on-insulator structure consists of an active semiconductor layer, a buried layer, and a handle substrate, a lateral carrier transport and collection detector structure within the active semiconductor layer of the silicon-on-insulator structure, and a neutron to high energy particle converter layer on the active semiconductor layer.

Abstract: In one aspect, the present invention provides a silicon photodetector having a surface layer that is doped with sulfur inclusions with an average concentration in a range of about 0.5 atom percent to about 1.5 atom percent. The surface layer forms a diode junction with an underlying portion of the substrate. A plurality of electrical contacts allow application of a reverse bias voltage to the junction in order to facilitate generation of an electrical signal, e.g., a photocurrent, in response to irradiation of the surface layer. The photodetector exhibits a responsivity greater than about 1 A/W for incident wavelengths in a range of about 250 nm to about 1050 nm, and a responsivity greater than about 0.1 A/W for longer wavelengths, e.g., up to about 3.5 microns.

Abstract: An electron detector (30) for detection of electrons comprises a semiconductor wafer (11) having a central portion (12) with a thickness of at most 150 ?m, preferably at most 100 ?m, formed by etching an area of a thicker wafer. On opposite sides of the central portion (12) there are n-type and p-type contacts (16, 31). In operation, a reverse bias is applied across the contacts (16, 31) and electrons incident on the layer (15) of intrinsic semiconductor material between the contacts (16, 31) generate electron-hole pairs which accelerate towards the contacts (16, 31) where they may detected as a signal. Conductive terminals (24, 32) contact the contacts (16, 31) and are connected to a signal processing circuit in IC chips (28, 37) mounted to the semiconductor wafer (11) outside the active area of the detector (30). The contacts (16, 31) are shaped as arrays of strips extending orthogonally on the two sides of the intrinsic layer (15) to provide two-dimensional spatial resolution.

Abstract: An alpha voltaic battery includes at least one layer of a semiconductor material comprising at least one p/n junction, at least one absorption and conversion layer on the at least one layer of semiconductor layer, and at least one alpha particle emitter. The absorption and conversion layer prevents at least a portion of alpha particles from the alpha particle emitter from damaging the p/n junction in the layer of semiconductor material. The absorption and conversion layer also converts at least a portion of energy from the alpha particles into electron-hole pairs for collection by the one p/n junction in the layer of semiconductor material.

Abstract: Some embodiments include methods for fabricating an alpha particle emitter and detector associated with an integrated circuit chip. Some embodiments include an integrated circuit chip comprising an alpha particle emitter and detector supported by a semiconductor substrate. Some embodiments include an apparatus for obtaining backscatter data from a sample utilizing an alpha particle emission and detection system supported by a semiconductor substrate. Some embodiments include methods of backscatter analysis utilizing a semiconductor substrate containing an alpha particle emitter and an alpha particle sensor.

Abstract: An electron detector (30) for detection of electrons comprises a semiconductor wafer (11) having a central portion (12) with a thickness of at most 150 ?m, preferably at most 100 ?m, formed by etching an area of a thicker wafer. On opposite sides of the central portion (12) there are n-type and p-type contacts (16, 31). In operation, a reverse bias is applied across the contacts (16, 31) and electrons incident on the layer (15) of intrinsic semiconductor material between the contacts (16, 31) generate electron-hole pairs which accelerate towards the contacts (16, 31) where they may detected as a signal. Conductive terminals (24, 32) contact the contacts (16, 31) and are connected to a signal processing circuit in IC chips (28, 37) mounted to the semiconductor wafer (11) outside the active area of the detector (30). The contacts (16, 31) are shaped as arrays of strips extending orthogonally on the two sides of the intrinsic layer (15) to provide two-dimensional spatial resolution.

Abstract: The technique capable of reducing the power consumption in the MISFET by suppressing the scattering of the carriers due to the fixed charges is provided. A silicon oxynitride film with a physical thickness of 1.5 nm or more and the relative dielectric constant of 4.1 or higher is formed at the interface between a semiconductor substrate and an alumina film. By so doing, a gate insulator composed of the silicon oxynitride film and the alumina film is constituted. The silicon oxynitride film is formed by performing a thermal treatment of a silicon oxide film formed on the semiconductor substrate in a NO or N2O atmosphere. In this manner, the fixed charges in the silicon oxynitride film are set to 5×1012 cm?2 or less, and the fixed charges in the interface between the silicon oxynitride film and the alumina film are set to 5×1012 cm?2 or more.