Having At Least Two P-n Junctions (epo) Patents (Class 257/E33.047)
  • Patent number: 11804693
    Abstract: A method for generating light emission is provided. The method includes providing a transistor element including collector, emitter, and base regions, a quantum cascade region between the base and collector regions, and quantum well structures for interband emission within the base or emitter regions. A waveband controller applies, via first and second electrodes with respect to the collector and base regions, a first electrical signal to control a base-collector junction bias level and select between first and second base-collector bias levels. Selection of the first base-collector bias level causes at least one of the emitter and base regions to produce interband-based light emission having a first wavelength of a first wavelength band. Selection of the second base-collector bias level causes the quantum cascade region to produce intraband-based light emission having a second wavelength of a second wavelength band.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: October 31, 2023
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Gary S. Kanner, Maurice Leroy Strong, III
  • Patent number: 10103343
    Abstract: The application relates to a vertical organic transistor having a layer structure on a substrate. The layer structure includes an electrode, a counter-electrode, and an electronically active layer arrangement which is disposed between the electrode and the counter-electrode. The application further relates to a method for fabricating a vertical organic transistor and a circuit arrangement.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: October 16, 2018
    Assignee: NOVALED GMBH
    Inventors: Axel Fischer, Bjoern Luessem, Karl Leo
  • Patent number: 10025120
    Abstract: Methods and systems for a low-parasitic silicon high-speed phase modulator are disclosed and may include fabricating an optical phase modulator that comprises a PN junction waveguide formed in a silicon layer, wherein the silicon layer may be on an oxide layer and the oxide layer may be on a silicon substrate. The PN junction waveguide may have p-doped and n-doped regions on opposite sides along a length of the PN junction waveguide, and portions of the p-doped and n-doped regions may be removed. Contacts may be formed on remaining portions of the p-doped and n-doped regions. Portions of the p-doped and n-doped regions may be removed symmetrically about the PN junction waveguide. Portions of the p-doped and n-doped regions may be removed in a staggered fashion along the length of the PN junction waveguide. Etch transition features may be removed along the p-doped and n-doped regions.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: July 17, 2018
    Assignee: Luxtera, Inc.
    Inventors: Ali Ayazi, Gianlorenzo Masini, Subal Sahni, Attila Mekis, Thierry Pinguet
  • Patent number: 9983375
    Abstract: A surface light emitting semiconductor laser element, comprises a substrate, a lower reflector including a semiconductor multi-layer disposed on the substrate, an active layer disposed on the lower reflector, an upper reflector including a semiconductor multi-layer disposed on the active layer, a compound semiconductor layer having a first opening for exposing the upper reflector and extending over the upper reflector, and a metal film having a second opening for exposing the upper reflector disposed inside of the first opening and extending over the compound semiconductor layer, wherein the metal film and the compound semiconductor layer constitute a complex refractive index distribution structure where a complex refractive index is changed from the center of the second opening towards the outside. A method of emitting laser light in a single-peak transverse mode is also provided.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: May 29, 2018
    Assignee: Sony Corporation
    Inventors: Yoshiaki Watanabe, Hironobu Narui, Yuichi Kuromizu, Yoshinori Yamauchi, Yoshiyuki Tanaka
  • Patent number: 9627650
    Abstract: To provide a novel light-emitting device, a light-emitting device that emits light of a plurality of colors includes a first light-emitting element and a second light-emitting element. The first light-emitting element includes a first lower electrode, a first light-emitting layer over the first lower electrode, a second light-emitting layer over the first light-emitting layer, and an upper electrode over the second light-emitting layer. The second light-emitting element includes a second lower electrode, the first light-emitting layer over the second lower electrode, the second light-emitting layer over the first light-emitting layer, and the upper electrode over the second light-emitting layer. An emission spectrum of the first light-emitting layer peaks at a longer wavelength than an emission spectrum of the second light-emitting layer.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: April 18, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Seo, Toshiki Sasaki
  • Patent number: 8748911
    Abstract: Light emitting systems are disclosed. The light emitting system emits an output light that has a first color. The light emitting system includes a first electroluminescent device that emits light at a first wavelength in response to a first signal. The first wavelength is substantially independent of the first signal. The intensity of the emitted first wavelength light is substantially proportional to the first signal. The light emitting system further includes a first luminescent element that includes a second electroluminescent device and a first light converting layer. The second electroluminescent device emits light at a second wavelength in response to a second signal. The first light converting layer includes a semiconductor potential well and converts at least a portion of light at the second wavelength to light at a third wavelength that is longer than the second wavelength.
    Type: Grant
    Filed: July 14, 2009
    Date of Patent: June 10, 2014
    Assignee: 3M Innovative Properties Company
    Inventors: Michael A. Haase, James A. Thielen, Catherine A. Leatherdale, Billy L. Weaver, Terry L. Smith
  • Patent number: 8552414
    Abstract: An electronically scannable multiplexing device is capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing device generates an electronically scannable conducting channel with two oppositely formed depletion regions. The depletion width of each depletion region is controlled by a voltage applied to a respective control gate at each end of the multiplexing device. The present multi-bit addressing technique allows, for example, 10 to 100 bits of data to be accessed or addressed at a single node. The present invention can also be used to build a programmable nanoscale logic array or for randomly accessing a nanoscale sensor array.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: October 8, 2013
    Assignee: International Business Machines Corporation
    Inventors: Hemantha Kumar Wickramasinghe, Kailash Gopalakrishnan
  • Publication number: 20130234168
    Abstract: Provided is a light-emitting element including a semiconductor substrate, an island structure formed on the semiconductor substrate and including at least a current confining layer and p-type and n-type semiconductor layers, a light-emitting thyristor formed in the island structure and having a pnpn structure, and a shift thyristor formed in the island structure and having a pnpn structure, wherein the island structure includes a first side surface having a first depth such that the first side surface does not reach the current confining layer in a formation region of the shift thyristor and a second side surface having a second depth such that the second side surface reaches at least the current confining layer in a formation region of the light-emitting thyristor, and an oxidized region selectively oxidized from the second side surface is formed in the current confining layer in the formation region of the light-emitting thyristor.
    Type: Application
    Filed: August 1, 2012
    Publication date: September 12, 2013
    Applicant: FUJI XEROX CO., LTD.
    Inventors: Taku KINOSHITA, Michiaki MURATA, Takashi KONDO, Kazutaka TAKEDA, Hideo NAKAYAMA
  • Patent number: 8476652
    Abstract: A three-dimensional LED structure with vertically displaced active-region includes at least two groups of vertically displaced surfaces on a non-planar substrate. The first group of surfaces are separated from the second group of surfaces by a vertical distance in the growth direction of the LED structure. The first group of surfaces are connected to the second group of surfaces by sidewalls, respectively. The sidewalls can be inclined or vertical and have a sufficient height so that a layer such as an n-type layer, an active-region, or a p-type layer in a first LED structure deposited on the first group of surfaces and a corresponding layer such as an n-type layer, an active-region, or a p-type layer in a second LED structure deposited on the second group of surfaces are separated by the sidewalls. The two groups of surfaces may be vertically displaced from each other in certain areas of an LED chip, while merge into an integral surface in other areas.
    Type: Grant
    Filed: July 30, 2010
    Date of Patent: July 2, 2013
    Assignee: InvenLux Corporation
    Inventors: Chunhui Yan, Jianping Zhang, Ying Liu, Fanghai Zhao, Kevin Ma
  • Publication number: 20130134898
    Abstract: A light emitting diode (LED), wherein the LED comprises a plurality of active regions, each of the plurality of active regions of the LED configured to produce a distinct emission falling within a primary wavelength range, the LED further configured to control the intensity of the distinct emission from each of the plurality of active regions thereby producing an output emission in a wavelength range of any desired color.
    Type: Application
    Filed: November 29, 2011
    Publication date: May 30, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Eric W. B. Dias
  • Patent number: 8450755
    Abstract: Light-emitting elements have a problem that their light-extraction efficiency is low due to scattered light or reflected light inside the light-emitting elements. The light-extraction efficiency of the light-emitting elements needs to be enhanced by a new method. According to the present invention, a light-emitting element includes a first layer generating holes, a second layer including a light-emitting layer for each emission color and a third layer generating electrons between an anode and a cathode, and the thickness of the first layer is different depending on each layer including the light-emitting layer for each emission color. A layer in which an organic compound and a metal oxide are mixed is used as the first layer, and thus, the driving voltage is not increased even when the thickness is increased, which is preferable.
    Type: Grant
    Filed: April 18, 2012
    Date of Patent: May 28, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Seo, Daisuke Kumaki, Hisao Ikeda, Junichiro Sakata
  • Patent number: 8384096
    Abstract: A semiconductor component comprising at least one optically active first region (112) for emitting electromagnetic radiation (130) in at least one emission direction and at least one optically active second region (122) for emitting electromagnetic radiation (130) in the at least one emission direction. The first region (112) is here arranged in a first layer (110) and the second region (122) in a second layer (120), the second layer (120) being arranged over the first layer (110) in the emission direction and comprising a first passage region (124) assigned to the first region (112), which first passage region is at least partially transmissive for the electromagnetic radiation (130) of the first region (112).
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: February 26, 2013
    Assignee: Osram Opto Semiconductors GmbH
    Inventor: Siegfried Herrmann
  • Publication number: 20120205688
    Abstract: Light-emitting elements have a problem that their light-extraction efficiency is low due to scattered light or reflected light inside the light-emitting elements. The light-extraction efficiency of the light-emitting elements needs to be enhanced by a new method. According to the present invention, a light-emitting element includes a first layer generating holes, a second layer including a light-emitting layer for each emission color and a third layer generating electrons between an anode and a cathode, and the thickness of the first layer is different depending on each layer including the light-emitting layer for each emission color. A layer in which an organic compound and a metal oxide are mixed is used as the first layer, and thus, the driving voltage is not increased even when the thickness is increased, which is preferable.
    Type: Application
    Filed: April 18, 2012
    Publication date: August 16, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Satoshi SEO, Daisuke KUMAKI, Hisao IKEDA, Junichiro SAKATA
  • Patent number: 8148736
    Abstract: In a flip chip type light-emitting element of the present invention, an n type contact electrode 14 is formed on an n layer 11 exposed in a comb-tooth shape, a light transmission electrode 15 made of an ITO is formed over the entire surface of an upper surface of a p layer 13 and twenty pad electrodes 16 are formed at prescribed intervals on the light transmission electrode 15. The plane form of the pad electrode 16 has four branches 16b protruding in the form of a cross from a circular central part 16a and the adjacent pad electrodes 16 connected to each other by the branches 16b.
    Type: Grant
    Filed: August 7, 2008
    Date of Patent: April 3, 2012
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Kosuke Yahata, Naoki Nakajo
  • Patent number: 8134178
    Abstract: According to an aspect of the invention, a light-emitting element includes a shift thyristor, a light emitting thyristor, and a vertical type gate load resistor. The shift thyristor includes a first anode layer, a first gate layer, and a first cathode layer. The light-emitting thyristor includes a second anode layer, a second gate layer, and a second cathode layer. The vertical type gate load resistor is arranged on the first gate layer under a power line and limits a current flowing from the first gate layer and the second gate layer to the power line.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: March 13, 2012
    Assignee: Fuji Xerox Co., Ltd.
    Inventor: Seiji Ohno
  • Publication number: 20110300656
    Abstract: A method for forming a pixel of an LED light source is provided. The method includes: forming a first layer on a first substrate; forming a second layer and a first light-emitting active layer on the first layer; forming a first intermediate layer on the second layer; forming a third layer on a second substrate; forming a fourth layer and a second light-emitting active layer on the third layer; placing the third layer, the fourth layer, and the second light-emitting active layer on the first intermediate layer, wherein the first light-emitting active layer and the second light-emitting active layer emit different colors of light. A method for forming a plurality of light-emitting diode pixels arranged in a two-dimensional array is also provided.
    Type: Application
    Filed: August 22, 2011
    Publication date: December 8, 2011
    Applicant: Industrial Technology Research Institute
    Inventors: Han-Tsung Hsueh, Hsi-Hsuan Yen, Wen-Yung Yeh, Mu-Tao Chu
  • Patent number: 7948004
    Abstract: A self-scanning light source head comprising: a substrate, surface emitting semiconductor lasers arranged in an array on the substrate, and at least one thyristor disposed on the substrate and serving as a switching element selectively turning ON and OFF light emission of the surface emitting semiconductor lasers, and an image forming apparatus using the same are provided.
    Type: Grant
    Filed: November 14, 2008
    Date of Patent: May 24, 2011
    Assignee: Fuji Xerox Co., Ltd.
    Inventor: Teiichi Suzuki
  • Publication number: 20110062451
    Abstract: According to an aspect of the invention, a light-emitting element includes a shift thyristor, a light emitting thyristor, and a vertical type gate load resistor. The shift thyristor includes a first anode layer, a first gate layer, and a first cathode layer. The light-emitting thyristor includes a second anode layer, a second gate layer, and a second cathode layer. The vertical type gate load resistor is arranged on the first gate layer under a power line and limits a current flowing from the first gate layer and the second gate layer to the power line.
    Type: Application
    Filed: January 28, 2010
    Publication date: March 17, 2011
    Applicant: FUJI XEROX CO., LTD.
    Inventor: Seiji Ohno
  • Publication number: 20110063400
    Abstract: The light-emitting chip includes: a substrate; plural light-emitting thyristors each having a pnpn structure formed of a first stacked-semiconductor layer in which at least 4 semiconductor layers having different conductivity types and including the substrate are stacked on the substrate; a lower wiring that is formed of a second stacked-semiconductor layer in which at least 3 semiconductor layers having different conductivity types and including the substrate are stacked on the substrate, and that has a semiconductor layer between the substrate and an uppermost semiconductor layer of the second stacked-semiconductor layer, the semiconductor layer having a fixed potential so that any one of p-n junctions between the substrate and the uppermost semiconductor layer is reversely biased with respect to potentials respectively applied to the substrate and the uppermost semiconductor layer; and an upper wiring provided on the lower wiring so as to intersect with the lower wiring through an isolation layer.
    Type: Application
    Filed: March 18, 2010
    Publication date: March 17, 2011
    Applicant: FUJI XEROX CO., LTD.
    Inventor: Yoshinao Kondoh
  • Patent number: 7851810
    Abstract: A semiconductor light emitting device includes a multi-layered semiconductor layer having at least a first conductive type cladding layer, an active layer, a second conductive type first cladding layer, an etching stop layer, and a second conductive type second cladding layer on a substrate. An upper section of a ridge groove is formed by an anisotropic etching process, as a first groove in such a way as to have a depth from a surface of the multi-layered semiconductor layer and as not to cross the etching stop layer at the depth. A bottom groove of the ridge groove is formed by an isotropic etching process, as a second groove by performing etching in such a way as to be stopped by the etching stop layer.
    Type: Grant
    Filed: December 8, 2006
    Date of Patent: December 14, 2010
    Assignee: Sony Corporation
    Inventors: Mari Chiba, Hisashi Kudo, Shinichi Agatsuma
  • Patent number: 7763902
    Abstract: A LED chip including a substrate, a first type doped semiconductor layer, a second type doped semiconductor layer, a light emitting layer, at least an Indium-doped AlxGa1-xN based material layer (0?x<1) and at least a tunneling junction layer is provided. The first type doped semiconductor layer is disposed on the substrate, and the light emitting layer is disposed between the first type doped semiconductor layer and the second type doped semiconductor layer. The Indium-doped AlxGa1-xN based material layer is disposed on at least one surface of the light emitting layer, and the tunneling junction layer is disposed between the Indium-doped AlxGa1-xN based material layer and the first type doped semiconductor layer and/or disposed between the Indium-doped AlxGa1-xN based material layer and the second type doped semiconductor layer, wherein the Indium-doped AlxGa1-xN based material layer and the tunneling junction layer are disposed on the same side of the light emitting layer.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: July 27, 2010
    Assignee: Formosa Epitaxy Incorporation
    Inventors: Liang-Wen Wu, Fen-Ren Chien
  • Publication number: 20100109020
    Abstract: A light emitting diode includes a conductive layer, an n-GaN layer on the conductive layer, an active layer on the n-GaN layer, a p-GaN layer on the active layer, and a p-electrode on the p-GaN layer. The conductive layer is an n-electrode.
    Type: Application
    Filed: January 7, 2010
    Publication date: May 6, 2010
    Inventor: Myung Cheol Yoo
  • Patent number: 7709845
    Abstract: The invention relates to a high-quality semiconductor light emitting device which suppresses current concentration. The semiconductor light emitting device includes an n-type semiconductor layer, an active layer and a p-type semiconductor layer sequentially formed on a substrate. The semiconductor light emitting device further includes a p-electrode formed on the p-type semiconductor layer and an n-electrode formed on a surface of a mesa-etched portion of the n-type semiconductor layer. A trench is formed in the n-type semiconductor layer to prevent current concentration. The trench is extended from an upper surface of the mesa-etched portion of the n-type semiconductor layer or from a bottom surface of the substrate into the n-type semiconductor layer at a predetermined depth.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: May 4, 2010
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Kun Yoo Ko, Young Ho Park, Bok Ki Min, Hyung Jin Park, Seok Min Hwang
  • Patent number: 7692202
    Abstract: A semiconductor structure with active zones, such as light diodes or photodiodes, including a substrate (SUB) with at least two active zones (AZ1-AZn), each of which emits or absorbs a radiation of differing wavelength. According to the invention, a multi-wavelength diode may be achieved, in which a first (lower) active zone (AZ1) is grown on a surface of the substrate (SUB), with one or several further active zones (AZ1-Azn) epitaxially grown one on the other and the active zones (AZ1-AZn) are serially connected from the lower active zone (AZ1) to an upper active zone (AZn), by means of tunnel diodes (TD1-TDn), serving as low-impedance resistors.
    Type: Grant
    Filed: January 26, 2005
    Date of Patent: April 6, 2010
    Assignee: Azur Space Solar Power GmbH
    Inventor: Werner Bensch
  • Patent number: 7683396
    Abstract: A high power light emitting device assembly with electro-static-discharge (ESD) protection ability and the method of manufacturing the same, the assembly comprising: at least two sub-mounts, respectively being electrically connected to an anode electrode and a cathode electrode, each being made of a metal of high electric conductivity and high thermal conductivity; a light emitting device, arranged on the sub-mounts; and an ESD protection die, sandwiched and glued between the sub-mounts, for enabling the high-power operating light emitting device to have good heat dissipating path while preventing the same to be damaged by transient power overload of static surge.
    Type: Grant
    Filed: October 18, 2006
    Date of Patent: March 23, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Chieh Chou, Wen-Shan Lin, Hung-Hsin Tsai
  • Patent number: 7589350
    Abstract: A light-emitting diode chip (LED chip) including a substrate, an electrostatic conducting layer, a first type doped semiconductor layer, an active layer, a second type doped semiconductor layer, a first electrode and a second electrode is provided. The electrostatic conducting layer is disposed on the substrate, while the first type doped semiconductor layer is disposed on a partial area of the electrostatic conducting layer. Besides, the active layer is disposed on a partial area of the first type doped semiconductor layer, while the second type doped semiconductor layer is disposed on the active layer. In addition, the first electrode is disposed on the first type doped semiconductor layer, while the second electrode is disposed on the second type doped semiconductor layer. The LED chip of the present invention has an electrostatic conducting layer, which protects the LED from electrostatic discharge damage (ESD damage).
    Type: Grant
    Filed: June 20, 2006
    Date of Patent: September 15, 2009
    Assignee: Formosa Epitaxy Incorporation
    Inventors: Ming-Sheng Chen, Liang-Wen Wu, Fen-Ren Chien
  • Publication number: 20090166646
    Abstract: A light-emitting element including a light-emitting thyristor and a Schottky barrier diode is provided. A Schottky barrier diode is formed by contacting a metal terminal to a gate layer of a three-terminal light-emitting thyristor consisting of a PNPN-structure. A self-scanning light-emitting element array may be driven at 3.0V by using such a Schottky barrier diode as a coupling diode of a diode-coupled self-scanning light-emitting element array.
    Type: Application
    Filed: February 27, 2009
    Publication date: July 2, 2009
    Applicant: Fuji Xerox Co., Ltd.
    Inventor: Seiji Ohno
  • Patent number: 7501662
    Abstract: A semiconductor light emitting element array includes a substrate made of SiC and having a first surface and a second surface opposite to the first surface. The array also includes a plurality of semiconductor light emitting elements supported by the first surface of the substrate. Each of the light emitting elements includes an n-type semiconductor layer, an active layer, and a p-type semiconductor layer. The second surface of the substrate serves as a light emitting surface, from which light produced by the light emitting elements is emitted out.
    Type: Grant
    Filed: May 9, 2007
    Date of Patent: March 10, 2009
    Assignee: Rohm Co., Ltd.
    Inventors: Masayuki Sonobe, Yukio Shakuda
  • Publication number: 20080303041
    Abstract: A light emitting element, and a manufacturing method thereof, and a light emitting module using the same are provided. The light emitting element includes a first light emitting diode (LED), a second LED, a first electrode and a second electrode. The first LED is disposed on a substrate and has a first P-type semiconductor and a first N-type semiconductor. The second LED is disposed above the first LED and has a second P-type semiconductor and a second N-type semiconductor. The first electrode is electrically connected to the first P-type semiconductor and the second N-type semiconductor. The second electrode is electrically connected to the first N-type semiconductor and the second P-type semiconductor. The first electrode and the second electrode are electrically connected to an alternating current for driving the first LED and the second LED to emit light by turns.
    Type: Application
    Filed: May 14, 2008
    Publication date: December 11, 2008
    Applicant: LITE-ON TECHNOLOGY CORPORATION
    Inventor: Chih-Ming Lai
  • Publication number: 20080272379
    Abstract: In accordance with the invention, a display apparatus including a light source is provided, the light source having at least one superluminescent light emitting diode (SLED), the apparatus further having at least one light modulating device arranged in a beam path of a light beam emitted by the light source and operable to emit influenced light upon incidence of the light beam, the light modulating device being operatively connected to an electronic control, the display apparatus further having a projection optics arranged in a beam path of the influenced light.
    Type: Application
    Filed: May 1, 2007
    Publication date: November 6, 2008
    Applicant: EXALOS AG
    Inventors: Valerio Laino, Lorenzo Occhi, Christian Velez
  • Patent number: 7385225
    Abstract: A surface-emitting type device includes a rectification section including a substrate and a first semiconductor layer formed above the substrate, and an emission section including a second semiconductor layer of a first conductivity type formed above the rectification section, an active layer formed above the second semiconductor layer and a third semiconductor layer of a second conductivity type formed above the active layer, wherein the rectification section and the emission section are electrically connected in parallel with each other, and the rectification section has a rectification action in a reverse direction with respect to the emission section.
    Type: Grant
    Filed: December 9, 2005
    Date of Patent: June 10, 2008
    Assignee: Seiko Epson Corporation
    Inventor: Tomoko Koyama
  • Publication number: 20080116465
    Abstract: Provided is a light emitting transistor comprising a first conductivity-type collector layer formed on a substrate; a second conductivity-type base layer formed on the collector layer; and a first conductivity-type emitter layer formed on the base layer. At least one of the collector layer, the base layer, and the emitter layer has a nanorod structure with a plurality of nanorods.
    Type: Application
    Filed: July 26, 2007
    Publication date: May 22, 2008
    Inventors: Won Ha Moon, Chang Hwan Choi, Hyun Jun Kim