Comprising Schottky Junction (epo) Patents (Class 257/E51.009)
  • Patent number: 8569123
    Abstract: An object is to provide a method for manufacturing a silicon carbide semiconductor device in which a time required for removing a sacrificial oxide film can be shortened and damage to a surface of the silicon carbide layer can be reduced. The method for manufacturing a silicon carbide semiconductor device includes: (a) performing ion implantation to a silicon carbide layer; (b) performing activation annealing to the ion-implanted silicon carbide layer 2; (c) removing a surface layer of the silicon carbide layer 2, to which the activation annealing has been performed, by dry etching; (d) forming a sacrificial oxide film on a surface layer of the silicon carbide layer, to which the dry etching has been performed, by performing sacrificial oxidation thereto; and (e) removing the sacrificial oxide film by wet etching.
    Type: Grant
    Filed: September 1, 2009
    Date of Patent: October 29, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoshinori Matsuno, Kenichi Ohtsuka, Naoki Yutani, Kenichi Kuroda, Hiroshi Watanabe, Shozo Shikama
  • Patent number: 8372738
    Abstract: This invention discloses a gallium nitride based semiconductor power device disposed in a semiconductor substrate. The power device comprises a termination area disposed at a peripheral area of the semiconductor power device comprises a termination structure having at least a guard ring disposed in a trench filled with doped gallium-based epitaxial layer therein.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: February 12, 2013
    Assignee: Alpha & Omega Semiconductor, Inc.
    Inventor: Tinggang Zhu
  • Patent number: 8125008
    Abstract: A Schottky device and a semiconductor process of making the same are provided. The Schottky device comprises a substrate, a deep well, a Schottky contact, and an Ohmic contact. The substrate is doped with a first type of ions. The deep well is doped with a second type of ions, and formed in the substrate. The Schottky contact contacts a first electrode with the deep well. The Ohmic contact contacts a second electrode with a heavily doped region with the second type of ions in the deep well. Wherein the deep well has a geometry gap with a width formed under the Schottky contact, the first type of ions and the second type of ions are complementary, and the width of the gap adjusts the breakdown voltage.
    Type: Grant
    Filed: November 17, 2006
    Date of Patent: February 28, 2012
    Assignee: System General Corporation
    Inventors: Chiu-Chih Chiang, Chih-Feng Huang, You-Kuo Wu, Long Shih Lin
  • Patent number: 8003980
    Abstract: The present invention is drawn to a layered organic device, and a method of forming the same. The method includes steps of applying a first solvent-containing organic layer to a substrate and removing solvent from the first solvent-containing organic layer to form a first solidified organic layer. Additional steps include applying a second solvent-containing organic layer to the first solidified organic layer and removing solvent from the second solvent-containing organic layer to form a second solidified organic layer. The first solidified organic layer can be crosslinked, which suppresses negative impact to components in the first solidified organic layer when the solvent of the second solvent-containing organic layer is deposited on the first solidified organic layer.
    Type: Grant
    Filed: January 30, 2007
    Date of Patent: August 23, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Xia Sheng, Zhang-Lin Zhou, Krzysztof Nauka, Chung Ching Yang
  • Patent number: 7858456
    Abstract: Merged P-i-N Schottky device in which the oppositely doped diffusions extend to a depth and have been spaced apart such that the device is capable of absorbing a reverse avalanche energy comparable to a Fast Recovery Epitaxial Diode having a comparatively deeper oppositely doped diffusion region.
    Type: Grant
    Filed: April 11, 2006
    Date of Patent: December 28, 2010
    Assignee: Siliconix Technology C. V.
    Inventors: Davide Chiola, Kohji Andoh, Silvestro Fimiani
  • Patent number: 7851881
    Abstract: A merged PN/Schottky diode is provided having a substrate of a first conductivity type and a grid of doped wells of the second conductivity type embedded in the substrate. A Schottky barrier metal layer makes a Schottky barrier contact with the surface of the substrate above the grid. Selected embedded wells in the grid make a Schottky barrier contact to the Schottky barrier metal layer, while most embedded wells do not. The diode forward voltage drop is reduced for the same diode area with reverse blocking benefits similar to a conventional JBS structure.
    Type: Grant
    Filed: February 3, 2009
    Date of Patent: December 14, 2010
    Assignee: Microsemi Corporation
    Inventors: Feng Zhao, Bruce Odekirk, Dumitru Sdrulla
  • Patent number: 7768092
    Abstract: A semiconductor device comprises a first layer (1) of a wide band gap semiconductor material doped according to a first conductivity type and a second layer (3) on top thereof designed to form a junction blocking current in the reverse biased state of the device at the interface to said first layer. The device comprises extension means for extending a termination of the junction laterally with respect to the lateral border (6) of the second layer. This extension means comprises a plurality of rings (16-21) in juxtaposition laterally surrounding said junction (15) and being arranged as seen in the lateral direction away from said junction alternatively a ring (16-18) of a semiconductor material of a second conductivity type opposite to that of said first layer and a ring (19-21) of a semi-insulating material.
    Type: Grant
    Filed: July 20, 2005
    Date of Patent: August 3, 2010
    Assignee: Cree Sweden AB
    Inventors: Christopher Harris, Cem Basceri
  • Patent number: 7754550
    Abstract: The gate oxide in the trenches of a trench type Schottky device are formed by oxidizing a layer of polysilicon deposited in trenches of a silicon or silicon carbide substrate. A small amount of the substrate is also oxidized to create a good interface between the substrate and the oxide layer which is formed. The corners of the trench are rounded by the initial formation and removal of a sacrificial oxide layer.
    Type: Grant
    Filed: July 6, 2004
    Date of Patent: July 13, 2010
    Assignee: International Rectifier Corporation
    Inventors: Davide Chiola, Zhi He
  • Patent number: 7649217
    Abstract: An active electronic device has drain and source electrodes that make ohmic conduct with a layer of a semiconductor. The semiconductor layer may be a thin layer of an organic or amorphous semiconductor. The drain and source electrodes are on a first face of the layer of semiconductor at locations that are spaced apart on either side of a channel. The device has a gate electrode on a second face of the layer of semiconductor adjacent to the channel. The gate electrode makes a Schottky contact with the semiconductor to produce a depletion region in the channel. The gate electrode may encapsulate the channel so that the channel is protected from contact with oxygen, water molecules or other materials in the environment. In some embodiments, the device has an additional gate electrode separated from the semiconductor layer by an insulating layer. Such embodiments combine features of OFETs and MESFETs.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: January 19, 2010
    Inventors: Arash Takshi, John Madden
  • Patent number: 7453119
    Abstract: This invention discloses a semiconductor power device that includes a plurality of power transistor cells surrounded by a trench opened in a semiconductor substrate. At least one active cell further includes a trenched source contact opened between the trenches wherein the trenched source contact opened through a source region into a body region for electrically connecting the source region to a source metal disposed on top of an insulation layer wherein a trench bottom surface of the trenched source contact further covered with a conductive material to function as an integrated Schottky barrier diode in said active cell. A shielding structure is disposed at the bottom and insulated from the trenched gate to provide shielding effect for both the trenched gate and the Schottky diode.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: November 18, 2008
    Assignee: Alphs & Omega Semiconductor, Ltd.
    Inventors: Anup Bhalla, Sik K. Lui
  • Publication number: 20070241325
    Abstract: A Schottky gate field effect transistor with high speed and simple structure is provided. The Schottky gate field effect transistor includes: a source, a channel and a drain formed by one organic conductive material, in which the source, channel and drain are formed in a continuous structure within an organic conductor; a gate electrode functioning as a metal gate on one surface of the organic conductor; a Schottky barrier formed by contact between the gate electrode and the organic conductor, in which the region overlapping with the Schottky contact is the channel region.
    Type: Application
    Filed: June 9, 2005
    Publication date: October 18, 2007
    Applicant: Yamanashi University
    Inventor: Hidenori Okuzaki
  • Publication number: 20070096089
    Abstract: The present invention relates to organic semiconductor diodes, in particular, to the diodes with nonlinear current-voltage characteristics, which are used for power switching, rectifying variable signals, and frequency mixing. The organic semiconductor diode with the p-n junction comprises an anode, cathode, a hole transport layer in contact with the anode, and an electron transport layer in contact with the cathode, and two transport layers being in contact with each other. Another aspect of the present invention is a Schottky barrier diode comprising anode, cathode, and an organic semiconductor layer, wherein the semiconductor layer is either hole or electron transport layer. At least one of the transport layers is characterized by a globally ordered crystalline structure with intermolecular spacing of 3.4±0.3 ? in the direction of one crystal axis. One more aspect of the present invention is a method for obtaining an organic semiconductor layer with the electron-hole type of conductivity.
    Type: Application
    Filed: December 4, 2006
    Publication date: May 3, 2007
    Applicant: Nitto Denko Corporation
    Inventor: Pavel Lazarev