Abstract: An apparatus for fabricating semiconductor packages may include a thickness measurer configured to measure the thickness of a printed circuit board (PCB); mold dies, clamped to the top and the bottom of the PCB, through which a molding compound may be injected; and a pressure controller configured to control a clamp pressure of the mold die in response to the thickness of the PCB. The thickness of the PCB may be measured before molding the PCB, and a clamp pressure corresponding to the measured thickness may be decided. Therefore, it is possible to adjust the thickness variation of a PCB in real time, as they are being produced, to decrease the number of bad packages.

Abstract: A packaging apparatus for optical-semiconductors includes a mold base having a longitudinal receiving space, an encapsulating module attached to the mold base, and a fixing member attached to the encapsulating module. The bottom of the mold base has at least one air-vent and the mold base has a predetermined width. The encapsulating module includes a plate engaged with the mold base, a plurality of molding bodies penetrating the plate and received in the receiving space, and a plurality of supporting members connected to the molding bodies. The fixing member has a plurality of holding slots to hold the supporting members so that the supporting members are more stable. Furthermore, the width of the mold base is optimized with the dimension of a furnace so that the production rate is increased and the stability of the packaging structure is improved.

Abstract: An hermetic sealing apparatus is discussed. The apparatus may include one or more of the following a glass mask disposed on an upper surface of a first substrate, a support member disposed on an upper surface of the glass mask, a laser irradiation member positioned spaced on the upper surface of the glass mask, a plurality of lower support members disposed in a contour region of a lower surface of the second substrate, and pressing members disposed on a lower surface of the lower support members.

Abstract: A radio frequency identification tag is provided. The radio frequency identification tag includes a base, an antenna formed on the base, an integrated circuit chip electrically connected to the antenna, and a bonding layer bonding the integrated circuit chip to the base. The bonding layer includes a conductive filler. The base is configured to bend away from a surface on which the integrated circuit chip is bonded.

Abstract: Disclosed are premolded substrates for semiconductor die packages and methods of making such substrates. An exemplary premolded substrate comprises a leadframe having a first surface, a second surface, a central portion disposed between the first and second surfaces, and a plurality of electrically conductive leads disposed about the central portion; a body of electrically insulating material disposed in a portion of the central portion of the leadframe and between the leads of the leadframe; and an aperture disposed in the leadframe's central portion and between the leadframe's first and second surfaces.

Abstract: Provided is a method for manufacturing a semiconductor device in which movement of an island in resin sealing is prevented. A molding die includes an upper die and a lower die. The upper and lower dies are fitted together to form cavities and runners. In the lower die, a pod is provided. After heating and melting of a tablet made of a solid resin and housed in the pod, the melted sealing resin is pressurized by a plunger, and is supplied to each of the cavities. Specifically, a liquid sealing resin is supplied from the pod to the cavities, sequentially, from the upstream of the flow of the sealing resin supplied from the pod. The cavities communicate with each other through the runners. Furthermore, the runners through which the cavities communicate are provided to be tilted with respect to a path for supplying the sealing resin.

Abstract: A method of manufacturing a semiconductor device sealed in a cured silicone body by placing an unsealed semiconductor device into a mold and subjecting a curable silicone composition which is fed into the space between the mold and the unsealed semiconductor device to compression molding, the method being characterized by the fact that the aforementioned curable silicone composition comprises at least the following components: (A) an epoxy-containing silicone and (B) a curing agent for an epoxy resin; can reduce warping of the semiconductor chips and circuit board, and improve surface resistance to scratching.

Abstract: A semiconductor package, a manufacturing method thereof and an encapsulating method thereof are provided. The semiconductor package includes a substrate, a flip chip, a plurality of conductive parts and a sealant. The substrate has a substrate upper surface. The flip chip has an active surface and a chip surface opposite to the active surface. The conductive parts electrically connect the substrate upper surface and the active surface. The sealant envelops the flip chip, and the space between the substrate upper surface and the active surface is filled with a portion of the sealant. The sealant further has a top surface. wherein, the chip surface is spaced apart from the top surface by a first distance, the substrate upper surface is spaced apart from the active surface by a second distance, and the ratio of the first distance to the second distance ranges from 2 to 5.

Abstract: A method of manufacturing an electronic component minimizes the occurrence of voids and degradation of characteristics in a resin-sealed portion, while reducing the costs thereof. A sealing step for sealing surface acoustic wave elements by a sealing resin member formed from a resin film is performed by mounting the surface acoustic wave elements on a collective mounting substrate and the resin film in a bag with a gas-barrier property, and causing the resin film to infiltrate between the surface acoustic wave elements mounted on the reduce-pressured-packed collective mounting substrate to be hermetically sealed by the pressure difference between the inside and the outside of the bag.

Abstract: A method for manufacturing a physical quantity sensor includes the steps of: preparing a lead frame comprising a rectangular frame portion, a plurality of leads protruding out from this rectangular frame portion in the inward direction, and a stage portion that is connected to the rectangular frame portion by connecting leads; fixing a physical quantity sensor chip to the stage portion; inclining the stage portion and the physical quantity sensor chip with respect to the rectangular frame portion; and integrating the inclined physical quantity sensor chip and the leads within a metallic mold using a resin.

Abstract: A method for producing electric contact parts includes the following stages: a) stamping a strip of electric conducting parts connected together in the longitudinal direction (X-X) by a continuous strip; b) inserting said strip inside a mould; c) over-moulding the conducting parts with insulating material depending on the final form envisaged for the electric contact part; d) cutting the continuous strip in the region of the flat pins; e) extracting the finished parts.

Abstract: A timing device for indicating a passage of a duration of time is disclosed. The timing device in accordance with the embodiments of the invention has a grid array architecture. The grid array architecture includes an electrode structure with an anode layer, a cathode layer and a thermistor layer. The anode layer and the thermistor layer are electrically coupled through a plurality of cathode trace structures. In operation the timing device is actuated through a suitable mechanism to initiate depletion of the anode layer and, thereby, indicate a passage of a duration time. As the anode layer depletes, sequential cathode trace structures are exposed and the thermistor layer acts as a temperature dependent resistor through a plurality of exposed cathode trace structures.

Abstract: One aspect is a composite board including semiconductor chips in semiconductor device positions and a plastic housing composition partly embedding the semiconductor chips. A mould is provided for surrounding the semiconductor chips with plastic housing composition, the mould having a lower part and an upper part and a moldings cavity and the molding cavity having an upper contact area, which forms an interface with the top side of the plastic housing composition to be applied. The upper contact area is covered with a parting layer having essentially the same surface constitution and the same thermal conductivity as an adhesive film forming an interface with the underside of the plastic housing composition, with the result that a warpage of the composite board of less than 1% is obtained.

Abstract: A method for a semiconductor device includes the following processes. A first seal layer is formed in a cavity of a first mold, the first seal layer being in a liquid state. A second seal layer is formed over the first seal layer while the first seal layer is kept in the liquid state, and the second seal layer is in a liquid state. A semiconductor chip on a wiring board fixed on a second mold is immersed into the second seal layer. The first and second seal layers are thermally cured.

Abstract: A resin sealed semiconductor device includes a semiconductor chip having a main surface, a plurality of surface electrodes formed on the main surface of the chip, a plurality of projection electrodes formed the main surface, each projection electrode being connected to respective one surface electrodes, and a resin shield covering the main surface, the surface electrodes and side surfaces of the projection electrodes, the resin having a thermal expansion coefficient in the range of 8-10 ppm/° C. and a Young's modulus in the range of 1.8-2.0 Gpa.

Abstract: A process of sealing a semiconductor substrate by contacting the semiconductor substrate with a surface of a release layer (I) of a gas barrier release film that is in the form of a mold, which includes vacuum suction; injecting a sealing resin between the semiconductor substrate and the mold; and releasing said mold from said semiconductor substrate having said sealing resin present thereon, where the gas barrier release film has a release layer (I), which has excellent releasability; a plastic support layer (II) supporting the release layer; and a metal or a metal oxide gas restraint layer (III), present between the release layer and the support layer, where the gas barrier release film exhibits a xylene gas permeability of at most 5×10?15 (kmol m/(s·m2·kPa)) at 170° C., and a surface of said release layer (I) has an arithmetic surface roughness of from 0.15 to 3.5 ?m, exhibiting a satin-finish.

Abstract: A method of fabricating a photovoltaic panel is disclosed which is formed by arranging a number of granular photovoltaic devices in an array and forming the array into the shape of a panel from a transparent resin and includes each photovoltaic device having a part protruding from the resin.

Abstract: An apparatus for passivating a component in a housing, the component including a substrate; the housing completely surrounding the substrate in a first substrate region; the housing being provided opened in a second substrate region, using an opening; the diepad completely surrounding the substrate in a plane parallel to the principal plane of extension of the substrate.

Abstract: In a chip packaging process, an upper and a lower mold chases are provided. A thickness adjusting film is then provided below the upper mold chase and/or above the lower mold chase. Next, a carrier is delivered to a position between the upper and the lower mold chases. A chip and a conductive line are disposed on the carrier, and the thickness adjusting film is located between the upper mold chase and the carrier and/or between the lower mold chase and the carrier. The upper and the lower mold chases are attached to define a cavity, and the thickness adjusting film is located on the surface of the upper mold chase and/or the surface of the lower mold chase. Thereafter, a molding compound is provided into the cavity by using a molding compound supplying unit. The upper and the lower mold chases and the thickness adjusting film are removed.

Abstract: In connection with a memory card of a block molding type there is provided a method able to prevent the occurrence of a chip crack in transfer molding. The method includes a first step wherein a substrate having plural chips constituting plural memory cards and mounted on a surface of the substrate and further having connecting terminals in recesses formed on a substrate surface opposite to the chips-mounted surface is sandwiched between a first die (upper die) installed on the chips-mounted surface side and a second die (lower die) installed on the surface side where the connecting terminal are formed. The method further includes a second step of injecting sealing resin between the first die and the substrate to seal at a time the plural chips mounted on the substrate. Projecting portions (terminal supporting elements) projecting from the surrounding portion are formed in regions of the second die which regions are positioned just under the connecting terminals.

Abstract: A method of assembling and sealing a circuit board within a housing includes the steps of placing the circuit board within the housing, filling the space above the circuit board or around the circuit board with a potting material, and then exhausting that cavity of gases during a curing process of the potting material. Exhausting of the gases is performed and accommodated by a vent opening. An access opening is in communication with the vent opening and provides for the injection of sealant to block the vent opening.

Abstract: First, a plurality of wiring boards are fabricated at separate steps. The first wiring board includes a Cu post formed on a wiring layer on one surface of a substrate, and a first stopper layer formed at a desired position around the Cu post. The second wiring board includes a through hole for insertion of the Cu post therethrough, a connection terminal formed on a wiring layer on one surface of a substrate, and a second stopper layer that engages the first stopper layer and functions to suppress in-plane misalignment. The third wiring board includes a connection terminal formed on a wiring layer on one surface of a substrate. Then, the wiring boards are stacked up, as aligned with one another so that the wiring layers are interconnected via the Cu post and the connection terminals, to thereby electrically connect the wiring boards. Thereafter, resin is filled into gaps between the wiring boards.

Abstract: An apparatus for manufacturing a semiconductor device includes an upper mold (21), a lower mold (22), and a plate (30, 130, 230) that includes at least one cavity (31) that receives resin and defines an outer shape and a thickness of a resin sealing portion, and a gate (32) through which the resin is guided to the cavity (31), the plate (30) being interposed between the upper mold (21) and the lower mold (22). The plate (130) further includes a resin film (132) fixed by viscoelastic or adhesive bonding to a side of thin plates (131) towards a substrate on which electrodes are provided. The semiconductor device is provided which has no resin burrs that occur on a substrate in an end portion of the molded body. The plate (30, 130, 230) is formed by multiple thin plates (231, 232, 233) joined by welding or positioned by positioning pins (237, 238).

Abstract: A shape-molding structure of a memory card comprises a circuit substrate, at least one chip, and an encapsulant covering. The upper and lower surfaces of the circuit substrate have a circuit layer and a plurality of electric contacts, respectively. The chip is located on the upper surface of the circuit substrate and electrically connected with the circuit layer. The encapsulant covering is formed by using a mold to press encapsulant entering at least one encapsulant inlet provided on at least one side surface of the circuit substrate. The encapsulant covering encapsulates all the above components with only the electric contacts exposed. A trace mark of the encapsulant inlet remaining on the encapsulant covering is then cut to obtain a shape-molding structure of memory card with an smooth and intact outer appearance.

Abstract: An upper mold, a lower mold, a middle mold, and a release film are used in a method of resin sealing of an electronic component. The release film is sandwiched between the lower mold and the middle mold and held under a prescribed tension to cover a cavity of the lower mold. A cavity side surface is also covered with the release film. Therefore, releasability of a cured resin from the cavity side surface is increased. As a result, the cured resin is prevented from being damaged near the cavity side surface.

Abstract: A waterproof method for an electronic device and a waterproof electronic device are provided. The electronic device comprises a printed circuit board, which comprises a board, a plurality of electrical elements and a button device. The waterproof method comprises the following steps: applying a first non-solid adhesive to cover the button device directly, curing the first non-solid adhesive to form a first waterproof layer, applying a second non-solid adhesive to at least cover the electrical elements directly and curing the second non-solid adhesive to form a second waterproof layer. In the end, assembling the printed circuit board, sealed with the waterproof layers, into a case to form the waterproof electronic device.

Abstract: A casing of an electronic key transmitting and receiving apparatus is formed to seal entire bodies of circuit parts, a mounting face of a printed board, on which the circuit parts are mounted, and parts of terminals while the other parts of the terminals are exposed. A rear face of the printed board opposite from the mounting face provides a part of an outer surface of the casing. When the printed board is provided in the casing through an insert molding process, the printed board is held in a cavity of a molding die such that the rear face of the printed board closely contacts an inner face of the cavity. Accordingly, deformation of the printed board due to pressure caused when the resin is poured or when the resin hardens is inhibited.

Abstract: A system and method is disclosed for using a pre-formed film in a transfer molding process of the type that uses a transfer mold to encapsulate portions of an integrated circuit with a molding compound. A film of compliant material is pre-formed to conform the shape of the film to a mold cavity surface of the transfer mold. The pre-formed film is then placed adjacent to the surfaces of the mold cavity of the transfer mold. The mold cavity is filled with molding compound and the integrated circuit is encapsulated. The pre-formation of the film allows materials to be used that are not suitable for use with prior art methods.

Abstract: A method for making a supporting body (1) for the lock of a motor vehicle, including the steps of: forming an intermediate element (8) made of electrically insulating material provided with conductive paths (3); setting the intermediate element (8) inside a mold (23) for forming the supporting body (1); and injecting electrically insulating material in the mold (23) for carrying out co-molding of the supporting body (1). The intermediate element (8) and the conductive paths (3) are made independently, and the conductive paths (3) are fixed on opposite faces (9, 10) of the intermediate element (8) by constraint means (15, 16) of a mechanical type.

Abstract: Methods and structures for reducing and/or eliminating moisture penetration in an optical package. The optical package may include (1) a layer of inorganic material placed over the points of the optical package susceptible moisture penetration of the optical package; (2) a portion of hygroscopic material placed over the points of the optical package susceptible to moisture penetration; (3) a layer of hygroscopic material placed on the interior surface of the optical package; and/or (4) a layer of hydrophobic material coated on the optical surfaces of the optical package.

Abstract: By clamping upper and lower molds, a semiconductor chip and a stacking connection electrode are immersed in a resin material heated and molten in a cavity coated with a mold release film. The mold release film is pressed into contact with a tip portion of the connection electrode by a cavity bottom face member, so that a collective resin portion having a shape corresponding to the shape of the cavity is molded in the cavity. Accordingly, the semiconductor chip and the connection electrode are compression molded with the resin material. Here, a tip portion of the connection electrode is exposed from the collective resin portion.

Abstract: A structure of embedded active components and the manufacturing method thereof are provided. The manufacturing steps involve providing a molding plate, and setting several active components on the molding plate as first. A dielectric layer covers the molding plate to cap the active components. An electric circuit is formed on the dielectric layer, in contact with the active components. Finally, the structure with embedded active components is released from the molding plate.

Abstract: Methods and apparatus to evenly clamp semiconductor substrates in a transfer mold process are disclosed. A disclosed split mold base includes a first plate having a first surface, a second plate having a second surface opposite the first surface, and a plurality of springs that are disposed between the first and second plates to distribute a clamping pressure applied by a mold press.

Abstract: A method is provided to produce a hermetic encapsulation for an electronic component, which may be an optical and at least partially light-permeable component or a surface wave component, comprises attaching and electrically contacting a component based on a chip to a carrier comprising electrical connection surfaces, such that a front of the chip bearing component structures facing the carrier is arranged to clear it, covering a back of the chip with a film made of synthetic material, such that edges of the film overlap the chip; tightly bonding the film and carrier in an entire edge region around the chip; structuring the film such that the film is removed around the edge region in a continuous strip parallel to the edge region; and applying a hermetically sealing layer over the film, such that this layer hermetically terminates with the carrier in a contact region outside of the edge region.

Abstract: Segments formed on a wiring substrate are arranged in a staggered array, and tie bars are provided between the segments.

Abstract: An encapsulation technique for leadless semiconductor packages entails: (a) attaching a plurality of dice (411) to die pads in cavities (41-45, 51-55) of a leadframe, the cavities arranged in a matrix of columns and rows; (b) electrically connecting the dice to a plurality of conducting portions (412-414) of the leadframe; and (c) longitudinally injecting molding material into the cavities along the columns via a plurality of longitudinal gates (46-49, 56-59) of the leadframe to package the dice in the cavities, the longitudinal gates situated between the cavities along the columns.

Abstract: A mold system for forming a mold cap on a semiconductor component includes a mold base and a mold lid that together define a mold cavity. The mold base supports the semiconductor component within the mold cavity. The semiconductor component defines a component footprint and footprint periphery on the mold base. A supply channel is provided in the mold lid for supplying an encapsulating material to the mold cavity. At least one vent channel is provided in the mold base. The vent channel intersecting the footprint periphery to vent gas trapped between the semiconductor component and the mold base from the mold cavity when the encapsulating material is supplied to the mold cavity.

Abstract: A technique of accurately recognizing a semiconductor device and of specifying a package type thereof. By forming, on the package surface, projections having a geometric pattern such as a circle pattern using an ejector pin and by judging only presence or absence of the circular projections using an image processor, it is possible to reduce a risk of recognition failure of the geometric pattern even if the pattern has some omission in the constitutive line thereof or has any addition of a new line. For example, when the circular projections are provided on the surface of a package, an image processor reads only presence or absence of the circular projections even if disconnection of the line or addition of a line should occur, and this allows the circular projections to be always read as being “present”.

Abstract: An embodiment of the present invention is a technique to package flip chip molded matrix array package. An ultraviolet (UV) curable tape is laminated on die backside of a strip of array of flip chips. The UV curable tape has an adhesive strength. The strip of flip chip arrays is molded with a mold film. The molded strip of flip chip array is irradiated using UV radiation. In another embodiment, a double functional tape is mounted to backside of a wafer. The double functional tape includes a binding tape and a ultraviolet (UV) curable tape having an adhesive strength. The wafer is singulated into die. The die is attached to a substrate strip to form a strip of array of flip chips. The strip is molded with a mold film. The molded strip is irradiated using UV radiation.

Abstract: The bottom mold portion for a transfer molding system is covered with a deformable material. During mold clamping, the deformable material contacts the bottom surface of the packaging substrate on which the integrated circuit die is mounted. Deformation of this relatively soft covering on the bottom mold portion accommodates thickness variations in the packaging substrate, as well as non-planarity of the adhesive layer between the integrated circuit die and packaging substrate in exposed active area integrated circuits.

Abstract: The present invention provides an apparatus and a method for panel/wafer molding. The present invention discloses a base with a first separation layer, an upper molding base with a second separation layer, a cheap molding layer and a vacuum panel bonding machine for bonding, a curing unit, a cleaning unit and a separating unit; wherein upper molding base is rectangular or round. Therefore the present invention providing a simple, cheap universal panel/wafer molding apparatus for a round or rectangular type panel, and does no harm to the chip active surface.

Abstract: A molded article manufactured by a fixed mold used with a forming metal mold for molding synthetic resin includes a base mold, a first forming mold secured to the base mold and having a molding recess, and a second forming mold secured to the base mold as it is combined with the first forming mold. The first forming mold includes a transfer surface within the molding recess in continuation to its opening edge for providing decoration to the molded article on transcription to the surface of the molded article. The second forming mold includes a charged opening defining a cavity along with the molding recess and into which is charged a molding material. In this forming metal mold, the molding material is charged into the cavity to transfer a pattern formed on the transfer surface to the molded product.

Abstract: The resin molding equipment comprises: a work piece feeding section; a work piece measuring section measuring thickness of a semiconductor chip mounted on a work piece; a resin supplying section supplying liquid resin to the work piece; a resin molding section having a molding die for molding the work piece with the liquid resin; a product measuring section measuring thickness of a resin molded part of the molded product; a product accommodating section; and a control section for controlling the sections. The control section includes means for adjusting an amount of the liquid resin, which is supplied to the work piece by the resin supplying section, on the basis of the thickness measured by the work piece measuring section.

Abstract: According to one embodiment of the invention, a mold tool for packaging integrated circuits includes a first mold press die including a first non-planar surface and a second mold press die including a second non-planar surface. The first and second non-planar surfaces form the upper and lower surfaces of a mold cavity when the first and second mold press die are engaged. The mold tool also includes a bright TiN coating disposed on the first non-planar surface. The bright TiN coating operates to decrease residue on the first non-planar surface from a mold compound.

Abstract: Provided are a mold die for molding a chip array, molding equipment including such a mold die and a molding method utilizing such molding equipment. The mold die provides for the selective injection of mold resin through a corner gate controlled by a gate block whereby the flow of the mold resin is neither perpendicular nor parallel to the side surfaces of the semiconductor chips arranged in the chip array. In this manner failures associated with the sweeping effects of the mold resin flowing past the bonding wires on the semiconductor chips may be reduced.

Abstract: An encapsulant is described for an optoelectronic device or optical component, which provides a coefficient of thermal expansion of less than 50 ppm/° C., with a variation of less than ±30%, and further provides an optical transmittance of at least 20% at a wavelength in the range of 400 to 900 nm, at an encapsulant thickness of about 1 mm. The encapsulant includes a filler consisting essentially of glass particles having diameters smaller than 500 ?m, being essentially free of titania and lead oxide, and having a refractive index in the range of 1.48 to 1.60, with a variance of less than about 0.001.

Abstract: A curable method useful for encapsulating solid state devices includes (A) an epoxy resin; (B) an effective amount of a cure catalyst comprising (B1) a first latent cationic cure catalyst comprising a diaryl iodonium hexafluoroantimonate salt; (B2) a second latent cationic cure catalyst comprising (B2a) a diaryl iodonium cation, and (B2b) an anion selected from perchlorate, imidodisulfurylfluoride anion, unsubstituted and substituted (C1-C12)-hydrocarbylsulfonates, (C2-C12)-perfluoroalkanoates, tetrafluoroborate, unsubstituted and substituted tetra-(C1-C12)-hydrocarbylborates, hexafluorophosphate, hexafluoroarsenate, tris(trifluoromethylsulfonyl)methyl anion, bis(trifluoromethylsulfonyl)methyl anion, bis(trifluoromethylsulfuryl)imide anion, and combinations thereof; and (B3) a cure co-catalyst selected from free-radical generating aromatic compounds, peroxy compounds, copper (II) salts of aliphatic carboxylic acids, copper (II) salts of aromatic carboxylic acids, copper (II) acetylacetonate, and combinations

Abstract: A method of making a fluid cooled microelectronic package in which fluid is circulated through the package in fluid-carrying channels defined at least in part by voids in an encapsulant that surrounds the package components. Preferably, the encapsulant channels are defined in part by heat producing components of the package so that coolant fluid directly contacts such components. The coolant fluid can be electrically conductive or non-conductive depending on the type of components being cooled. The coolant channels are formed by insert-molding a form in the encapsulant, and removing the form following the molding process. Alternately, the encapsulant is formed in two or more pieces that are joined to form the package, and the coolant channels are defined by recesses formed in at least one of the encapsulant pieces.

Abstract: Molded pre-forms that are used to protect electronic components and assemblies from damage due to vibration, shock and/or thermal exposure. The pre-forms can be singularly molded or co-molded. Co-molded pre-forms can include hard surface layers over softer molded compositions. The pre-forms are molded in molds that are formed using modified images obtained from printed circuit boards having the electronic components thereon. Images of the printed circuit boards are obtained and modified to improve vibrational dampening and/or heat transfer. The molded pre-forms allow for access to the printed circuit boards for purposes of replacing or repairing the printed circuit boards. The molded pre-forms are particularly suitable for down hole applications.

Abstract: An optical semiconductor device 1a includes a lead frame 4 having an aperture 7, a submount 8 disposed on one surface of the lead frame 4 to close the aperture 7, a semiconductor optical element 3 which has an optical portion 6 and which is mounted on a surface of the submount 8 opposite to a surface on a side of the aperture 7 with the optical portion 6 facing the aperture 7 through the submount 8, a molding portion 10 made of a non-transparent molding resin which exposes at least a region including the aperture 7 on the other surface side of the lead frame 4 and which encapsulates the lead frame 4, the semiconductor optical element 3 and the submount 8, and a lens 9 disposed on the other surface of the lead frame 4 to close the aperture 7.