Abstract: A multilayer electronic component includes a body including dielectric layers and internal electrodes. The internal electrodes are exposed to fifth and sixth surfaces of the body, and first ends thereof are respectively exposed to third or fourth surfaces of the body. First and second side margin portions are respectively disposed on the fifth and sixth surfaces. The body includes an active portion, and upper and lower cover portions disposed respectively on a first surface and a second surface of the active portion in a first direction. The ratio of a dimension of the lower cover portion in the first direction C to a dimension of the first side margin portion in the third direction A, C/A?2.6, C/T is 0.080, where T is a dimension of the body in the first direction, and D<C where D is the dimension of the body in the first direction.

Abstract: An energy storage system includes, in an exemplary embodiment, a first current collector having a first surface and a second surface, a first electrode including a plurality of carbon nanotubes on the second surface of the first current collector. The plurality of carbon nanotubes include a polydisulfide applied onto a surface of the plurality of nanotubes. The energy storage system also includes an ionically conductive separator having a first surface and a second surface, with first surface of the ionically conductive separator positioned on the first electrode, a second current collector having a first surface and a second surface, and a second electrode including a plurality of carbon nanotubes positioned between the first surface of the second current collector and the second surface of the ionically conductive separator.

Abstract: A monolithic ceramic capacitor includes a ceramic sintered body including a plurality of stacked ceramic layers, and first and second inner electrodes alternately arranged inside the ceramic sintered body to oppose each other in a stacking direction of the ceramic layers with the ceramic layers interposed between the adjacent first and second inner electrodes. Among the ceramic layers, a number N of the ceramic layers disposed between the first inner electrodes and the second inner electrodes is at least 232. A proportion of volume occupied by the first and second inner electrodes in the ceramic sintered body is at least about 0.37. A size of each of side gap portions is about 40 ?m or less.

Abstract: Embodiments of the present invention provide a touch panel and a manufacturing method thereof, as well as a display device. The touch panel includes a first sensing electrode layer, a second sensing electrode layer and an insulating layer between the first sensing electrode layer and the second sensing electrode layer, wherein the first sensing electrode layer includes first sensing electrode patterns; the second sensing electrode layer includes second sensing electrode patterns; and the insulating layer includes insulating patterns, a shape of the insulating patterns is the same as that of the first sensing electrode patterns or the second sensing electrode patterns.

Abstract: Systems, methods and methods of manufacture for, among other things, a MEMS device may be provided with a pair of electrodes that are separated by a gap. At least one of the electrodes is movable toward the other electrode. The MEMS device may include a beam that is positioned within the gap and arranged between the electrodes. As the movable electrode moves toward the other electrode, a portion of the MEMS device also moves towards, comes into contact with, and deflects the beam. As the beam deflects, it applies a force upon the MEMS device that opposes the movement of electrode toward the other electrode.

Abstract: A semiconductor substrate includes: single crystal silicon; a mask material formed on a surface of the single crystal silicon and having an opening; a silicon carbide film formed on a portion exposed in the opening of the single crystal silicon; and a single crystal silicon carbide film formed so as to cover the silicon carbide film and the mask material. The mask material has a viscosity of 105 Pa·S or more and 1014.5 Pa·S or less in a temperature range of 950 to 1400° C.

Abstract: An aluminum slug anode usable in capacitors is produced from multiple-stacked layers of aluminum foils. The foils are stacked (possibly after cutting them to have an area similar to the area desired for the anode), hot-pressed, sintered, and anodized to generate the anode. A contact in electrical communication with the foils is formed, as by welding a contact across at least some of the foils. A capacitor casing be formed by situating the anode within a casing which serves as a cathode, with the anode being wrapped in a dielectric such as separator paper.

Abstract: A method for producing an integrated device including a capacitor. The method includes the steps of providing a functional substrate including functional circuits of the integrated device, forming a first conductive layer including a first plate of the capacitor on the functional substrate, forming a layer of insulating material including a dielectric layer of the capacitor on a portion of the first conductive layer corresponding to the first plate, forming a second conductive layer including a second plate of the capacitor and functional connections to the functional circuits on a portion of the layer of insulating material corresponding to the dielectric layer, forming a protective layer of insulating material covering the second plate and the functional connections, forming a first contact for contacting the first plate, and forming a second contact and functional contacts for contacting the second plate and the functional connections, respectively, through the protective layer.

Abstract: Provided is a method of manufacturing a solid electrolytic capacitor, including the steps of: forming a capacitor element including an anode body having a dielectric coating film on a surface thereof; impregnating the capacitor element with a polymerization liquid containing a precursor monomer of a conductive polymer and an oxidant; impregnating the capacitor element impregnated with the polymerization liquid with a silane compound or a silane compound containing solution; and forming a conductive polymer layer by polymerizing the precursor monomer after impregnating the capacitor element with the silane compound or the silane compound containing solution.

Abstract: There is provided a multilayered ceramic electronic component including: a ceramic body in which a plurality of dielectric layers are multilayered; a plurality of first and second internal electrode layers formed on at least one surfaces of the dielectric layers and alternately exposed through both ends of the ceramic body in a length direction thereof; first and second adhesive layers formed on both ends of the ceramic body, electrically connected the exposed first and second internal electrodes and formed of a conductive paste; and first and second external electrode layers formed on surfaces of the first and second adhesive layers and formed of a glass-free conductive paste.

Abstract: There is provided a multilayered ceramic electronic component including: a ceramic body in which a plurality of dielectric layers are stacked; a plurality of first and second internal electrodes formed on at least one of the dielectric layers and alternately exposed through both ends of the ceramic body in a stacking direction of the ceramic body; an a step compensation cover including a ceramic material having a viscosity higher than that of a ceramic material included in the ceramic body and formed on at least one of an upper surface and a lower surface of the ceramic body.

Abstract: A capacitor containing a solid electrolytic capacitor element that includes a sintered porous anode body and an anode lead assembly is provided. The lead assembly is electrically connected to the anode body for connection to an anode termination. The lead assembly contains at least a first lead wire comprising at least one notch that is located on an embedded portion of the first lead wire. The at least one notch can be formed by crimping the lead wire prior to embedding the lead wire within the anode body. The at least one lead wire is embedded within the anode body and extends from a surface of the anode body in a longitudinal direction. The resulting geometry of the lead wire increases the points of contact between the anode body and the lead wire after post-sintering shrinkage of the anode body to improve the electrical capabilities of the solid electrolytic capacitor.

Abstract: According to one embodiment, a system for manufacturing a semiconductor device includes a spontaneous joining unit and a deformative joining unit. The spontaneous joining unit overlaps a first substrate and a second substrate and spontaneously joins mutual center portions of respective joint faces of the first substrate and the second substrate. The deformative joining unit deforms at least one peripheral portion of the respective joint faces of the first substrate and second substrate joined by the spontaneous joining unit toward the other peripheral portion and joins the mutual peripheral portions of the respective joint faces.

Abstract: Provided is a method of manufacturing a solid electrolytic capacitor, including the steps of: forming a capacitor element including an anode body having a dielectric coating film on a surface thereof; impregnating the capacitor element with a polymerization liquid containing a precursor monomer of a conductive polymer and an oxidant; impregnating the capacitor element impregnated with the polymerization liquid with a silane compound or a silane compound containing solution; and forming a conductive polymer layer by polymerizing the precursor monomer after impregnating the capacitor element with the silane compound or the silane compound containing solution.

Abstract: A capacitor includes: an anode part that is drawn from an anode body of a capacitor element to an element end-face, to be formed over the element end-face; a cathode part that is drawn from a cathode body of the capacitor element to the element end-face, to be formed over the element end-face; an anode terminal member that is disposed in a sealing member; a cathode terminal member that is disposed in the sealing member; an anode current collector plate that is connected to the anode part, and is also connected to the anode terminal member; and a cathode current collector plate that is connected to the cathode part, and is also connected to the cathode terminal member.

Abstract: A magnetoresistance sensor includes a multifunctional circuit structure having the functionality of built-in self-testing and/or device configuration. The magnetoresistance sensor further includes a substrate having a first dielectric layer formed thereon and a magnetoresistance structure. The multifunctional circuit structure is disposed on the dielectric layer and includes a winding structure for generating a magnetic field for testing and configuring the magnetoresistance sensor. The magnetoresistance structure is disposed on the multifunctional circuit structure, wherein a topmost layer of the magnetoresistance structure includes a magnetoresistance layer, and the magnetoresistance structure generates electrical resistance variance corresponding to the generated magnetic field for testing and configuring the magnetoresistance sensor. A method for manufacturing the magnetoresistance sensor is also provided.

Abstract: The present invention relates to surveillance and/or identification devices having capacitors connected in parallel or in series, and methods of making and using such devices. Devices with capacitors connected in parallel, where one capacitor is fabricated with a relatively thick capacitor dielectric and another is fabricated with a relatively thin capacitor dielectric achieve both a high-precision capacitance and a low breakdown voltage for relatively easy surveillance tag deactivation. Devices with capacitors connected in series result in increased lateral dimensions of a small capacitor. This makes the capacitor easier to fabricate using techniques that may have relatively limited resolution capabilities.

Abstract: A method of manufacturing the electric double layer capacitor cell includes preparing first and second electrode sheets by printing electrode material onto conductive sheets, respectively, with the exception of regions to be provided as first and second terminal lead-out portions in the conductive sheets; punching the first and second electrode sheets so as to form a plurality of first and second unit electrodes, respectively, each first unit electrode having the first terminal lead-out portion and each second unit electrode having the second terminal lead-out portion; stacking the first and second electrode sheets with a separator interposed therebetween in order that the plurality of first and second unit electrodes are overlapped; and cutting the first and second electrode sheets being stacked into the first and second unit electrodes.

Abstract: An embedded wafer level ball grid array (eWLB) is formed by embedding a semiconductor die in a molding compound. A trench is formed in the molding compound with a laser drill. A first layer of copper is deposited on the sidewall of the trench by physical vapor deposition. A second layer of copper is then formed on the first layer of copper by an electroless process. A third layer of copper is then formed on the second layer by electroplating.

Abstract: A sensor module. One embodiment provides a cap whose perimeter defines a rim. A first semiconductor chip is attached to the cap. The first semiconductor chip includes first connection elements. The rim and the first connection elements define a common plane.

Abstract: A parallax barrier device includes: a first substrate; a first patterned transparent electrode layer disposed on the first substrate; a first patterned electrochromic material layer disposed on the first patterned transparent electrode layer and including a plurality of electrochromic structures, in which lengths, widths or diameters of the electrochromic structures are 50 nm to 500 nm, and included angles of the electrochromic structures and a surface of the first substrate to be deposited are 30° to 89°; a second substrate; a second patterned transparent electrode layer disposed on the second substrate; a second patterned electrochromic material layer disposed on the second patterned transparent electrode layer; and an electrolyte disposed between the first patterned electrochromic material layer and the second patterned electrochromic material layer.

Abstract: A plurality of memory cells are tested in order. Each time a defective memory cell is detected by the test, error pattern information is updated based on a relative arrangement relationship between a plurality of defective memory cells, and error address information is updated based on the addresses of at least part of the plurality of defective memory cells. According to the present invention, it is possible to significantly reduce the storage capacity of the analysis memory. This allows the implementation of the analysis memory itself in the semiconductor device, in which case external testers need not include the analysis memory.

Abstract: An apparatus for fabricating thin films on substrate panels includes a deposition chamber enclosed by sidewalls, a lid, and a base. The apparatus includes a mixing chamber disposed above the lid and configured to receive vapor species and form a mixed vapor. The mixing chamber is coupled with the deposition chamber via inlets through the lid, including a diffuser plate. Two heater plates disposed side by side on the base supporting and heating two substrates.

Abstract: An apparatus, system, and method are disclosed for restoring efficiency of a photovoltaic cell. An illumination module illuminates photovoltaic cells so the cells receive a time integrated irradiance equivalent to at least 5 hours of solar illumination. After illumination, an annealing module anneals the photovoltaic cells at a temperature above 90 degrees Celsius for a minimum of 10 minutes. In one embodiment, the illumination module illuminates the photovoltaic cells for a time integrated irradiance equivalent to at least 20 hours of solar illumination. In another embodiment, the illumination module illuminates the photovoltaic cells for a time integrated irradiance equivalent to at least 16 hours of solar illumination while being heated to at least 50 degrees Celsius. In another embodiment, a solar concentrator irradiates the photovoltaic cells in sunlight for at least 10 hours and increases the irradiance of solar illumination on the cells by a factor of 2 to 5.

Abstract: An integrated circuit power supply decoupling circuit includes a capacitor and a protection circuit. The capacitor has a first terminal and a second terminal. The protection circuit includes a first transistor having a first conduction path, and a second transistor having a second conduction path. One terminal of the first conduction path is connected to the first terminal of the capacitor, and another terminal of the first conduction path is connected to a first power supply rail. One terminal of the second conduction path is connected to the second terminal of the capacitor, and another terminal of the second conduction path is connected to a second power supply rail.

Abstract: In a method for manufacturing a multilayer electronic component, after a plating layer for forming an external electrode is formed on an end surface of a laminate, conditions for heat-treating the laminate are set such that interdiffusion layers have ends which face internal electrodes and which are spaced from the end surface of the laminate at a distance of about 0.5 ?m to about 1.9 ?m.

Abstract: A block encode circuit (800) including a scanner (820) operable to scan a block having data values spaced apart in the block by run-lengths to produce a succession of pairs of values of Level and Run representing each data value and run-length, and wherein the Level values include one or more AC values succeeded by a DC value in the succession, and a Run-Level encoder (830) responsive to said scanner (820) to encode the values of Level and Run in a same AC to DC order as in the succession of pairs of values from said scanner (820) to deliver an encoded output. Other encoders, decoders, codecs and systems and processes for their operation and manufacture are disclosed.

Abstract: Particles of active electrode material are made by blending mixing a mixture of activated carbon and binder. In selected implementations, sulfur level in the activated carbon is relatively low and the binder is inert. For example, sulfur content of the activated carbon and the resultant mixture is below 300 ppm and in other implementations, below 50 ppm. The electrode material may be attached to a current collector to obtain an electrode for use in various electrical devices, including a double layer capacitor. The electrode decreases current leakage of the capacitor.

Abstract: A method is described for manufacturing a conductive polymer electrolytic capacitor. The method includes a step of aging a capacitor element including an electrolyte containing a conductive polymer and an ionic liquid by applying an aging voltage y (V) to the capacitor element to satisfy the following formula (1) or the following formula (2). In the following formulae (1) and (2), x represents a forming voltage for a valve metal. An electrolytic capacitor having a high withstand voltage is implemented by this method. 0.5x?y?x(0<x?48)??(1) 24?y?x(48<x)??(2).

Abstract: The present invention is a process for making a matching pair of surfaces, which involves creating a network of channels on one surface of two substrate. The substrates are then coated with one or more layers of materials, the coating extending over the regions between the channels and also partially into the channels. The two coated surfaces are then contacted and pressure is applied, which causes the coatings to be pressed into the network of channels, and surface features on one of the layers of material creates matching surface features in the other, and vice versa. It also results in the formation of a composite. In a final step, the composite is separated, forming a matching pair of surfaces.

Abstract: A metal-insulator-metal capacitor structure includes a lower electrode, a buffer layer, a barrier layer, a dielectric layer and an upper electrode. The lower electrode is disposed in the buffer layer. The barrier layer covers part of the lower electrode and is disposed between the lower electrode and the upper electrode. The buffer layer serves as an etching stop layer to define the dielectric layer. The dielectric layer in the metal-insulator-metal capacitor structure has a uniform and ideal thickness.

Abstract: A method for manufacturing a dielectric element including the steps of: preparing a lower electrode; forming a dielectric on the lower electrode to fabricate a first laminated structure; annealing the first laminated structure; forming an upper electrode on a dielectric film to fabricate a second laminated structure; and annealing the second laminated structure under a reduced pressure atmosphere at a temperature of 150° C. or higher.

Abstract: A voltage divider of a voltage regulator system is disclosed utilizing divided diffused resistors. In one embodiment, a feed-forward capacitor network is connected across the resistors and the voltage divider output. The feed-forward capacitor network allows the output to rise and fall quickly with a change in the voltage divider input. Accordingly, an improved frequency response should be obtained utilizing divided diffused resistors.

Abstract: The delay time variation of transistors caused by the manufacturing variation is desired to be adjusted. A relation table storing a relation between sizes and voltage values (supply voltages and bias voltages) is provided. Macros each of which includes a transistor and a setting voltage generation circuit for applying a setting voltage to the transistor are formed on a chip. A process data indicating a size of the transistor is generated. The voltage value corresponding to the size of the transistor indicated by the process data in the relation table is selected as an optimum voltage value (supply voltage Vdd, bias voltage Bias) for each of the macros. The setting voltage of each of the macros is set to the optimum voltage value. The delay time can be adjusted without requiring a detection circuit for detecting the delay time.

Abstract: A semiconductor device manufacturing method capable of preventing an infliction of damage upon an interlayer insulating film and moisture adsorption thereto due to opening to atmosphere in a process of forming a CuSiN barrier by infiltrating Si into a surface of a copper-containing metal film and nitrifying a Si-infiltrated portion is disclosed. When a semiconductor device is manufactured through the processes of preparing a semiconductor substrate having a copper-containing metal film exposed on a surface thereof; purifying a surface of the copper-containing metal film by using radicals or by using a thermo-chemical method; infiltrating Si into the surface of the copper-containing metal film; and nitrifying a Si-infiltrated portion of the copper-containing metal film by radicals, the purification process, the Si introduction process and the nitrification process are successively performed without breaking a vacuum.

Abstract: The present invention relates to a semiconductor device, and more particularly to a method for forming a metal/insulator/metal (MIM). The method comprises the steps of: forming a metal wiring surrounded by the inter-metal dielectric film; forming a plurality of insulating film on the metal wiring in sequence; and forming a metal barrier film on the insulating film, whereby the insulating film functioning as a buffer film can mitigate the stress between the films.

Abstract: An insulative feedthrough receives an electrical lead therethrough and includes a ferrule having fist and second open ends and an interior surface. At least one polymeric guide member is positioned substantially within the first end of the ferrule and has an aperture therethrough for receiving the lead. An insulating material is deposited in the ferrule through the second end for sealingly engaging the lead and the interior surface of the ferrule.

Abstract: The manufacturing method for an electroceramic component (1), for example a varistor (1), comprises a laser irradiation of a part (5; 6) of the surface of an electroceramic body (2) before a metallization (3; 4) is applied to the part (5; 6) of the surface. By means of the laser irradiation it is possible to produce a micro-roughness and/or a chemical modification of the surface which permits good adhesion of the metallization, and it is possible to reduce or eliminate areas of unevenness or waviness of that part (5; 6) of the surface of the electroceramic body (2) which is to be metallized. In addition, improved transverse conductivity can be produced, by virtue of which a low contact resistance and a very homogeneous current distribution is achieved, in particular near to the metallization (3; 4). In addition it is possible to remove residues which originate in particular from a sinter support or from the application of a passivation layer.

Abstract: The invention relates to measuring devices for the measuring of pressure, and more specifically to capacitive pressure sensors. The silicon crystal planes {111} are located at the corners of a wet etched membrane well of a pressure sensor element according to the present invention. An object of the invention is to provide an improved method of manufacturing a capacitive pressure sensor, and a capacitive pressure sensor suitable for use, in particular, in small capacitive pressure sensor solutions.

Abstract: In one aspect, the present invention provides a method for fabricating two layers separated by a gap comprising the steps of: (a) providing a first material; (b) treating the first material to reduce the number of available bonding centers; (c) placing a second material over the first material and allowing bonds to form between the two materials to form a composite; and (d) separating the composite so formed along the boundary of the two materials. In a further aspect, subsequent layers of material may be introduced to the composite by repeating steps (b) and (c) under conditions where adhesion between the subsequent layers is greater, smaller or substantially the same as the adhesion between the first and second material.

Abstract: Materials bonded together are separated using electrical current, thermal stresses, mechanical force, any combination of the above methods, or any other application or removal of energy until the bonds disappear and the materials are separated. In one embodiment the original bonding was composed of two layers of material. In another embodiment, the sandwich was composed of three layers. In a further embodiment, the parts of the sandwich are firmly maintained in their respective positions during the application of current so as to be able to subsequently align the materials relative to one another.

Abstract: The present invention relates to a solid electrolytic capacitor having a masking structure in which the insulation between the anode part and the cathode part can be ensured without fail, to its production method, to a method for coating a masking agent on a solid electrolytic capacitor substrate, and to apparatus therefore. According to the present invention, the masking material covers the dielectric film on the metal material having valve action and sufficiently infiltrates into the core metal made of a metal having valve action while the solid electrolyte is masked by the masking material without fail, so that a solid electrolytic capacitor can be produced that has a reduced leakage current and a reduced stress generated at the reflow treatment or the like.

Abstract: An improved method for manufacturing a matching pair of electrodes comprises the steps of: fabricating a first electrode with a substantially flat surface; depositing islands of an oxidizable material over regions of the surface; depositing a layer of a third material over the surface of the first electrode to form a second electrode; separating the first electrode from the second electrode; oxidizing the islands of oxidizable material, which causes the islands to expand; bringing the upper electrode and the lower electrode into close proximity, whereupon the expanded island of oxidizable material touches the upper surface and creates an insulating gap between the two surfaces, thereby forming a matching pairs of electrodes.

Abstract: The present invention relates to a solid electrolytic capacitor having a masking structure in which the insulation between the anode part and the cathode part can be ensured without fail, to its production method, to a method for coating a masking agent on a solid electrolytic capacitor substrate, and to an apparatus therefor. According to the present invention, the masking material covers the dielectric film on the metal material having valve action and sufficiently infiltrates into the core metal made of a metal having valve action while the solid electrolyte is masked by the masking material without fail, so that a solid electrolytic capacitor can be produced that has a reduced leakage current and a reduced stress generated at the reflow treatment or the like.

Abstract: A housing for an electrical component includes an electrically conductive cup which includes a wall, a floor, and a cover having electrical terminals. The housing also includes an electrically insulating coating applied to an outside of the floor and adjoining regions of the wall, and an electrically insulating covering which covers the wall at least partially and which overlaps the electrically insulating coating. The electrically insulating covering is on the electrically insulating coating and does not coat the floor. A mounting plate is also included on which the floor is positioned.

Abstract: The present invention provides an improved electrolytic capacitor device and a method of constructing the same. The capacitor includes a central support post that is inserted into an arbor hole in the center of the active element. The present invention provides a capacitor post that has a core material of metal or thermally conductive polymer that has an outer protective layer formed thereon. The outer protective layer is net shape insert molded over the core using a thermally conductive, electrically insulative polymer material that protects the support core from interfering with the electrical operation of the capacitor while increasing the capacitor's ability to transfer waste heat from the active element to the exterior of the device. The outer layer further includes an integrally formed thermal transfer pad that resides adjacent to the outer can of the capacitor when the capacitor post is installed.

Abstract: A method and apparatus for transferring a substrate between a first environment having a first pressure and a second environment having a vacuum pressure is provided. In one embodiment, the apparatus comprises a chamber body having a first port disposed in a first wall and a second port disposed in a second wall that seals the chamber from the first and second environments. A cooling plate, a first substrate holder and a second substrate holder are disposed within the chamber body. The cooling plate is disposed at the bottom of the chamber body. The first port and the second port are sequentially opened and the pressure within the load lock regulated to allow substrate to pass through the load lock. A window is disposed in the top of the chamber body that allows a metrology device to view the chamber volume.

Abstract: Certain embodiments relate to a process for forming a multilayer electrical device. The process includes providing a multilayer structure including layers of a dielectric material and an electrode material. The electrode material may include at least one material selected from the group consisting of nickel and copper. A variety of dielectric materials may be used, such as barium titanate. The method also includes sintering the dielectric material by heating the structure using microwaves in an industrial nitrogen atmosphere, which contains an oxygen partial pressure of 10−2 to 10−12 atm.

Abstract: Device for processing semiconductor wafers, comprising at least one processing chamber which is completely closed with the exception of a connection to a distribution. System. In said at least one processing chamber there are situated preferably two reactors and a common feed/removal system in order to be able to subject wafers, which may optionally be arranged in boats, to an identical processing operation.

Abstract: Disclosed are methods for forming active metal battery alloy electrodes having protective layers (“encapsulated electrodes”). Charged and uncharged encapsulated alloy electrodes and methods for their fabrication are provided.