Solid Dielectric Type Patents (Class 29/25.42)
  • Patent number: 11967461
    Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrodes alternately laminated therein, and two end surfaces opposing each other in a length direction, and two side surfaces opposing each other in a width direction, and two external electrodes respectively on the two end surfaces of the multilayer body. At least one of two opposed main surfaces of the multilayer ceramic capacitor includes raised portions provided respectively on one side and another side with a middle portion of the main surface interposed therebetween. The raised portions are each raised to become thicker in the lamination direction from the middle portion toward an outer periphery of the main surface.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: April 23, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yasuyuki Shimada, Akira Tanaka, Shinichi Kokawa
  • Patent number: 11963302
    Abstract: An electronic component includes a substrate and side wires. The substrate includes a first major surface, a second major surface, and a side surface. The side wires are on the side surface of the substrate and spaced apart from each other in a direction along an outer periphery of the substrate when viewed in plan in a thickness direction of the substrate. At least a portion of each of the side wires is provided indirectly on the side surface of the substrate. The electronic component further includes an electrically insulating layer interposed between the side surface of the substrate and the at least a portion of each of the side wires. Each of the side wires includes a bent portion bent when viewed in plan in the thickness direction of the substrate.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: April 16, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masato Nomiya
  • Patent number: 11961675
    Abstract: A ceramic electronic device includes an element body and an external electrode. The element body is formed by laminating a ceramic layer and an internal electrode layer. The external electrode is electrically connected to at least one end of the internal, electrode layer. The element body includes a boundary layer at an end of the ceramic layer. The ceramic layer includes a perovskite compound represented by ABO3 as a main component. The boundary layer includes Ba and Ti as a main component. The boundary layer includes 0.27-0.40 parts by mol of Ba, provided that a total of Ba and Ti included in the boundary layer is 1 part by mol.
    Type: Grant
    Filed: March 2, 2022
    Date of Patent: April 16, 2024
    Assignee: TDK CORPORATION
    Inventors: Toshihiro Iguchi, Yuichiro Sueda, Ryota Namiki
  • Patent number: 11961681
    Abstract: A multilayer capacitor includes a capacitor body including dielectric layers and internal electrodes alternately disposed with the dielectric layers interposed therebetween; and an external electrode disposed on the capacitor body to be connected to one or more of the internal electrodes. Porosity of ends of the internal electrodes is less than 50% on an interfacial surface between a margin of the capacitor body in a width direction the capacitor body and the internal electrodes.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: April 16, 2024
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yu Kwang Seo, Berm Ha Cha, Kang Hyun Lee, Jong Hwa Lee, Jong Han Kim
  • Patent number: 11955287
    Abstract: A multilayer electronic component includes: a body including an active portion including internal electrodes disposed alternately with dielectric layers and cover portions disposed on upper and lower surfaces of the active portion; and external electrodes including an electrode layer disposed on the body, and an average thickness of the cover portion is 14 to 17 ?m and a maximum thickness of the electrode layer is 5 to 20 ?m.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: April 9, 2024
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jang Yeol Lee, Hye Min Bang, Bum Soo Kim
  • Patent number: 11948743
    Abstract: An electronic component includes an electronic element and an interposer board. The electronic element includes a multilayer body and external electrodes at multilayer body end surfaces of the multilayer body and connected to internal electrode layers. The interposer board includes board end surfaces, board side surfaces orthogonal to the board end surfaces, and board main surfaces orthogonal to the board end surface and the board side surface. One of the board main surfaces is located in a vicinity of the electronic element and joined with one of the pair of multilayer body main surfaces in the vicinity of the board. The interposer board is an alumina board. The board end surfaces each include a metal layer including a Zn-containing layer and a Cu layer on an outer periphery of the Zn-containing layer.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: April 2, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Mitsuru Ikeda, Yasuhiro Nishisaka
  • Patent number: 11943877
    Abstract: A circuit board structure includes a circuit substrate having opposing first and second sides, a redistribution structure disposed at the first side, and a dielectric structure disposed at the second side. The circuit substrate includes a first circuit layer disposed at the first side and a second circuit layer disposed at the second side. The redistribution structure is electrically coupled to the circuit substrate and includes a first leveling dielectric layer covering the first circuit layer, a first thin-film dielectric layer disposed on the first leveling dielectric layer and having a material different from the first leveling dielectric layer, and a first redistributive layer disposed on the first thin-film dielectric layer and penetrating through the first thin-film dielectric layer and the first leveling dielectric layer to be in contact with the first circuit layer. The dielectric structure includes a second leveling dielectric layer disposed below the second circuit layer.
    Type: Grant
    Filed: March 2, 2022
    Date of Patent: March 26, 2024
    Assignee: Unimicron Technology Corp.
    Inventors: Wen-Yu Lin, Kai-Ming Yang, Chen-Hao Lin, Pu-Ju Lin, Cheng-Ta Ko, Chin-Sheng Wang, Guang-Hwa Ma, Tzyy-Jang Tseng
  • Patent number: 11942273
    Abstract: An electronic component includes an electronic element and an interposer board. The electronic element includes a multilayer body and external electrodes at multilayer body end surfaces of the multilayer body and connected to internal electrode layers. One of the board main surfaces is in a vicinity of the electronic element and joined with a multilayer body main surface in a vicinity of the interposer board. The interposer board is an alumina board. At least one notch is in end regions including a board end surface, a board side surface in a vicinity thereof, a board main surface in a vicinity thereof, ridge portions between the board end surface and the board side surface, between the board end surface and the board main surface, and between the board side surface and the board main surface, and a corner portion between the board end surface, the board side surface, and the board main surface.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: March 26, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Yokomizo, Shinobu Chikuma, Yohei Mukobata
  • Patent number: 11942256
    Abstract: A coil component includes a support substrate, a body having a first surface and a second surface opposing each other and having the support substrate disposed therein, a coil portion disposed on at least one surface of the support substrate and having an end of an outermost turn disposed closer to the first surface of the body than the second surface of the body, and a lead-out portion having a first surface connected to the end of the outermost turn and a second surface opposing the first surface of the lead-out portion and exposed to the first surface of the body. An area of the first surface of the lead-out portion is greater than an area of the second surface of the lead-out portion.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: March 26, 2024
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Hun Kim, Byeong Cheol Moon
  • Patent number: 11940336
    Abstract: A capacitive pressure transducer includes a shielded spacer positioned between the capacitor electrodes and driven with a separate voltage source.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: March 26, 2024
    Assignee: Sporian Microsystems, Inc.
    Inventors: Evan Pilant, Dale Schoonover, Jakob Oreskovich, Brittany McGrogan, Eric Schneider, Bradley Smith, William VanHoose
  • Patent number: 11935697
    Abstract: A capacitor includes: a capacitor element; a pair of external electrodes provided at opposite ends of the capacitor element; and a pair of metal caps and or a metal foil, the pair of metal caps each covering a corresponding one of the pair of external electrodes, the metal foil covering at least part of the capacitor element.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: March 19, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Koichi Nishimura, Yukihiro Shimasaki, Hiroki Takeoka, Takafumi Okudo, Ritsuo Masaoka, Hiromasa Ozaki
  • Patent number: 11930630
    Abstract: A Dynamic Random Access Memory (DRAM) capacitor and a preparation method therefor are provided. The DRAM capacitor includes a dielectric layer, and the dielectric layer includes a high dielectric material layer, and low dielectric loss material layers provided on both side surfaces of the high dielectric material layer.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: March 12, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Zhuo Chen, Ying-Chih Wang, Shih-Shin Wang
  • Patent number: 11929208
    Abstract: A multilayer ceramic capacitor includes a laminate and an external electrode connected to the internal electrode layer. The laminate includes a central layer portion in which an internal electrode layer and a dielectric ceramic layer are alternately laminated, and a covering portion covering an outer surface of the central layer portion in the lamination direction and the width direction. A region where the main surface meets the lateral surface in the laminate is defined as a corner portion that is rounded, and a distance from the corner portion to an internal electrode closest to the corner portion is about 20 ?m or less.
    Type: Grant
    Filed: March 15, 2023
    Date of Patent: March 12, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Yokomizo, Toshihiro Harada
  • Patent number: 11930721
    Abstract: Various techniques and apparatus permit fabrication of superconductive circuits. A niobium/aluminum oxide/niobium trilayer may be formed and individual Josephson Junctions (JJs) formed. A protective cap may protect a JJ during fabrication. A hybrid dielectric may be formed. A superconductive integrated circuit may be formed using a subtractive patterning and/or additive patterning. A superconducting metal layer may be deposited by electroplating and/or polished by chemical-mechanical planarization. The thickness of an inner layer dielectric may be controlled by a deposition process. A substrate may include a base of silicon and top layer including aluminum oxide. Depositing of superconducting metal layer may be stopped or paused to allow cooling before completion. Multiple layers may be aligned by patterning an alignment marker in a superconducting metal layer.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: March 12, 2024
    Assignee: 1372934 B.C. LTD.
    Inventors: Eric Ladizinsky, Jeremy P. Hilton, Byong Hyop Oh, Paul I. Bunyk
  • Patent number: 11908624
    Abstract: Disclosed is a broadband capacitor in which an electrode unit comprises a main electrode and a plurality of side electrodes so as to facilitate changing of capacitance value. The disclosed broadband capacitor is formed by alternately stacking a first electrode set, which comprises a first main electrode and a plurality of side electrodes spaced apart from the first main electrode, and a second electrode set, which comprises a second main electrode and a plurality of side electrodes spaced apart from the second main electrode.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: February 20, 2024
    Assignee: AMOTECH CO., LTD.
    Inventor: Byungguk Lim
  • Patent number: 11906592
    Abstract: A method of producing an all-solid-state battery includes forming an insulating layer-attached stack unit including an insulating layer and a stack unit that includes a positive electrode layer, a solid electrolyte layer and a negative electrode layer; performing a dielectric breakdown test on the insulating layer included in the insulating layer-attached stack unit, and determining that the insulating layer-attached stack unit is a non-defective product if no dielectric breakdown is present; forming an electrode member having both ends by disposing the two insulating layer-attached stack units at the both ends, the insulating layer-attached stack unit being determined to be a non-defective product; accommodating the electrode member in a case; and assembling a restraint member to the outside of the case to produce an all-solid-state battery.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: February 20, 2024
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Ryuto Sakamoto
  • Patent number: 11896835
    Abstract: Presented herein are implantable medical devices that include an insulator extending through a hermetically-sealed biocompatible housing. A plurality of feedthrough pins, which include at least a first feedthrough pin, a second feedthrough pin, and at least one ground feedthrough pin extend through the insulator. An electrically shielding member is disposed at the outer surface of the insulator so as to provide a grounding barrier between the first and second feedthrough pins.
    Type: Grant
    Filed: October 18, 2018
    Date of Patent: February 13, 2024
    Assignee: Cochlear Limited
    Inventors: Wilson Fung, Stuart Tyler, Jane Rapsey
  • Patent number: 11901124
    Abstract: A multilayer ceramic capacitor includes a multilayer body including first inner electrodes and second inner electrodes stacked in layers and dielectric layers, the multilayer body including a first outer electrode receiving portion at one end thereof in one direction, a second outer electrode receiving portion at the other end thereof in the one direction, and a main portion between the first and second outer electrode receiving portions, a first outer electrode over the first outer electrode receiving portion, and a second outer electrode over the second outer electrode receiving portion. A level difference exists at a boundary between the main portion and the first outer electrode receiving portion and at a boundary between the main portion and the second outer electrode receiving portion. An area of a cross section at a central position of the main portion in the one direction is greater than areas of cross sections at a position of the first outer electrode and at a position the second outer electrode.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: February 13, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Takahiro Hirao
  • Patent number: 11887790
    Abstract: A multilayer capacitor includes: a capacitor body including dielectric layers and first and second internal electrodes, and having first to six surfaces; first and second side portions disposed on the fifth and sixth surfaces of the capacitor body, respectively, and having roughnesses on surfaces thereof; a first external electrode disposed on the third surface of the capacitor body and parts of the first and second side portions and connected to the first internal electrodes; and a second external electrode disposed on the fourth surface of the capacitor body and parts of the first and second side portions and connected to the second internal electrodes.
    Type: Grant
    Filed: October 7, 2021
    Date of Patent: January 30, 2024
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Su Hyoung Lee, Seung Jun Lee
  • Patent number: 11875946
    Abstract: A ceramic electronic component includes an element body including a dielectric and internal electrodes; a pair of external electrodes respectively formed on side surfaces of the element body, each of the external electrodes including a base layer and a plating layer formed on at least a part of the base layer, the base layer of each of the external electrodes containing metal and being formed to continuously cover a portion of a lower surface of the element body and the corresponding side surface of the element body connected to the lower surface, the base layer of each of the external electrodes being electrically connected to one or more of the internal electrodes; and an insulating layer formed on an upper surface of the element body, the insulating layer having a thickness that is less than a thickness of the plating layer of each of the external electrodes.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: January 16, 2024
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Yoshinari Take
  • Patent number: 11869721
    Abstract: A capacitor component includes: a body including a dielectric layer and an internal electrode layer; and an external electrode disposed on the body, and connected to the internal electrode layer. A surface color of the body is R?30, G?30, B?40 based on R/G/B, and a dielectric constant of the dielectric layer is 2000 or more and 4000 or less.
    Type: Grant
    Filed: October 19, 2021
    Date of Patent: January 9, 2024
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seok Hyun Yoon, Joo Hee Lee, In Ho Jeon, Song Je Jeon, Jin Woo Kim
  • Patent number: 11869722
    Abstract: A capacitor component includes a body having a first surface and a second surface opposing each other and including a multilayer structure in which a plurality of dielectric layers are stacked and first and second internal electrodes are alternately disposed with respective dielectric layers interposed therebetween and exposed to the first surface and the second surface, respectively, first and second metal layers covering the first surface and the second surface and connected to the first and second internal electrodes, respectively, first and second ceramic layers covering the first and second metal layers, and first and second external electrodes covering the first and second ceramic layers and connected to the first and second metal layers to be electrically connected to the first and second internal electrodes, respectively.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: January 9, 2024
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sung Hyun Cho, Byeong Chan Kwon, Yong Jin Yun, Ki Pyo Hong, Jae Yeol Choi
  • Patent number: 11866571
    Abstract: A polycarbonate-polysiloxane includes specific amounts of first carbonate units having the structure wherein R1 is a C6-C16 divalent aromatic group, second carbonate units having the structure wherein R2 is a C17-C40 divalent aromatic group having the structure wherein Rf, Rg, Rh, Ri, Rj, Rk, Xb, j, m, n, x, and y are defined herein. The polycarbonate-polysiloxane is useful for forming thin extruded films, which in turn are useful for fabricating electrostatic film capacitors.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: January 9, 2024
    Assignee: SHPP GLOBAL TECHNOLOGIES B.V.
    Inventors: Andrew Thomas Pingitore, Matthew Frank Niemeyer, James Alan Mahood, Brandon Philippe Gindt
  • Patent number: 11869725
    Abstract: A stacked capacitor includes a capacitor stack. The capacitor stack includes a base plate having a first surface and a second opposing surface, a first dielectric layer on or over the base plate, and a first conductive plate on or over the first dielectric layer. A second dielectric layer is on or over the first conductive plate. A second conductive plate on or over the second dielectric layer. The capacitor stack has at least one sloped side with at least one slope with respect to the second surface of the base plate.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: January 9, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Michael Hans Enzelberger-Heim, Jonas Höhenberger
  • Patent number: 11869718
    Abstract: A multilayer capacitor includes a capacitor body having first to sixth surfaces, including a plurality of first and second dielectric layers and a plurality of internal electrodes stacked; and first and second external electrodes. The internal electrode includes first and second internal electrodes, a first floating electrode disposed between the first and second internal electrodes on the first dielectric layer, and second and third floating electrodes disposed on the second dielectric layer. The second floating electrode overlaps a portion of the first internal electrode and a portion of the first floating electrode, and the third floating electrode overlaps a portion of the second internal electrode and a portion of the first floating electrode. a/L is 0.113 or more, in which L is a length of the capacitor body, and a is a distance between the first floating electrode and the first or second internal electrodes.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: January 9, 2024
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Gi Sub Lee, Ah Young Lee, Chung Hyeon Ryu
  • Patent number: 11862405
    Abstract: An element body is formed with a through hole to be open at a first main surface and a second main surface opposing each other. A through-conductor includes a first portion located inside the through hole and a second portion protruding from the second main surface. A case surrounds the element body and is electrically insulating. A cover surrounds the second portion and is electrically insulating. A first resin is contained in the case and coats the element body. A second resin is contained in the cover and is located in a space between an inner surface of the element body and the first portion. The second resin has an electrical resistivity less than an electrical resistivity of the first resin.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: January 2, 2024
    Assignee: TDK CORPORATION
    Inventors: Yuta Kamo, Kenichi Kamehashi, Hisashi Tanaka, Isao Fujiwara
  • Patent number: 11854745
    Abstract: A modified Ni—Ti—Ta dielectric material for multi-layer ceramic capacitor (MLCC) and a low-temperature preparation method thereof are provided. By using characteristics that radii of the Cu2+ ion and (Al1/2Nb1/2)4+ ion are close to those of Ni and Ti elements, respectively, Cu2+, Al3+ and Nb5+ ions are introduced into a Ni0.5Ti0.5TaO4 matrix for partial substitution, a negative temperature coefficient of dielectric constant of ?220±30 ppm/° C. is provided while a sintering temperature is significantly reduced, and deterioration factors of loss caused by sintering aids is reduced, so that the dielectric material applied to radio frequency MLCC with low loss, low cost and good process stability is prepared.
    Type: Grant
    Filed: April 27, 2023
    Date of Patent: December 26, 2023
    Assignee: Yangtze Delta Region Institute (Huzhou), University of Electronic Science and Technology of China
    Inventors: YuanYuan Yang, XiaoZhen Li, MengJiang Xing, YanLing Luo, HongYu Yang, QingYang Fan, Hao Li, YunSheng Zhao
  • Patent number: 11854742
    Abstract: A capacitor integrated structure, a capacitor unit and a manufacturing process thereof are provided. The manufacturing process of capacitor units includes the steps of: forming a plurality of capacitor stacking structures on a substrate having an insulation layer thereon; performing a first cut on insulation dividers provided between the adjacent capacitor stacking structures to form a plurality of recesses that expose first conductive portion and second conductive portion of each of the capacitor stacking structures; filling a metallic material in the recesses to form a plurality of metallic dividers that are electrically connected to the first conductive portion and the second conductive portion of each of the capacitor stacking structures; performing a second cut on the metallic dividers to form a plurality of independent capacitor units; and forming metallic walls on two opposite sides of each of the capacitor units, so as to provide a capacitor unit having two end electrodes.
    Type: Grant
    Filed: June 19, 2021
    Date of Patent: December 26, 2023
    Assignee: POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATION
    Inventors: Wei-Yu Lin, Kuo-Yu Yeh
  • Patent number: 11848157
    Abstract: A ceramic electronic device includes a multilayer structure in which each of a plurality of internal electrode layers and each of three or more of dielectric layers of which a main component is ceramic are alternately stacked. The three or more of dielectric layers include Sn. A dielectric layer having a smaller Sn concentration is closer to an outermost end in a stacking direction than a dielectric layer having a larger Sn concentration and being located on a center side of the stacking direction, in a relationship of at least two of the three or more of dielectric layers.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: December 19, 2023
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Yoichi Kato
  • Patent number: 11837406
    Abstract: A multilayer electronic component includes a body including a plurality of internal electrodes and a dielectric layer disposed between the plurality of internal electrodes; and an external electrode disposed on the body and connected to the plurality of internal electrodes, wherein each of the plurality of internal electrodes includes a plurality of nickel layers, and a heterogeneous material layer provided between the plurality of nickel layers.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: December 5, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Eung Seok Lee, Tae Gyun Kwon, Yun Sung Kang
  • Patent number: 11823844
    Abstract: A capacitor component includes a body including a dielectric layer and an internal electrode layer; and an external electrode disposed on one surface of the body, wherein the external electrode includes first electrode layers disposed on the one surface of the body to be spaced apart from each other, and covering a region of the one surface of the body through which the internal electrode layer is exposed; a second electrode layer including a base resin and a conductive connection portion disposed in the base resin, and disposed on the one surface of the body to cover the first electrode layers; and an intermetallic compound disposed only between each of the first electrode layers and the second electrode layer.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: November 21, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jung Min Kim, Hong Je Choi, Ji Hye Han, Byung Woo Kang, Hye Jin Park, Sang Wook Lee, Bon Seok Koo, Jung Won Lee
  • Patent number: 11817272
    Abstract: In a metallized film 1, n electrode portions 20, which are metal deposition portions, are formed in parallel on one surface of a dielectric film 2 having a film width corresponding to n capacitor elements, n being an even number of 2 or more. Each electrode portion 20 is provided with a plurality of inclined margins 31 and 32, which are metal non-deposition portions extending at an angle with respect to a film width direction, at a regular interval in a film length direction. Across a center line Lc virtually extending in the film length direction at the center in the film width direction, the inclined margins 31 of the electrode portion 20 located on one side in the film width direction, and the inclined margins 32 of the electrode portion 20 located on the other side in the film width direction are inclined in opposite directions so as to be line-symmetric with respect to the center line Lc.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: November 14, 2023
    Assignee: OJI HOLDINGS CORPORATION
    Inventors: Kazuyuki Hiate, Akihiro Kakehi, Katsuyuki Moritaka, Yoshikazu Fujishiro, Masahiro Nakata
  • Patent number: 11817262
    Abstract: Relatively low noise capacitors are provided for surface mounted applications. Electro-mechanical vibrations generate audible noise, which are otherwise relatively reduced through modifications to MLCC device structures, and/or their mounting interfaces on substrates such as printed circuit boards (PCBs). Different embodiments variously make use of flexible termination compliance so that surface mounting has reduced amplitude vibrations transmitted to the PCB. In other instances, side terminal and transposer embodiments effectively reduce the size of the mounting pads relative to the case of the capacitor, or a molded enclosure provides standoff, termination compliance and clamping of vibrations.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: November 14, 2023
    Assignee: KYOCERA AVX Components Corporation
    Inventors: Andrew P. Ritter, Carl L. Eggerding
  • Patent number: 11804337
    Abstract: Disclosed herein is an electrochemical device forming a chip-capacitor or a super-capacitor. The electrochemical device includes: a ceramic substrate having a nonconductive ceramic layer, a current collecting layer disposed on a nonconductive ceramic layer and made of ceramic or cermet, and a metal layer arranged on outer surfaces of the nonconductive ceramic layer and the current collecting layer; an electrode having a positive electrode and a negative electrode and formed on the current collecting layer; and a nonconductive ceramic packaging module located on the ceramic substrate to accommodate electrolyte therein, wherein the metal layer is exposed to the outside of the nonconductive ceramic packaging module.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: October 31, 2023
    Assignee: Korea Institute of Energy Research
    Inventors: Jung Joon Yoo, Ji Haeng Yu, Kyong Sik Yun, Jeong Hun Baek, Hyeon Jin Kim
  • Patent number: 11798744
    Abstract: A multilayer ceramic capacitor includes a multilayer body, and external electrodes on a portion of a side surface portion including four side surface of the multilayer body, and on a portion of a first main surface of the multilayer body. The first main surface includes first regions covered with the external electrodes and a second region exposed from the external electrodes. The first regions of the first main surface each include recesses therein. The recesses in each of the first regions each include a spherical curved wall surface. The recesses in each of the first regions each have an average inlet size of about 0.3 ?m or more and about 10.5 ?m or less.
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: October 24, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Ryo Nishimura
  • Patent number: 11798748
    Abstract: A multi-layer ceramic electronic component includes (I) a ceramic body including (i) a protective portion that includes an end surface facing in a first direction, circumferential surfaces, and a ridge including a recess extending along the first direction and connects the circumferential surfaces, and (ii) a functional portion including internal electrodes laminated in a second direction, and (II) an external electrode including (i) a base film covering the end surface and including a first, second, and third covering portions formed on the end surface, on the circumferential surfaces, and on the recess, respectively, (ii) an intermediate film formed on the base film and continuously covering the first, second, and third covering portions, and (iii) a surface film formed on the intermediate film, wherein the recess is disposed outside end portions of the internal electrodes in a third direction orthogonal to the first and second directions.
    Type: Grant
    Filed: March 15, 2023
    Date of Patent: October 24, 2023
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Ryo Ono, Tetsuhiko Fukuoka, Shoji Kusumoto, Akihiko Kono
  • Patent number: 11791100
    Abstract: A film capacitor preferably includes a single film capacitor layer wound around itself in adjacent layers to form a winding. The film capacitor layer preferably includes a dielectric film, a first metallization layer formed on the dielectric film, a dielectric coating formed on the first metallization layer, and a second metallization layer formed on the dielectric coating. A metallic contact layer is preferably formed on an outer edge of the winding. A terminal is preferably formed on an outer edge of the metallic contact layer. An insulating material preferably encapsulates the winding, the metallic contact layer, and a portion of the terminal. The capacitor as self-healing properties. Further, the border of the electrodes may be wave-cut. Further, an insulating gap may be added between the border and the upper electrode.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: October 17, 2023
    Inventor: Geert Stevens
  • Patent number: 11791108
    Abstract: The invention provides a process for preparing an electrode, comprising: electrodeposition of metallic ruthenium/ruthenium oxide (Ru(0)/RuO2) coating onto a progressively etched nickel surface; and partial electrochemical oxidation of said metallic ruthenium to ruthenium oxide. The electrode produced and a pseudo-capacitor based on the electrode are also disclosed.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: October 17, 2023
    Assignee: B.G. NEGEV TECHNOLOGIES & APPLICATIONS LTD., AT BEN-GURION UNIVERSITY
    Inventors: Ahiud Morag, Raz Jelinek
  • Patent number: 11791102
    Abstract: A multilayer ceramic capacitor has a relationship of about 10°??1?about 50° and a relationship of about 10°??2?about 50°, where ?1 denotes an angle between a first end surface and a perpendicular extending from a side of a first main surface at a point of intersection of the first main surface and the first end surface, and ?2 denotes an angle between a second end surface and a perpendicular extending from a side of the first main surface at a point of intersection of the first main surface and the second end surface.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: October 17, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Suguru Nakano, Risa Hojo, Akira Tanaka, Toru Nishikawa, Satoshi Muramatsu
  • Patent number: 11776755
    Abstract: A multilayer ceramic electronic component includes a ceramic body having a dielectric layer, and a capacitance forming portion disposed in such a manner that first and second internal electrodes are stacked with the dielectric layer interposed therebetween, and first and second external electrodes disposed on the ceramic body, respectively, the first and second external electrodes including first and second base electrodes connected to the first and second internal electrodes, respectively, and first and second conductive layers disposed to cover the first and second base electrodes, respectively. The first and second conductive layers have a thickness in a range of 0.1 ?m to 10 ?m.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: October 3, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hyung Duk Yun, Seonyoung Yoo, Hong Gi Kim, Byeongguk Choi, Young Hoon Song, Yuseop Lee, A Ra Cho, Donghwi Shin
  • Patent number: 11777046
    Abstract: An energy storage device comprising a substrate comprising a groove having a first and a second face. A capacitor material in the groove. The first and the second face of the groove having a coat of metal. Wherein the coat of metal on the first face is not in electrical contact with the coat of metal on the second face.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: October 3, 2023
    Assignee: POWER ROLL LIMITED
    Inventor: Alexander John Topping
  • Patent number: 11764002
    Abstract: An energy storage system and energy storage module for providing electrical energy to a generator start energy system or other electrically driven system. One or more ultracapacitors are included within the energy storage module for storing and providing electrical charge via a two-post electrical connection of the energy storage module. A mountable housing of the energy storage module provides a variety of mounting orientations within a compartment of the generator start energy system or other electrically driven system.
    Type: Grant
    Filed: July 11, 2022
    Date of Patent: September 19, 2023
    Assignee: Richardson Electronics, Ltd.
    Inventors: Jeremy Winston Wilks, John Raymond Curran, Brian Christopher Gumino, Stephen Edward Fischer, Mason Patrick Kelley, Peter Mark Bocek, Justin Marshall Block
  • Patent number: 11746599
    Abstract: A downhole drilling system is disclosed. The downhole drilling system may include a drill bit including a first electrode and a second electrode. The downhole drilling system may also include a pulse-generating circuit coupled to the first electrode and the second electrode. A capacitor within the pulse-generating circuit may include a plurality of electrode sheets and a plurality of dielectric sheets interleaved with the plurality of electrode sheets. Each of the dielectric sheets may include a composite material including a polymer matrix formed from a polymer component and a nanoparticle component that increases the dielectric constant of the composite material above that of the polymer component.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: September 5, 2023
    Assignees: Halliburton Energy Services, Inc., Chevron U.S.A. Inc., SDG, LLC
    Inventors: William M. Moeny, Kirk Slenes
  • Patent number: 11735367
    Abstract: A multilayer electronic component includes an external electrode having a connection portion and a band portion. An organic layer is disposed between an electrode layer and a plating layer of the band portion of the external electrode, and a conductive resin layer is disposed between the electrode layer and the plating layer of the connection portion of the external electrode.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: August 22, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Do Young Jeong, Jin Mo Ahn, Eun Hee Jeong, Ga Young An
  • Patent number: 11728092
    Abstract: A broadband multilayer ceramic capacitor may include a monolithic body including a plurality of dielectric layers stacked in the Z-direction, a first external terminal, and a second external terminal. A plurality of active electrodes, a bottom shield electrode, and a top shield electrode may be arranged within the monolithic body. The top shield electrode may be positioned between the active electrodes and a top surface of the capacitor and spaced apart from the top surface of the capacitor by a top-shield-to-top distance. A bottom shield electrode may be positioned between the active electrodes and the bottom surface of the capacitor and spaced apart from the bottom surface of the capacitor by a bottom-shield-to-bottom distance. A ratio of the top-shield-to-top distance to the bottom-shield-to-bottom distance may be between about 0.8 and about 1.2. The bottom-shield-to-bottom distance may range from about 8 microns to about 100 microns.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: August 15, 2023
    Assignee: KYOCERA AVX Components Corporation
    Inventors: Marianne Berolini, Jeffrey A. Horn, Richard C. VanAlstine
  • Patent number: 11721487
    Abstract: A method of producing a multi-layer ceramic electronic component includes: preparing a multi-layer unit including ceramic layers laminated in a direction of a first axis, internal electrodes disposed between the ceramic layers, and first and second side surfaces facing each other in a direction of a second axis orthogonal to the first axis, the internal electrodes being exposed from the first and second side surfaces; thermocompression-bonding a first side margin sheet to the first side surface; forming a first side margin by punching the thermocompression-bonded first side margin sheet with the first side surface; thermocompression-bonding a second side margin sheet to the second side surface, the second side margin sheet including a bonding surface having a higher flexibility than the first side margin formed on the first side surface; and forming a second side margin by punching the thermocompression-bonded second side margin sheet with the second side surface.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: August 8, 2023
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Shota Tanaka, Joji Kobayashi
  • Patent number: 11721488
    Abstract: A multilayer ceramic capacitor is disclosed including a first external terminal disposed along a first end of the capacitor, a second external terminal disposed along a second end of the capacitor opposite the first end, an active electrode region containing alternating dielectric layers and active electrode layers, and a shield electrode region including at least two shield electrodes that are spaced apart by a shield layer gap in the longitudinal direction. The distance from the active electrode region to the shield electrode region may range from about 4% to about 20% of a thickness of the capacitor between a top surface and a bottom surface opposing the top surface. The shield layer gap may range from about 3% to about 60% of an external terminal gap between the first external terminal and second external terminal in the longitudinal direction on at least one of the top or bottom surfaces.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: August 8, 2023
    Assignee: KYOCERA AVX Components Corporation
    Inventors: Jeffrey A. Horn, Marianne Berolini
  • Patent number: 11721489
    Abstract: A multilayer ceramic capacitor includes a body having a dielectric layer and internal electrodes disposed to be alternately exposed to the third and fourth surfaces with the dielectric layer interposed therebetween. External electrodes include connection parts respectively formed on opposing surfaces of the body, band parts formed to extend from the connection parts to portions of side surfaces of the body, and corner parts in which the connection parts and the band parts are contiguous. A thickness of each of the external electrodes may be 50 nm to 2 ?m. The external electrodes may be formed using a barrel-type sputtering method. A ratio t2/t1 may satisfy 0.7 to 1.2, where t1 is a thickness of each connection part and t2 is a thickness of each band part. A ratio t3/t1 may satisfy 0.7 to 1.0, where t3 is a thickness of each corner part.
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: August 8, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Dong Joon Oh, Tae Joon Park, Sang Wook Lee, Sung Min Cho, Seung Mo Lim
  • Patent number: 11715595
    Abstract: A multilayer electronic component includes a body including dielectric layers and internal electrodes alternately disposed with the dielectric layers and external electrodes disposed on the body and connected to the internal electrodes. The one of the internal electrodes includes Ni, Ba, Ti, O, and Tb, and a content of Tb relative to a sum of contents of Ni, Ba, Ti, O, and Tb is 0.45 to 3.0 wt %.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: August 1, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Min Jung Cho, Byung Kun Kim, Yu Hong Oh, Chang Hak Choi
  • Patent number: 11705285
    Abstract: A chip component includes a substrate that has a first surface and a second surface on a side opposite to the first surface, a plurality of wall portions that are formed on a side of the first surface by using a part of the substrate, that have one end portion and one other end portion, and that are formed of a plurality of pillar units, a support portion that is formed around the wall portions by using a part of the substrate and that is connected to at least one of the end portion and the other end portion of the wall portions, and a capacitor portion formed by following a surface of the wall portion, in which each of the pillar units includes a central portion and three convex portions that extend from the central portion in three mutually different directions in a plan view and in which the wall portion is formed by a connection between the convex portions of the pillar units that adjoin each other.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: July 18, 2023
    Assignee: ROHM CO., LTD.
    Inventor: Keisuke Fukae