By Metal Fusion Patents (Class 29/840)
  • Patent number: 8689429
    Abstract: A method of reworking a head suspension removes a slider from the head suspension by pressing a blade from a first side toward a second side in a longitudinal direction of the slider to solder ball bonding, stopping the second side of the slider in the longitudinal direction with a holding mechanism, and forcing the blade to bite and cut the solder ball bonding to remove the slider from the flexure. The solder ball bonding is cut without applying extra force to components of the head suspension except the slider. The method improves product yield.
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: April 8, 2014
    Assignee: NHK Spring Co., Ltd.
    Inventors: Sei Kawao, Takeshi Shimoda, Shinpei Kakiuchi
  • Patent number: 8692281
    Abstract: This invention relates to the thermal management, extraction of light, and cost effectiveness of Light Emitting Diode, or LED, electrical circuits. An integrated circuit LED submount is described, for the packaging of high power LEDs. The LED submount provides high thermal conductivity while preserving electrical insulation. In particular, a process is described for anodizing a high thermal conductivity aluminum alloy sheet to form a porous aluminum oxide layer and a non-porous aluminum oxide layer. This anodized aluminum alloy sheet acts as a superior electrical insulator, and also provides surface morphology and mechanical properties that are useful for the fabrication of high-density and high-power multilevel electrical circuits.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: April 8, 2014
    Assignee: DiCon Fiberoptics Inc.
    Inventors: Wen-Herng Su, Junying Lu, Ho-Shang Lee
  • Patent number: 8686299
    Abstract: An electronic element unit (1) includes an electronic element (2) having a plurality of connecting terminals (12) on a lower surface thereof, a circuit board (3) having a plurality of electrodes (22) corresponding to the connecting terminals (12) on an upper surface thereof. The connecting terminals (12) and the electrodes (22) are connected by solder bumps (23), and the electronic element (2) and the circuit board (3) are partly bond by a resin bond part (24) made of a thermosetting material of a thermosetting resin, and a metal powder (25) is included in the resin bond parts (24) in a dispersed state. The metal powder (25) has a melting point lower than a temperature at which the resin bond parts (24) are heated when a work (a repairing work) is carried out for removing the electronic element (2) from the circuit board (3).
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: April 1, 2014
    Assignee: Panasonic Corporation
    Inventors: Koji Motomura, Seiichi Yoshinaga, Tadahiko Sakai
  • Patent number: 8677615
    Abstract: A method for embedding at least one component into a dielectric layer. obtain a good result, it is provided that the method includes the following steps: a) Position and affix the at least one component on a carrier; b) Cast a liquid dielectric around the at least one component, thereby enclosing the at least one component completely; c) Harden the liquid dielectric to form a solid dielectric layer; and d) Apply, in particular by lamination thereon, another layer, in particular an electrically conductive layer. The use of a dielectric layer formed entirely of liquid dielectric, wherein the liquid dielectric is not converted into a solid state until the dielectric is processed.
    Type: Grant
    Filed: July 8, 2011
    Date of Patent: March 25, 2014
    Assignee: DYCONEX AG
    Inventors: Marc Hauer, Markus Riester
  • Patent number: 8680932
    Abstract: An oscillator that can suppress a solder crack caused by a temperature change by a simple structure at low cost and improve heat cycle resistance performance is provided. The oscillator includes an epoxy resin board and an electronic component mounted on the board. Two-terminal electrode patterns are formed on the board, and connected to terminal electrodes of the electronic component by solder. A projection is formed on each of the electrode patterns at a part connected to a corresponding terminal electrode to create a space between the terminal electrode and the electrode pattern, and the solder forms a fillet in the space. This contributes to enhanced adhesion strength of the solder.
    Type: Grant
    Filed: January 26, 2012
    Date of Patent: March 25, 2014
    Assignee: Nihon Dempa Kogyo Co., Ltd
    Inventors: Daisuke Nishiyama, Kenji Kasahara, Hiroyuki Murakoshi
  • Publication number: 20140077360
    Abstract: An embodiment bump on trace (BOT) structure includes a contact element supported by an integrated circuit, an under bump metallurgy (UBM) feature electrically coupled to the contact element, a metal ladder bump mounted on the under bump metallurgy feature, the metal ladder bump having a first tapering profile, and a substrate trace mounted on a substrate, the substrate trace having a second tapering profile and coupled to the metal ladder bump through direct metal-to-metal bonding. An embodiment chip-to-chip structure may be fabricated in a similar fashion.
    Type: Application
    Filed: January 17, 2013
    Publication date: March 20, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Taiwan Semiconductor Manufacturing Company, Ltd.
  • Publication number: 20140076617
    Abstract: A device includes a polymer. A device die is disposed in the polymer. A passive device includes three Through Assembly Vias (TAVs) penetrating through the polymer, wherein the TAVs are coupled in series. A Redistribution Line (RDL) is underlying the polymer. The RDL electrically couples a first one of the TAVs to a second one of the TAVs.
    Type: Application
    Filed: September 20, 2012
    Publication date: March 20, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Hua Chen, Chen-Shien Chen
  • Publication number: 20140079596
    Abstract: A bipolar ionization device in which fiberglass is used as the dielectric. In one embodiment, a fiberglass board is used, with the anode on one side of the board and the cathode on the other side of the board. A number of flat boards can be stacked, with spacing between them to allow air flow to scavenge ions, with stanchions providing both mounting and electrical connections to the ionization devices. In another embodiment, a fiberglass tube is used, with the cathode inside the tube and the anode outside the tube.
    Type: Application
    Filed: September 20, 2012
    Publication date: March 20, 2014
    Applicant: CLEAN AIR GROUP, INC.
    Inventor: Hal Ross Gurman
  • Publication number: 20140076613
    Abstract: A packaged component and a method for making a packaged component are disclosed. In an embodiment the packaged component includes a component carrier having a component carrier contact and a component disposed on the component carrier, the component having a component contact. The packaged component further includes a conductive connection element connecting the component carrier contact with the component contact, an insulating film disposed directly at least on one of a top surface of the component or the conductive connection element, and an encapsulant encapsulating the component carrier, the component and the enclosed conductive connection elements.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 20, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Joachim Mahler, Manfred Mengel, Khalil Hosseini, Franz-Peter Kalz
  • Patent number: 8671561
    Abstract: A substrate manufacturing apparatus 100 has a substrate delivery path 120 through which a multi-unit substrate 110 is delivered and a mask delivery path 140 through which an individual mask 130 is delivered. The substrate delivery path 120 has a pad detecting device 160 for detecting a position of a pad 112 formed on a surface of the substrate 110. The mask delivery path 140 has a mask hole detecting device 220 for detecting a position of a conductive ball inserting hole 132 of the individual mask 130. A moving position of an adsorbing head 212 is adjusted in such a manner that the position of the conductive ball inserting hole 132 is coincident with that of the pad 112 of the substrate 110 based on pad position information of the pad detecting device 160 and mask hole position information of the mask hole detecting device 220.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: March 18, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kiyoaki Iida, Kazuo Tanaka, Hideaki Sakaguchi, Mitsutoshi Higashi
  • Publication number: 20140063769
    Abstract: Components may be mounted to printed circuit substrates using solder. A breakaway support tab may be detachably connected to a component and may help prevent the component from shifting or toppling over during reflow operations. The component and breakaway support tab may be formed from sheet metal. The interface that links the component to the breakaway support tab may be perforated or half sheared to allow the breakaway support tab to be easily separated from the component following reflow operations. The breakaway support tab may be fixed in place during reflow operations by mechanically coupling the breakaway support tab to a fixture or by mounting the breakaway support tab to an unused portion of a panel of printed circuit substrates. A breakaway support tab may be mechanically coupled between two components on a printed circuit substrate and may be used to maintain a distance between the components during reflow operations.
    Type: Application
    Filed: August 29, 2012
    Publication date: March 6, 2014
    Inventors: Michael B. Wittenberg, Jared M. Kole, Sawyer I. Cohen, Shayan Malek
  • Publication number: 20140055961
    Abstract: Printed circuit boards are provided with recess-mounted components. The components may be mounted within recesses in the surface of a printed circuit board substrate that are larger than the component. A solder stencil may be used to mount the components in a recess. The solder stencil may have curved portions between a planar portion and a depressed portion. The difference in the lateral width of the recess and the lateral width of the component may be configured to allow the planar portion and the depressed portion to be placed against the surface of the printed circuit board without damaging edges of the recess during solder application processes. The recess may be formed by placing a dummy component having a size and shape that is larger than the size and shape of the recess-mounted component against a portion of the printed circuit board during board formation operations.
    Type: Application
    Filed: August 23, 2012
    Publication date: February 27, 2014
    Inventors: Shayan Malek, Nicholas G. L. Merz, Michael B. Wittenberg
  • Publication number: 20140053398
    Abstract: Disclosed is an electronic component mounting line on which a substrate undergoes solder paste printing, electronic component placements, and then reflow, while being moved from upstream to downstream.
    Type: Application
    Filed: October 19, 2012
    Publication date: February 27, 2014
    Inventors: Tadashi Maeda, Hiroki Maruo, Tsubasa Saeki
  • Publication number: 20140055968
    Abstract: An electronic device is presented for electrical connection between a first pad contact of an integrated circuit component and a target contact positioned substantially in a first plane of a target platform. The electronic device includes a first surface substantially parallel to the first plane and a second surface below the first surface substantially parallel to the first plane. The first surface includes a first contact region configured to connect to the first pad contact when the electronic device is connected between the first pad contact and the target contact. The second surface includes a second contact region configured to connect to the target contact when the electronic device is connected between the first pad contact and the target contact. The electronic device further includes a multitude of electrically passive elements connected between the first and second contact regions.
    Type: Application
    Filed: October 31, 2013
    Publication date: February 27, 2014
    Inventor: Kong-Chen Chen
  • Publication number: 20140043779
    Abstract: A method of manufacturing an electronic device includes preparing a lid having a seal hole, a package having a seam ring (metalization portion) and constituting an internal space along with the lid, and a crystal vibrating piece (electronic component), mounting the crystal vibrating piece in the package, placing the lid on the package such that the seal hole and the seam ring overlap each other in plan view, seam-welding the outer circumferential portion of the lid and the package, and irradiating an energy beam to bond the seal hole and the seam ring and sealing the seal hole and the internal space.
    Type: Application
    Filed: August 6, 2013
    Publication date: February 13, 2014
    Applicant: Seiko Epson Corporation
    Inventor: Shinji Nakayama
  • Patent number: 8646676
    Abstract: An object of the invention is to provide an electronic component mounting system and an electronic component mounting method which can execute component mounting work on a plurality of boards simultaneously, concurrently and efficiently so that high productivity and responsiveness to production of many items can be achieved consistently.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: February 11, 2014
    Assignee: Panasonic Corporation
    Inventor: Kazuhide Nagao
  • Publication number: 20140036459
    Abstract: A device for electrically interconnecting and packaging electronic components. In one embodiment, a modular non-conducting base member having one or more component recesses and a plurality of lead channels formed therein is provided. At least one electronic component is disposed within the recess, and the wire leads of the component routed through the lead channels to a conductive lead terminal. A plurality of lead terminals, adapted to cooperate with the non-conducting base member, are received therein, and adapted to place the device in signal communication with an external printed circuit board. The modular non-conducting base members are assembled or stacked to form a unitary modular assembly. Methods for fabricating the device are also disclosed.
    Type: Application
    Filed: July 29, 2013
    Publication date: February 6, 2014
    Inventors: Aurelio J. Gutierrez, Russell L. Machado, Christopher P. Schaffer, Victor H. Renteria
  • Publication number: 20140028502
    Abstract: A method for constructing a wireless communications apparatus includes attaching a three dimensional antenna having a first end and a second end to a printed circuit board (PCB) using a spring-loaded attachment mechanism. The three dimensional antenna is attached in an orientation that is perpendicular to a mounting surface of the PCB. The first end of the three dimensional antenna is further soldered to the PCB.
    Type: Application
    Filed: November 7, 2012
    Publication date: January 30, 2014
    Applicant: Logitech Europe S.A.
    Inventors: Laurent Cariou, Frédéric Fortin, Darragh Luttrell, Vilasinh Vilaylack
  • Publication number: 20140029224
    Abstract: An method of mounting electronic component includes: providing a connecting layer between a wiring and an electronic component, the connecting layer including a conductive layer formed of a solder powder-containing resin composition containing thermosetting resin, solder powder, and a reducing agent and one or two layers of a thermoplastic resin layer formed of thermoplastic resin; and electrically connecting the electronic component to the wiring through the connecting layer.
    Type: Application
    Filed: July 29, 2013
    Publication date: January 30, 2014
    Applicants: SENJU METAL INDUSTRY CO., LTD., OSAKA UNIVERSITY
    Inventors: Kozo FUJIMOTO, Shinji FUKUMOTO, Michiya MATSUSHIMA, Satoshi WATANABE, Takeshi KAN, Minoru UESHIMA, Takeshi SAKAMOTO, Shu INOUE
  • Patent number: 8635769
    Abstract: A light strip includes a conductive plate including at least two first conductive strips, at least one column second conductive strips; first electric conductors including light sources soldered at said distance between said second conductive strips, second electric conductors soldered between said first conductive strips and said second conductive strips the light strip of the present invention not only has simple structures, but also has good stability.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: January 28, 2014
    Assignee: Shenzhen Clear Illuninating Technology Co., Ltd.
    Inventor: Chang Gui Liu
  • Publication number: 20140022735
    Abstract: For producing a three-dimensional circuit component, an electronic component is mounted on a synthetic resin block. A plurality of electrically-conductive patterns used to establish an electrical connection to the electronic component are formed on the block along a three-dimensional shape of the block. An end of each electrically-conductive patterns is provided with a solder-disposed section. A solder is provided between the solder-disposed section and an opposed surface of the electronic component. The section of each electrically-conductive patterns other than the solder-disposed section and a section on which the electronic component is mounted is internally formed in the block. Since the section of each electrically-conductive patterns other than the section on which the electronic component is mounted is internally formed in the block, the electrically-conductive patterns are not unnecessarily exposed.
    Type: Application
    Filed: July 15, 2013
    Publication date: January 23, 2014
    Inventors: Nobutaka Yamagishi, Naoki Yamashita, Atsushi Imai
  • Patent number: 8627566
    Abstract: A ceramic header configured to form a portion of an electronic device package includes a mounting portion configured to provide a mounting surface for an electronic device. In addition, the ceramic header includes one or more conductive input-output connectors operable to provide electrical connections from a first surface of the ceramic header to a second surface of the ceramic header. The ceramic header also includes one or more thermally polished surfaces.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: January 14, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Moody K. Forgey, Mark A. Kressley
  • Publication number: 20140008105
    Abstract: A circuit board is formed such that a printed circuit board is connected to an injection molded circuit board. An internal circuit conductor is exposed at conductor part at a printed circuit board mounting part. Through holes are provided in the printed circuit board. The conductor part is formed substantially perpendicular to the circuit board mounting part, and is inserted into a through hole. A female screw part is formed in the vicinity of the conductor part in the printed circuit board mounting part. The female screw part can be screwed together with a bolt, which is a securing member. The printed circuit board is connected to the conductor part by solder. A hole is formed in advance in the vicinity of the solder on the printed circuit board. The bolt passes through the hole and is secured to the female screw part.
    Type: Application
    Filed: September 9, 2013
    Publication date: January 9, 2014
    Applicants: FURUKAWA AUTOMOTIVE SYSTEMS INC., FURUKAWA ELECTRIC CO., LTD.
    Inventors: Kyutaro ABE, Hiroyuki FUKAI, Yasushi KIHARA, Juro UTSUMI, Naomi TAKAHASHI
  • Publication number: 20140002124
    Abstract: A wire probe assembly and forming process is described.
    Type: Application
    Filed: June 30, 2012
    Publication date: January 2, 2014
    Inventors: Todd P. Albertson, Michael T. Crocker, David Shia, Lothar R. Kress
  • Patent number: 8615871
    Abstract: A chip mounted circuit substrate (COF) 4 to be installed on a liquid crystal display panel 1 comprises an arrangement wiring electrodes 42 formed on a base film 41 at a first pitch P1 in a first direction (A-direction) and two of first positioning marks 43 formed at both sides of the arrangement of the wiring electrodes 43 in the first direction. Before installing the COF 4 on the liquid crystal display panel 1 by thermo-compression bonding, the first pitch P1 of the wiring electrodes 42 is selected to be narrower than a second pitch P2 after performing the thermo-compression bonding in consideration with expansion of the base film 41 in the first direction. In addition, a part of each the first positioning mark 43 overlaps a second positioning mark 12 formed on the liquid crystal display panel 1 and protrudes outward from the second positioning mark 12 in the first direction.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: December 31, 2013
    Assignee: Funai Electric Co., Ltd.
    Inventor: Isao Eto
  • Patent number: 8613135
    Abstract: Methods and apparatuses for assembly of a non-planar device based on curved chips are described. Slots may be created as longitudinal openings in the chips to reduce bending stresses to increase allowable degrees of deformation of the chips. The chips may be deformed to a desired deformation within the allowable degrees of deformation via the slots. Holding constraints may be provided on at least a portion of the chips to allow the chips to remain curved according the desired deformation.
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: December 24, 2013
    Assignee: National Tsing Hua University
    Inventor: Long-Sheng Fan
  • Patent number: 8612041
    Abstract: A method is provided for determining a sequence of mounting a plurality of components on a board by using variable pitch heads having a plurality of pitches. The method includes: partitioning the board into a plurality of sectors, each of the sectors including a plurality of mounting points arranged in parallel with a direction in which the heads are arranged; dividing the board into a plurality of sub-boards including first sub-boards based on the sectors, each of the first sub-boards including as many mounting points as the heads; and determining a combination of a sequence of mounting the components on the board and at least one pitch among the pitches required to mount the components on the board in a shortest time, compared to another sequence or other sequences of mounting the components on the board and another pitch or other pitches among the pitches, based on the first sub-boards.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: December 17, 2013
    Assignee: Samsung Techwin Co., Ltd.
    Inventor: Yo-Sung Shim
  • Publication number: 20130329378
    Abstract: A Universal Serial Bus device includes a PCB module, a plastic package shell and a power module. The PCB module includes a PCB, and a storage chip and a control chip both arranged on the PCB module. The PCB includes opposite front end and rear end, and opposite upper surface and lower surface. The upper surface has a number of contacting portions, and the storage chip and the control chip being arranged on the lower surface. The plastic package shell at least encapsulates the lower surface of the PCB to encapsulate the storage chip and the control chip. The power module is electrically connected to the part of the PCB module where is not encapsulated by the plastic package shell.
    Type: Application
    Filed: April 23, 2013
    Publication date: December 12, 2013
    Applicant: Gerard Technologies (Suzhou) Co., Ltd.
    Inventors: Jian-Fei Hou, Jian Xu
  • Publication number: 20130328655
    Abstract: A transformer, such as a current sense transformer, in which conductive traces disposed within a printed circuit board serve as the primary winding of the transformer. The transformer also includes a secondary winding, for example wound around a hollow pin of a bobbin, through which a leg of a magnetic core is disposed. The magnetic core leg, and in some embodiments also all or a part of the secondary winding, is inserted into a through-hole in the printed circuit board that is surrounded by the primary winding traces.
    Type: Application
    Filed: March 15, 2013
    Publication date: December 12, 2013
    Inventors: Robert J. Catalano, David Stevens
  • Patent number: 8601682
    Abstract: A light circuit manufacturing process includes forming a palletized driver PCB board having a plurality of driver PCBs, forming a plurality of power PCBs on a palletized surface, forming slots in the driver PCBs, forming holes in the power PCBs, aligning both the power PCB palletization and the driver PCB palletization using reference holes such that the edges of each extend further in one direction or the other, and inserting thermal tabs into both the power PCB and the driver PCB.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: December 10, 2013
    Assignee: Nexxus Lighting, Incorporated
    Inventor: Zdenko Grajcar
  • Patent number: 8598458
    Abstract: An electronic device includes an electronic component, a joining member to be mechanically joined with the electronic component, and a metal conductor located between the electronic component and the joining member to mechanically join the electronic component and the joining member. The metal conductor is made of porous noble metal to have pores, and includes an end surface without being covered by the electronic component and the joining member. Furthermore, a reinforcing resin is impregnated from the end surface of the metal conductor to the pores inside of the metal conductor, so as to mechanically reinforce the metal conductor.
    Type: Grant
    Filed: February 3, 2011
    Date of Patent: December 3, 2013
    Assignee: DENSO CORPORATION
    Inventors: Hiroshi Ishino, Takao Izumi, Kazuhiro Tsuruta, Nobuyuki Kato
  • Patent number: 8595927
    Abstract: A method for manufacturing a printed wiring board includes preparing a core substrate having first and second surfaces, forming a penetrating hole from the first surface toward the second surface of the substrate, forming first conductor on the first surface of the substrate, forming second conductor on the second surface of the substrate, and filling conductive material in the hole such that through-hole conductor connecting the first and second conductors is formed. The forming of the hole includes forming a first opening portion on the first-surface side of the substrate, a second opening portion from the bottom of the first portion toward the second surface, and a third opening portion from the bottom of the second portion toward the second surface, and the forming of the hole satisfies X2<X3?X1 where X1, X2 and X3 represent the diameters of the first, second and third portions.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: December 3, 2013
    Assignee: Ibiden Co., Ltd.
    Inventors: Tsutomu Yamauchi, Satoru Kawai
  • Patent number: 8590146
    Abstract: A method comprising coupling a device to a printed circuit board, one of the device or the printed circuit board having a first connection pad and a second connection pad. The first and second connection pads are directly electrically coupled to one another, without any intervening components between the first and second connection pads, via a test path. The method further comprises performing a continuity test across the first and second connection pads and the test path and disabling the test path between the first and second connection pads.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: November 26, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Thomas Kinsley
  • Patent number: 8590145
    Abstract: Methods of fabricating a circuit structure are provided. The fabrication method includes: forming a chip layer, which includes obtaining at least one chip and disposing a structural material around and physically contacting the side surface(s) of each chip in the chip layer. The structural material has an upper surface substantially coplanar with or parallel to an upper surface of each chip and defines at least a portion of a front surface of the chip layer, and has a lower surface substantially coplanar with or parallel to a lower surface of each chip, which defines at least portion of a back surface of the chip layer. The method further includes forming at least one strengthening structure over the back surface of the chip layer. The strengthening structure is formed to strengthen an interface between the chip(s) and the structural material.
    Type: Grant
    Filed: October 16, 2009
    Date of Patent: November 26, 2013
    Assignee: Epic Technologies, Inc.
    Inventors: Charles W. Eichelberger, James E. Kohl
  • Patent number: 8584353
    Abstract: A method for producing scalable, low cost, reliable, compliant, low profile, low insertion force, high-density, separable and reconnectable interposer for high speed, high performance electronic circuitry and semiconductors. The method can be used to make, for example, electrical connections from components such as a Printed Circuit Board (PCB) to another PCB, MPU, NPU, or other semiconductor device. A normalized working range for an array of elastic contacts of the interposer can be about 0.2 to 1.0. A reversible normalized working range is maintained through multiple connections and reconnections using a highly elastic material for the contact arms. In one aspect, a first electrical component having a first array pitch can be connected to a second electrical component having a second array pitch.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: November 19, 2013
    Assignee: Neoconix, Inc.
    Inventor: John D. Williams
  • Patent number: 8584337
    Abstract: An electronic component repair method for removing an electronic component soldered on a substrate, the method includes: mounting a heat transfer plate on the electronic component to be removed, the heat transfer plate being formed by bonding a plurality of heat transfer members via a heat insulating member, heating the heat transfer plate mounted on the electronic component by a heating unit, the heating unit heating individually each of the heat transfer members by different heat amount; and removing the electronic component from the substrate after the heating.
    Type: Grant
    Filed: August 2, 2011
    Date of Patent: November 19, 2013
    Assignee: Fujitsu Limited
    Inventors: Tohru Harada, Mitsuo Takeuchi, Yoshiaki Yanagida
  • Patent number: 8567049
    Abstract: An electrical assembly (300, 400) includes a power IC such as a MOSFET (112, 412) attached to a substrate module (114, 214). The MOSFET includes a top surface comprising first and second conductive device surfaces (A, B), associated with first and second device ports, and a bottom surface comprising a third conductive device surface C associated with a third device port. A first foil element is bonded to the first conductive device surface(s) A and to each of the first conductive substrate surfaces (A1, A2) and provides a continuous conductive pathway from each conductive surface (A) to each other conductive surface (A) and to each conductive surface (A1, A2). A second foil element is bonded to the second conductive device surface(s) B and to the second conductive substrate surface B1 and provides a continuous conductive pathway from each device conductive surface (B) to the substrate conductive surface (B1).
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: October 29, 2013
    Assignee: Raytheon Company
    Inventor: Keith V. Guinn
  • Patent number: 8567050
    Abstract: A dual-personality extended USB (EUSB) system supports both USB and EUSB memory cards using an extended 9-pin EUSB socket. Each EUSB device 101 includes a PCBA having four standard USB metal contact pads disposed on an upper side of a PCB, and several extended purpose contact springs that extend through openings defined in the PCB. A single-shot molding process is used to form both an upper housing portion on the upper PCB surface that includes ribs extending between adjacent contact pads, and a lower molded housing portion that is formed over passive components and IC dies disposed on the lower PCB surface. The passive components are mounted using SMT methods, and the IC dies are mounted using COB methods. The extended 9-pin EUSB socket includes standard USB contacts and extended use contacts that communicate with the PCBA through the standard USB metal contacts and the contact springs.
    Type: Grant
    Filed: October 14, 2011
    Date of Patent: October 29, 2013
    Assignee: Super Talent Technology, Corp.
    Inventors: Siew S. Hiew, Abraham C. Ma, Nan Nan
  • Patent number: 8555482
    Abstract: A process of assembling a probe that includes providing a circuit board that is connectable to a sensor and is connected to a first electrical connector and sliding a housing that has a first end and a second end over the circuit board. The process includes sealingly connecting the first end of the housing and the first electrical connector with a water-tight seal and sealing the second end of the housing with a water-tight seal. Also disclosed is a probe made by the disclosed processes and a sonde including a probe made by the disclosed processes.
    Type: Grant
    Filed: May 5, 2010
    Date of Patent: October 15, 2013
    Assignee: YSI Incorporated
    Inventor: Ronald A. Metzger
  • Publication number: 20130263446
    Abstract: A fluxing-encapsulant material and method of use thereof in a thermal compression bonding (TCB) process is described. In an embodiment, the TCB process includes ramping the bond head to 250° C.-300° C. at a ramp rate of 50° C./second-100° C./second. In an embodiment, the fluxing-encapsulant material comprising one or more epoxy resins having an epoxy equivalent weight (EEW) of 150-1,000, a curing agent, and a fluxing agent having a mono-carboxylic acid or di-carboxylic acid and a pKa of 4-5.
    Type: Application
    Filed: September 30, 2011
    Publication date: October 10, 2013
    Applicant: Intel Corporation
    Inventors: Sivakumar Nagarajan, Sandeep Razdan, Nisha Ananthakrishnan, Craig J. Weinman, Kabirkumar J. Mirpuri
  • Publication number: 20130263445
    Abstract: The apparatus of the present application reduces poor soldering having gas loft there at when soldering. In a reflow soldering apparatus for soldering electronic components mounted on a board by heated atmospheric gas while transferring the printed circuit board with the electronic components within preheating chambers and reflow chambers. Reflow chamber in order within a furnace, a pressure reducing chamber capable of reducing a pressure of the atmospheric gas is installed in the reflow chamber where the heated atmospheric gas circulates in the chamber, and gas involved in a heated and melted soldering part on the printed circuit board is removed at the pressure reducing chamber.
    Type: Application
    Filed: December 16, 2011
    Publication date: October 10, 2013
    Applicant: YOKOTA TECHNICA
    Inventor: Yatsuharu Yokota
  • Publication number: 20130258623
    Abstract: A package structure having an embedded electronic element includes: a substrate having two opposite surfaces and a cavity penetrating the two opposite surfaces; at least a metal layer disposed on the sidewall of the cavity and extending to the surfaces of the substrate; an electronic element disposed in the cavity and having a plurality of electrode pads disposed on side surfaces thereof; and a solder material electrically connecting the electrode pads of the electronic element and the metal layer, thereby effectively alleviating the problems of alignment difficulty and high fabrication cost as encountered in the prior art.
    Type: Application
    Filed: March 29, 2012
    Publication date: October 3, 2013
    Applicant: UNIMICRON TECHNOLOGY CORPORATION
    Inventor: Zhao-Chong Zeng
  • Patent number: 8544168
    Abstract: It is an objective to provide a part-mounting method that, even when parts are extremely small, makes it possible to mount the parts at a repair-requiring location without fail, to thus enhance a percentage of a non-defective substrate. In a part-mounting method, inspection is made as to whether or not a parts-missing location exists on a substrate Pb reloaded between a solder printer 2 and a first part-mounting machine 4A after having undergone manual repair by an operator OP, or the like, in connection with a repair-requiring location found through inspection performed after mounting of parts Pt, by use of an inspection camera 15A of a first part-mounting machine 4A. When a parts-missing location on the substrate Pb is found, the parts-missing location is identified. Subsequently, a mounting head 14A of the first part-mounting machine 4A and a mounting head 14B of a second part-mounting machine 4B mount a part Pt at the parts-missing location on the thus-identified substrate Pb.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: October 1, 2013
    Assignee: Panasonic Corporation
    Inventors: Kenichi Kaida, Kenichiro Ishimoto
  • Patent number: 8533941
    Abstract: A method of bonding two structures together with an adhesive line of controlled thickness is provided. The method includes: applying an adhesive of controlled thickness to a first surface of a first structure; at least partially curing the adhesive; applying additional adhesive to the partially cured adhesive applied to the first surface or to a second surface of a second structure; holding the first structure and the second structure in alignment with the first surface and the second surface disposed in spaced, opposing relation; applying a force to the first structure and/or the second structure to squeeze the additional adhesive between the second surface and the partially cured adhesive applied to the first surface to reduce a thickness of the additional adhesive; and at least partially curing the additional adhesive to bond the first and second structures together.
    Type: Grant
    Filed: October 16, 2009
    Date of Patent: September 17, 2013
    Assignee: Epic Technologies, Inc.
    Inventors: Charles W. Eichelberger, James E. Kohl
  • Patent number: 8528196
    Abstract: A component mounting apparatus for mounting components on a plurality of mounting regions placed on an edge part of a substrate along a first direction that is a direction along the edge part of the substrate, comprises component placing units for holding components placed in component delivery positions that are spaced from the edge part of the substrate in a second direction orthogonal to the first direction, moving the held components in the second direction, and placing the components onto the mounting regions, component feeding units for sequentially feeding the components to component feeding positions spaced from the component delivery positions, and component carrying units for holding the components fed to the component feeding positions, moving the held components, and placing the components in the component delivery positions. Therefore, the components can be placed even onto a large substrate with satisfactory working efficiency.
    Type: Grant
    Filed: January 8, 2010
    Date of Patent: September 10, 2013
    Assignee: Panasonic Corporation
    Inventors: Kazuaki Kosaka, Akira Kabeshita, Nobuhiko Muraoka, Syozo Kadota
  • Patent number: 8528195
    Abstract: A layout method for electronic components of a double-sided surface mount circuit board is presented, which includes the following steps. At least one first electronic component is fixed on a first side surface of a circuit board through a reflow soldering process. At least one second electronic component is inserted on the first side surface of the circuit board. The other first electronic component is placed on a second side surface of the circuit board, and the other second electronic component is inserted on the second side surface of the circuit board. Finally, a reflow soldering process is performed on the circuit board disposed with the first electronic components and the second electronic components, thereby completing a layout process for the electronic components on the two side surfaces of the circuit board at the same time.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: September 10, 2013
    Assignee: Inventec Corporation
    Inventors: Chung-Yang Wu, Hung-Tao Wong
  • Patent number: 8522426
    Abstract: A vented BGA package is reconfigured by first applying a continuous bead of adhesive around the perimeter of the package to seal the gap between the lid and substrate. The continuous bead defines a channel through the pressure relief vents to a polarity through-hole in the lid. The BGA package is reflow soldered to a PWB at an elevated temperature using solder flux, clean or no-clean. The IC die achieves elevated temperature pressure relief through the pressure relief vents along the channel and out the polarity through-hole. After reflow a seal is applied to plug the polarity through-hole. The PWB is washed in an aqueous cleaner solution to remove flux residue. The continuous bead of adhesive and the seal form a cleaner solution barrier that prevents the solution from contacting conductors inside the package. The seal may be removed or left intact depending on the operating environment.
    Type: Grant
    Filed: June 5, 2010
    Date of Patent: September 3, 2013
    Assignee: Raytheon Company
    Inventors: Robert H. Dennis, Amanda Loehr, Robert E. Morris, Peter D. Patalano, Aaron J. Stein, John Stephens, Harold L. Wieck, Eli Holzman
  • Patent number: 8522425
    Abstract: A method for assembling an electronic device comprises inserting a thermal element into an electrical connector contained within a special volume defined by a constricted enclosure that comprises a housing of the electronic device. The spatial volume contains a printed circuit board and the electrical connector includes internal electrical contacts that are positioned proximate to solder connection pads on the printed circuit board when the electrical connector and the printed circuit board are contained within the constricted enclosure. Insertion of the thermal element heats the internal electrical contacts so that solder on the solder connection pads reflows to form solder connections respectively between the internal electrical contacts and the solder connection pads. Thereafter, the thermal element is removed from the electrical contact.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: September 3, 2013
    Assignee: Apple Inc.
    Inventor: Stephen Brian Lynch
  • Publication number: 20130220688
    Abstract: Provided is a mounting structure capable of maintaining highly accurate connection reliability even when the temperature of the environment in which the mounting structure is used is high. Mounting structure (10) includes electronic component (11), metal (12), wiring substrate (13), and a preventing structure. Electronic component (11) includes first electrode (14). The melting point of metal (12) is 130° C. or less. Wiring substrate (13) includes second electrode (15) electrically connected to first electrode (14) via metal (12). The preventing structure prevents flowing-out of metal (12) in a melted state from a region where first electrode (14) and second electrode (15) are formed. Further, preventing structure (14) is formed in at least one member selected from electronic component (11) and wiring substrate (12).
    Type: Application
    Filed: November 8, 2011
    Publication date: August 29, 2013
    Applicant: NEC Corporation
    Inventor: Masahiro Kubo
  • Patent number: 8516689
    Abstract: Provided are a multi-layer interconnection structure and a manufacturing method thereof. The multi-layer interconnection structure includes a substrate; a first wiring on the substrate; an interlayer insulation layer on the first wiring; a second wiring on the interlayer insulation layer; and a via contact including at least one conductive filament penetrating through the interlayer insulation layer between the second wiring and the first wiring to be electrically connected to the first wiring and the second wiring.
    Type: Grant
    Filed: January 7, 2010
    Date of Patent: August 27, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yong Suk Yang, In-Kyu You, Jae Bon Koo, Yong-Young Noh