Abstract: Disclosed herein are embodiments including electrical structures that includes a first cell, a first inductor, a first resistor, and a first shunted Josephson junction. The first inductor is connected in series with the first shunted Josephson junction at a first terminal end of the first inductor and a second terminal end of the first inductor is connected to a feed point of the first cell being powered. A first end of the first resistor having connected to ground and a second end being connected to the first shunted Josephson junction at a terminal of the first shunted Josephson junction that is not connected to the first inductor. A source of an electrical current source that is external to the first cell is connected to the first shunted junction and the first resistor at a common point.
Abstract: Embodiments described herein relate generally to methods for forming a conductive feature in a dielectric layer in semiconductor processing and structures formed thereby. In some embodiments, a structure includes a dielectric layer over a substrate, a surface modification layer, and a conductive feature. The dielectric layer has a sidewall. The surface modification layer is along the sidewall, and the surface modification layer includes phosphorous and carbon. The conductive feature is along the surface modification layer.
Abstract: A package component and forming method thereof are provided. The package component includes a substrate and a conductive layer. The substrate includes a first surface. The conductive layer is disposed over the first surface. The conductive layer includes a first conductive feature and a second conductive feature. The second conductive feature covers a portion of the first conductive feature. A resistance of the second conductive feature is lower than a resistance of the first conductive feature.
Type:
Grant
Filed:
April 25, 2022
Date of Patent:
March 5, 2024
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Inventors:
Chun-Wei Chang, Jian-Hong Lin, Shu-Yuan Ku, Wei-Cheng Liu, Yinlung Lu, Jun He
Abstract: A circuit board is mounted on a camera module with a shake correction function. The circuit board includes a first reference portion extending from a first side in a first direction to a second side in the first direction, a first coupled portion extending from the second side in the first direction to the first side in the first direction, a first direction first bent portion connected to each of an end portion on the second side in the first direction of the first reference portion and an end portion on the second side in the first direction of the first coupled portion, and a second direction extending first portion extending in a second direction orthogonal to the first direction from the first coupled portion.
Abstract: An EMI resistant electronics enclosure (200) is provided having a first compartment (206) and a second compartment (207), each defined by a body (205), being separated by a septum (208). A first aperture (209) in the septum (208) connects the first compartment (206) and the second compartment (207). A feed-through element (210) is provided having a first interface region (211) and a second interface region (212), wherein one or more primary conductors (217) extend between the first interface region (211) and the second interface region (212), and wherein the first interface region (211) resides in the first compartment (206), and the second interface region (212) resides in the second compartment (207). A conductive bar (232) circumscribes at least a portion of the feed-through element (210), and a conductive gasket (220) extends from the body (205) to the conductive bar (232), wherein a ground path is formed between the body (205) and the conductive bar (232) with the conductive gasket (220).
Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a chip structure including a substrate and a wiring structure over a first surface of the substrate. The method includes removing a first portion of the wiring structure adjacent to the hole to widen a second portion of the hole in the wiring structure. The second portion has a first width increasing in a first direction away from the substrate. The method includes forming a first seed layer over the wiring structure and in the hole. The method includes thinning the substrate from a second surface of the substrate until the first seed layer in the hole is exposed. The method includes forming a second seed layer over the second surface of the substrate and the first seed layer in the hole.
Abstract: A capacitor component includes a body including a capacitance formation portion including a plurality of unit devices including a first internal electrode, a first dielectric film surrounding the first internal electrode, and a second internal electrode surrounding the first dielectric film, and a molded portion surrounding the capacitance formation portion, first and second external electrodes respectively disposed on a first surface and a second surface of the body opposing each other in a first direction to be respectively connected to the first and second internal electrodes. Cross-sections perpendicular to the first direction of at least two of the plurality of unit devices have a polygonal shape.
Type:
Grant
Filed:
August 10, 2022
Date of Patent:
February 13, 2024
Assignee:
SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventors:
Sang Jong Lee, Han Kim, Min Cheol Park, Su Bong Jang
Abstract: An example system includes a first circuit board having first conductive traces, where a first conductive trace is for conducting an alternating current (AC) digital signal having an edge; a second circuit board having second conductive traces, where a second conductive trace is within a predefined distance of the first conductive trace to produce a contactless coupling with the first conductive trace, and where the contactless coupling enables electrical energy on the first conductive trace to manifest on the second conductive trace as a transient response that is based on the edge; and circuitry to reconstruct the edge based on the transient response from the second conductive trace.
Type:
Grant
Filed:
March 4, 2022
Date of Patent:
February 13, 2024
Assignee:
TERADYNE, INC.
Inventors:
Tushar K. Gohel, Thomas D. Jacobs, David H. Vandervalk, Jason L. Welch
Abstract: A curved electronic device and a method for manufacturing the same are disclosed. The curved electronic device includes a substrate, a component layer, and a modulation layer. The component layer is disposed on the substrate. The component layer is composed of a plurality of electronic components and their connecting wiring arranged on the substrate. The modulation layer is disposed on the component layer, and includes at least one pattern area and at least one blank area that are formed on the component layer. The blank area allows one part of the electronic components to be exposed out of the modulation layer. The modulation layer and the substrate have different heat absorption rates, so that the positions of the substrate corresponding to the blank area and the pattern area have different degrees of softening, so as to prevent the component layer from being damaged in the process of stretching the substrate.
Abstract: The present application provides a display panel and a display device. The display panel includes sub-pixels with multiple colors and upper polarizing units with various structures. The upper polarizing units with the various structures are disposed one-to-one correspondence with the sub-pixels with the multiple colors to increase transmittance of transmitted light of each color through the upper polarizing units corresponding to the sub-pixels whose color is the same as the color of the upper polarizing units.
Type:
Grant
Filed:
November 12, 2019
Date of Patent:
February 6, 2024
Assignee:
WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
Abstract: A surface acoustic wave device includes a piezoelectric substrate, an interdigital transducer (IDT) electrode on the substrate, a cover over the substrate and IDT electrode, and hollow spaces between the IDT electrode and the cover. The hollow spaces are defined by partition supports between the substrate and the cover. The partition supports include a first and second partition supports extending in a first direction without contacting each other. The first and second partition supports each include first and second ends along the first direction. The first and second direction perpendicular to the first direction. The first end of the first partition support is closer to an outer periphery of the substrate than is the second end, and the first end of the second partition support is farther away from the outer periphery than is the second end.
Abstract: A component carrier includes i) a first layer stack having a first electrically conductive layer structure and/or at least one first electrically insulating layer structure, ii) a component embedded in the first layer stack, iii) a second layer stack having at least one second electrically conductive layer structure and/or at least one second electrically insulating layer structure, and iv) a thermally conductive block embedded in the second layer stack. Hereby, the first layer stack and the second layer stack are connected with each other so that a thermal path from the embedded component via the thermally conductive block up to an exterior surface of the component carrier has a minimum thermal conductivity of at least 7 W/mK, in particular at least 40 W/mK. Further, a method of manufacturing the component carrier is described.
Type:
Grant
Filed:
April 22, 2021
Date of Patent:
January 2, 2024
Assignee:
AT&SAustria Technologie & Systemtechnik AG
Abstract: An implantable electrode arrangement provides spatially-selective detection of neuronal electrical signals, which propagate along at least one nerve fiber contained in a nerve fascicle, and for selective electrical stimulation of the at least one nerve fiber, comprising a biocompatible carrier substrate, which has at least one carrier substrate region that can be placed around the nerve fascicle in a cuff and has a straight cylinder-shaped carrier substrate surface which faces the nerve fascicle in the implanted state. The carrier substrate surface has an axial extension and an extension oriented circumferentially in a direction and a first electrode arrangement attached thereto.
Type:
Grant
Filed:
October 7, 2015
Date of Patent:
December 26, 2023
Assignee:
NEUROLOOP GMBH
Inventors:
Dennis Plachta, Mortimer Giehrtmuehlen, Thomas Stieglitz, Josef Zentner
Abstract: A spur measurement system uses a first device with a spur cancellation circuit that cancel spurs responsive to a frequency control word identifying a spurious tone of interest. A device under test generates a clock signal and supplies the clock signal to the first device through an optional divider. The spur cancellation circuit in the first device generates sine and cosine weights at the spurious tone of interest as part of the spur cancellation process. A first magnitude of the spurious tone in a phase-locked loop in the first device is determined according to the sine and cosine weights and a second magnitude of the spurious tone in the clock signal is determined by the first magnitude divided by gains associated with the first device.
Abstract: An electrochromic article includes a first substrate having a first surface and an opposite second surface and a second substrate having a third surface and an opposite fourth surface separated from the first substrate. The second surface of the first substrate faces the third surface of the second substrate and a first electrode is positioned over at least a portion of the second surface of the first substrate. A second electrode is positioned over at least a portion of the third surface of the second substrate. A sealant material is positioned between the first electrode and second electrode. An electrochromic composition is positioned in direct contact with at least a portion of the first electrode and at least a portion of the second electrode. The sealant material is formed from an organic polymer material having an oxygen transmission rate (OTR) of less than or equal to 2 cc/m2·day·atm.
Type:
Grant
Filed:
October 14, 2021
Date of Patent:
December 26, 2023
Assignee:
Vitro Flat Glass LLC
Inventors:
James W. McCamy, Ashtosh P. Ganjoo, Roxana Shabani
Abstract: A display apparatus according to an embodiment of the present invention includes a display unit having flexibility, at least one roller extending in a first direction to wind or unwind the display unit, a plurality of joints extending along an edge region of the display unit, and a housing in which the display unit, the roller, and the joints are accommodated and into/from which the display unit and the joints are inserted and withdrawn, wherein the display unit includes a display panel having flexibility and in which a display area displaying an image is changed as the display unit is wound around or unwound from the roller, a protective film disposed above the display panel, and a support panel disposed below the display panel.
Type:
Grant
Filed:
October 19, 2018
Date of Patent:
December 12, 2023
Assignee:
Samsung Display Co., Ltd.
Inventors:
Hayk Khachatryan, Hyunwoo Koo, Taewoong Kim, Jeongho Kim, Hyungsik Kim, Dongwon Choi, Jin Hwan Choi
Abstract: The present invention is to provide a touch sensor with a fingerprint sensor capable of making brightness uniform by removing a difference in brightness in a portion to which a touch sensor and the fingerprint sensor are applied, in which an output of a touch display device of uniform brightness may be obtained by applying dummy electrodes to a portion constituting the touch sensor to change a structure so that light transmittances of the fingerprint sensor and the touch sensor are the same as or similar to each other or controlling a portion at which the finger sensor is positioned in an entire region of a light emitting layer to be brighter than the rest portion by a control unit of touch display devices to which the fingerprint sensor according to various embodiments of the present invention is applied.
Type:
Grant
Filed:
January 13, 2021
Date of Patent:
December 5, 2023
Assignees:
SK Innovation Co., Ltd., Industry-Academic Cooperation Foundation, Yonsei University
Inventors:
Jun Hyung Kim, Sang Yoon Ji, Jang-Ung Park
Abstract: A disk device according to one embodiment includes a magnetic disk, a magnetic head, and a flexible printed circuit board. The flexible printed circuit board is electrically connected to the magnetic head. The flexible printed circuit board includes a first layer, a second layer having conductive property, and a third layer having insulation property. The first layer includes a first surface having insulation property. The second layer overlays the first surface, and includes a first conductor and a second conductor spaced from the first conductor. The third layer covers at least a part of the first surface and at least a part of the second layer. The flexible printed circuit board is provided with a first hole that is located between the first conductor and the second conductor with spacing from the second layer and penetrates the third layer.
Abstract: Provided is a cable device having an improved electromagnetic interference (EMI) shielding performance. The cable device includes: a cable including an optical fiber; a connector including a printed circuit board connected to the cable and including a ground electrode, and a conductive case; a connecting member provided around a connection between the cable and the connector; and a metal shell surrounding the cable inside of the connecting member, the metal shell being configured to shield electromagnetic interference of the cable and the connector.
Type:
Grant
Filed:
August 31, 2020
Date of Patent:
November 14, 2023
Assignee:
SAMSUNG ELECTRONICS CO., LTD.
Inventors:
Jinsub Kim, Yongjune Park, Sungook Ok, Sangwon Ha, Dongjin Park
Abstract: In some embodiments, an interconnect electrical connects a light emitter to wiring on a substrate. The interconnect may be deposited by 3D printing and lays flat on the light emitter and substrate. In some embodiments, the interconnect has a generally rectangular or oval cross-sectional profile and extends above the light emitter to a height of about 50 ?m or less, or about 35 ?m or less. This small height allows close spacing between an overlying optical structure and the light emitter, thereby providing high efficiency in the injection of light from the light emitter into the optical structure, such as a light pipe.
Abstract: A method for assembling a camera suitable for use for a vision system of a vehicle includes providing a circuit board having first and second sides separated by a thickness dimension of the circuit board. An imager is disposed at the first side of the circuit board and solder pads are disposed at the second side of the circuit board. The solder pads are in electrical connection with circuitry of the circuit board. A coaxial connector is aligned at the solder pads at the second side of the circuit board. The coaxial connector is soldered at the second side of the circuit board via melting the solder paste at the solder pads.
Abstract: Applying a solderable surface to conductive ink may include partially curing a conductive ink trace; applying, to the partially cured conductive ink trace, a conductive paste comprising conductive particles; and curing the partially cured conductive ink trace and the conductive paste.
Type:
Grant
Filed:
June 24, 2019
Date of Patent:
October 31, 2023
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Abstract: Methods for generating one or more atmospheric pressure plasma jets that can be used to deposit various types of conductive traces, coatings, and micro/nano-sized particles/structures on two or three dimensional body surfaces. The method includes generating atmospheric pressure plasma, nebulizing a precursor to generate an aerosol; receiving the aerosol from the nebulizer in a chamber; mixing the atmospheric pressure plasma with the aerosol from the chamber at a nozzle; and printing the plasma-exposed aerosol onto the surface of a substrate.
Type:
Grant
Filed:
March 29, 2021
Date of Patent:
October 31, 2023
Assignee:
United States of America as Administrator of NASA
Abstract: A method for producing vaporizer units as a component of inhalers includes the steps: a) providing a flexible circuit board material with sites for individual vaporizer units, the material optionally prestructured with conductor paths and/or pre-punched areas predetermined in terms of position/course for each site; b) providing and placing a heating element which may be electrically connected to the conductor paths; and c) at least partial covering each site with a sealing material for the formation of a partial sheathing for each vaporizer unit. The sealing material is applied such that the sheathing covers an edge region of the heating element while keeping open a heating surface on an upper side of the circuit board material. At least the outer surfaces of the sheathing pointing away from the circuit board material form sealing surfaces. Vaporizer units, vaporizer assemblies, vaporizer cartridges and inhalers with such vaporizer units are also provided.
Type:
Grant
Filed:
December 17, 2020
Date of Patent:
September 26, 2023
Assignee:
KÖRBER TECHNOLOGIES GMBH
Inventors:
Lasse Cornils, Christian Hanneken, Svenja Käthner, Michael Kleine Wächter, Niklas Romming, Christof Schuster, Arne Rosenbohm, Gunnar Niebuhr, Rene Schmidt, Finn-Oliver Pankoke, Dennis Leichsenring, Jan Jaklin, Max Bergmann
Abstract: A lighting apparatus is provided having one or more light emitting diodes arranged in a row. The light emitting diodes may be supported by an elongated body. The elongated body may comprise an optical element formed from an at least partially optically transmissive material. The lighting apparatus has two ends and may have electrical connectors at the ends.
Type:
Grant
Filed:
January 21, 2021
Date of Patent:
September 26, 2023
Assignee:
SATCO Products, Inc.
Inventors:
Thomas M. Katona, Steve Paolini, Robert Leonard, Randall Sosnick, Zach Berkowitz
Abstract: Systems and methods are provided for assembling an RFID device mounted to a fabric substrate via a “flip chip” approach. The system includes a pin thermode with a tip configured to penetrate the fabric substrate. The pin thermode may include or omit a heating element, with the tip being variously configured. The tip may have a variable cross-sectional area or include a plurality of projections that separately penetrate the fabric substrate, for example. If the pin thermode includes a heating element, a body of the pin thermode may be formed of a low thermal conductivity material to allow the temperature of the tip to increase without increasing the temperature of the body to the same degree. The body may define a lumen, with the tip and/or body defining an aperture for flowing a liquid out of the pin thermode and into the region surrounding the pin thermode.
Type:
Grant
Filed:
April 18, 2022
Date of Patent:
September 19, 2023
Assignee:
Avery Dennison Retail Information Services LLC
Abstract: A flexible circuit board includes a plurality of first wires that have a first connection area and a first insulating layer that covers the first wires such that the first connection area is exposed. A printed circuit board includes a plurality of second wires that have a second connection area, a second insulating layer that covers the second wires such that the second connection area is exposed, and a plurality of island conductors adjacent to the second wires across a gap. The second connection area is covered with an anisotropic conductive layer. Each of the second wires in the second connection area at least partially faces a corresponding one of the wires in the first connection area across the anisotropic conductive layer. The plurality of island conductors include an island conductor that is in contact with the anisotropic conductive layer and partially exposed from the anisotropic conductive layer.
Abstract: A drill string tool comprising a mud motor comprising a driveshaft assembly rotatably disposed within a driveshaft housing, the mud motor comprising sensors and an adjustable bend setting. A bearing mandrel in communication with a drill bit rotatably disposed within a bearing housing. The driveshaft assembly includes a drive shaft adapter having a rotating portion and a stationary portion. The rotating portion comprising a centrifugal brake assembly in communication with an electronics package. The electronics package rotates with the driveshaft assembly at an RPM relative to the driveshaft housing. The electronics package is in communication with the motor, the sensors, the adjustable bend setting, and a collection of wired drill pipe making up the drill string by means of connections and coils. The connections comprise coaxial cables comprising an outer conductor and annular dielectric segments mounted on a center conductor wire. The segments may comprise an embedded mesh structure.
Abstract: A wiring substrate device includes a wiring substrate, a plurality of terminals each of which is provided upright on the wiring substrate and has a lower end, an upper end and a narrowed part between the lower end and the upper end, and a plurality of solders each of which has a melting point lower than the terminals and covers a surface of the corresponding terminal.
Abstract: A display panel is provided. The display panel according to an embodiment includes a thin film transistor glass substrate, a plurality of micro light emitting diodes (LEDs) arranged on one surface of the thin film transistor glass substrate, and a plurality of side wirings formed at an edge of the thin film transistor glass substrate to electrically connect the one surface of the thin film transistor glass substrate to an opposite surface to the one surface.
Type:
Grant
Filed:
July 23, 2021
Date of Patent:
August 29, 2023
Assignee:
SAMSUNG ELECTRONICS CO., LTD.
Inventors:
Kyungwoon Jang, Wonsoon Park, Dongmyung Son, Sangmin Shin, Changjoon Lee, Youngki Jung, Seongphil Cho, Gyun Heo, Soonmin Hong
Abstract: Layouts for pads and conductive lines of memory devices are disclosed. A memory device may include memory cells and conductive lines arranged above memory cells. The conductive lines may extend from substantially a first side of the memory device to substantially a second side of the memory device. Each of the conductive lines may be electrically coupled to a bond pad, a first probe pad and a second probe pad. The bond pad may be positioned at or near the first side and be configured to receive power. The first probe pad may be positioned at or near the first side and be configured to be electrically coupled to a probe. The second probe pad may be positioned at or near the second side. Associated systems and methods are also disclosed.
Abstract: An apparatus which includes a first solid state drive (SSD) located on an SSD card having a fixed capacity and a first form factor. The apparatus can further include an adapter located on the SSD card to accommodate a second SSD. The second SSD has a second form factor that is different than the first form factor and is removeable from the SSD card. The apparatus can further include a controller located on the SSD card and configured to access the first SSD and the second SSD.
Abstract: A mask arrangement for masking a substrate in a processing chamber is provided. The mask arrangement includes a mask frame having one or more frame elements and is configured to support a mask device, wherein the mask device is connectable to the mask frame; and at least one actuator connectable to at least one frame element of the one or more frame elements, wherein the at least one actuator is configured to apply a force to the at least one frame element.
Type:
Grant
Filed:
June 26, 2019
Date of Patent:
August 8, 2023
Assignee:
Applied Materials, Inc.
Inventors:
Stefan Bangert, Tommaso Vercesi, Daniele Gislon, Oliver Heimel, Andreas Lopp, Dieter Haas
Abstract: A display device includes a plurality of sub-pixels defined by a plurality of gate lines and a plurality of data lines, a pixel electrode disposed in each of the sub-pixels in a first direction, a common electrode disposed in each of the sub-pixels in the first direction, and a sensing line disposed in each of the sub-pixels in the first direction, wherein the common electrode includes a first common electrode disposed at an outermost side in a second direction, the second direction is a direction perpendicular to the first direction, and the sensing line is disposed between the first common electrodes.
Type:
Grant
Filed:
May 4, 2022
Date of Patent:
July 4, 2023
Assignee:
LG DISPLAY CO., LTD.
Inventors:
Sangmin Lee, JungRok Lee, Dongwoo Kim, Jiae Yoon
Abstract: An electronic device according to various embodiments may include a housing, an antenna structure positioned in the housing, and a wireless communication circuit.
Abstract: An automatic tray loading system and a use method of the same are provided, which includes a stacked tray assembly, including at least one tray which is stacked up, where the at least one tray is provided with several locating slots; a tray lifting platform which includes a tray supporting table being connected with a elevating mechanism; a tray pick and place platform having a working region covers a tray input module, where the tray pick and place platform includes a manipulator which is connected with a multidimensional motion mechanism; and a delivery table including a tray placement plate, where each of the tray placement plate is provided with a groove which is configured to place the at least one layer of trays, and each of the tray placement plates is connected with a linear driving mechanism.
Type:
Grant
Filed:
August 18, 2021
Date of Patent:
April 18, 2023
Assignees:
Qingdao University of Technology, Ningbo Sanhan Alloy Material Co., Ltd.
Abstract: A touch pad includes a first conductive pattern layer, a second conductive pattern layer, a first trace, a second trace, a first bonding pad, and a second bonding pad. The first conductive pattern layer includes a first touch electrode extending in a first direction. The second conductive pattern layer includes a second touch electrode extending in a second direction. A first end of the first trace is coupled to the first touch electrode, and a second end of the first trace is coupled to the first bonding pad. A first end of the second trace is coupled to the second touch electrode, and a second end of the second trace is coupled to the second bonding pad. The first direction intersects the second direction.
Abstract: A component carrier includes a stack having a first electrically insulating layer structure and a first electrically conductive layer structure arranged on the first electrically insulating layer structure. The first electrically insulating layer structure has at least one first covered portion, which is covered by the first electrically conductive layer structure, and at least one first non-covered portion, which is not covered by the first electrically conductive layer structure. The first electrically insulating layer structure defines a recess at the at least one first non-covered portion.
Type:
Grant
Filed:
April 13, 2021
Date of Patent:
April 4, 2023
Assignee:
AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
Abstract: A capacitor unit formed by a capacitor integrated structure is provided. The capacitor integrated structure is cut to form capacitor units separated from each other, and each of the capacitor units includes: a substrate; an isolation layer located on the substrate; a capacitor stacked structure located on the isolation layer, wherein the isolation layer electrically isolates the substrate from the capacitor stacked structure; and two electrode connectors located on the capacitor stacked structure and being exposed.
Abstract: A method for preventing corona effects in an electronic circuit comprising applying a coating of a first material to a surface of the electronic circuit, and applying a second material having a dielectric constant that is lower than that of the first material on an exposed surface of the first material, wherein the second material comprises a solid dielectric.
Abstract: In one aspect, an apparatus for stimulating and/or monitoring a nerve is described herein. In some embodiments, the apparatus comprises a top substrate layer, a bottom substrate layer in facing opposition to the top substrate layer, and a channel disposed between the top substrate layer and the bottom substrate layer. The apparatus further comprises a plurality of electrodes disposed on one or more interior surfaces of the channel. Additionally, the channel is defined by the top substrate layer, the bottom substrate layer, and a retaining wall extending at least partially between the top substrate layer and the bottom substrate layer. The retaining wall retains the nerve within the channel.
Type:
Grant
Filed:
March 9, 2017
Date of Patent:
February 14, 2023
Assignee:
Board of Regents, The University of Texas System
Inventors:
Muthu B. J. Wijesundara, Ryan Andrew Landrith, Caleb P. Nothnagle, Young-tae Kim
Abstract: An actuator includes a base electrode, a counter electrode facing the base electrode, a first terminal connected to the base electrode, and a second terminal connected to the counter electrode. The base electrode includes a non-metal base material, a conductive thin film disposed on a side of the non-metal base material, the side facing the counter electrode, and an insulation layer disposed on the conductive thin film. The first terminal is connected to the conductive thin film. The counter electrode includes a flexible conductor that is deformable via a Coulomb force acting between the base electrode and the counter electrode upon application of a voltage to the first terminal and the second terminal.
Abstract: A method for contacting and rewiring an electronic component embedded in a PCB in the following manner is disclosed. A first permanent resist layer is applied to one contact side of the PCB. The first permanent resist layer is structured to produce exposures in the area of contacts of the electronic component. A second permanent resist layer is applied onto the structured first permanent resist layer. The second permanent resist layer is structured to expose the exposures in the area of the contacts and to produce exposures in line with the desired conductor tracks. The exposures are chemically coated with copper the copper is electric-plated to the exposures. Excess copper in the areas between the exposures is removed.
Type:
Grant
Filed:
April 6, 2020
Date of Patent:
January 31, 2023
Assignee:
AT&S Austria Technologie & Systemtechnik
Inventors:
Wolfgang Schrittwieser, Mike Morianz, Alexander Kasper, Erich Preiner, Thomas Krivec
Abstract: The method comprises receiving a representation of a visual symbol, wherein the visual symbol comprises a code string identifying the garment that is encoded into the visual symbol (101). The method comprises establishing, based on the representation of the visual symbol, the identity of the garment (102). The method comprises transmitting, to the identified garment, an authorisation code to activate a sensor of the garment to record activity data (103).
Abstract: A flexible circuit board includes a plurality of first wires that have a first connection area and a first insulating layer that covers the first wires such that the first connection area is exposed. A printed circuit board includes a plurality of second wires that have a second connection area, a second insulating layer that covers the second wires such that the second connection area is exposed, and a plurality of island conductors adjacent to the second wires across a gap. The second connection area is covered with an anisotropic conductive layer. Each of the second wires in the second connection area at least partially faces a corresponding one of the first wires in the first connection area across the anisotropic conductive layer. The plurality of island conductors include an island conductor that is in contact with the anisotropic conductive layer and partially exposed from the anisotropic conductive layer.
Abstract: A phased array antenna comprising: a substrate; a plurality of circular polarized wideband antenna elements disposed on the substrate, wherein each element comprises two orthogonal feeds; wherein the plurality of elements are organized into subarrays and physically oriented such that constituent elements of each subarray are sequentially rotated with respect to each other about respective axes that are perpendicular to a surface of the substrate so as to allow RHCP and LHCP transmission and reception; a phase shifter communicatively coupled to the feeds of all the elements and configured to electronically any dynamically compensate for phase regression or progression introduced by the sequential rotation of the elements without relying on physical transmission lines of different dimensions, and further configured to introduce a progressive phase shift across a beam steering plane to enable beam steering of the phased array antenna.
Type:
Grant
Filed:
March 19, 2021
Date of Patent:
December 27, 2022
Assignee:
United States of America as represented by the Secretary of the Navy
Inventors:
Jia-Chi Samuel Chieh, Everly Yeo, Randall B. Olsen, Raif Farkouh, Maxwell M. Kerber
Abstract: A method for manufacturing an antenna for a wireless power transfer system includes providing a first sheet of a conductive metal, the first sheet defining a first area for a coil of the antenna. The method includes applying an etch resistant coating on a coil area within the first area and laser cutting the first sheet within the coil area, based on a laser cutting path defining a first geometry for a first plurality of turns for a first layer of the coil, the first geometry configured for one or more of transmission of wireless power signals, receipt of wireless power signals, and combinations thereof. The method further includes substantially exposing the first sheet to an etching solution, the etching solution substantially removing first portions of the conductive metal from the substrate to define, at least, first turn gaps between at least two of the first plurality of turns.
Abstract: A radio-frequency (RF) to direct current (DC) converter is provided. When a DC electrical current is applied via a DC input port of the converter, the DC electrical current is shunted to ground through a Josephson junction (JJ) of the converter and substantially no DC electrical current flows through a resistor of the converter, and when an RF electrical current is applied via an RF input port of the converter, output trains of SFQ current pulses from a DC to SFQ converter of the RF-to-DC converter with pulse-to-pulse spacing inversely proportional to the RF electrical current frequency cause the JJ to switch at a rate commensurate with an RF frequency of the RF electrical current to generate a steady state voltage across the JJ linearly dependent on the RF frequency.
Type:
Grant
Filed:
August 27, 2020
Date of Patent:
December 27, 2022
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Abstract: A resonator device includes a base, a resonator element attached to the base, a cover accommodating the resonator element between the base and the cover, and a conductive bonding member positioned between the base and the cover and bonding the base to the cover. The base includes a resonator element mount surface on which the resonator element is attached, a first interconnect and a second interconnect that are arranged on the resonator element mount surface and that are electrically coupled to the resonator element, a bonding surface bonded to the cover through the bonding member, and a step between the resonator element mount surface and the bonding surface.
Abstract: An ultrasonic fingerprint recognition sensor and a manufacturing method thereof, and a display device are disclosed. The ultrasonic fingerprint recognition sensor includes a resonant cavity, a receiver electrode, a drive electrode, and a piezoelectric thin film layer between the receiver electrode and the drive electrode, the resonant cavity is on a side, closer to the piezoelectric thin film layer, of the receiver electrode, and is configured to increase vibration amplitude of the piezoelectric thin film layer.
Type:
Grant
Filed:
May 26, 2020
Date of Patent:
December 6, 2022
Assignee:
Beijing BOE Technology Development Co., Ltd.
Inventors:
Yingming Liu, Haisheng Wang, Xiaoliang Ding, Lei Wang, Pengpeng Wang