Parallel Connected Patents (Class 323/272)
  • Patent number: 9812961
    Abstract: A DC conversion device including a first DC converter and a second DC converter connected in series, a voltage difference adjusting unit, and a first and a second control unit is provided. The first and the second DC converter respectively receive a first and a second input current to generate a first output current and a first output voltage, a second output current and a second output voltage at a first and a second output end connected to a first and a second energy-storing element, respectively. The voltage difference adjusting unit generates a voltage difference adjusting signal. The first control unit generates a first control signal to control the first converter. The second control unit generates a second control signal according to the voltage difference adjusting signal to control the second converter to balance the first and the second input and output voltages.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: November 7, 2017
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Guo-Qiao Shen, Yu-Ming Chang, Jin-Fa Zhang, Guo-Jin Xu
  • Patent number: 9793799
    Abstract: A state machine for a multi-phase voltage converter controls cycle-by-cycle switching of the phases by: entering a first state in which a control signal for the high-side switch is activate and control signals for the low-side and SR (synchronous rectification) switches are deactivate; entering a second state in which the control signals for all switches are deactivate; entering a third state in which the control signal for the high-side switch is deactivate and the control signals for the low-side and SR switches are activate; entering a fourth state in which the control signals for the high-side and low-side switches are deactivate and the control signal for the SR switch is activate and then entering a fifth state in which the control signals for all switches are deactivate, or entering the fifth state without entering the fourth state; and entering the first state at the beginning of the next switching cycle.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: October 17, 2017
    Assignee: Infineon Technologies Austria AG
    Inventors: Amir Babazadeh, Benjamim Tang
  • Patent number: 9785166
    Abstract: On embodiment pertains to a method including determining if an amplitude of an error signal has entered steady state. If the amplitude of the error signal has not entered steady state, then amplify with a high gain the amplitude of the AC component of the error signal. If the amplitude of the error signal has entered steady state, then initiate a timer. Determining if the amplitude of the error signal has remained in steady state while the timer runs. If the amplitude of the error signal has remained in steady state while the timer runs, then amplify with a low gain the amplitude of the AC component of the error signal.
    Type: Grant
    Filed: April 20, 2016
    Date of Patent: October 10, 2017
    Assignee: INTERSIL AMERICAS LLC
    Inventor: David L. Beck
  • Patent number: 9787188
    Abstract: An on-package voltage regulation system includes a platform controller hub (PCH), a driver metal-oxide-semiconductor field-effect transistor (DRMOS) control unit, and a plurality of inductors coupled to an output node. The PCH receives a voltage feedback signal corresponding to an output voltage at the output node, and outputs a control signal based on a difference between the voltage feedback signal and a reference voltage. The DRMOS control unit includes a plurality of switch transistors and a DRMOS controller. The switch transistors are coupled to the output node through the plurality of inductors. The DRMOS controller includes logic to determine an output current based on the control signal from the PCH, and to determine a distribution of the output current through the plurality of inductors. Transistor drivers control the switch transistors to share the output current through the plurality of inductors based on the determined output current and distribution.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: October 10, 2017
    Assignee: INTEL CORPORATION
    Inventors: Alexander Uan-Zo-Li, Don Nguyen
  • Patent number: 9774258
    Abstract: Systems and methods for zero-current crossing detection circuits. In some embodiments, a circuit may include a buck converter comprising a high-side switch, a low-side switch, and an inductor; a zero-current crossing detection circuit comprising a reference switch coupled to a current source, where the reference switch is controllable conjointly with the low-side switch; an amplifier coupled to: (a) a first node between the current source and reference switch, where in operation the first node has a positive voltage value during an interval of interest, and a (b) second node between the low-side switch and the inductor, where in operation the second node has a negative voltage value during the interval of interest; and a comparator coupled to the amplifier, the comparator configured to output a flag in response to a detection that a decreasing current through the inductor has reached a predetermined value.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: September 26, 2017
    Assignee: NXP USA, Inc.
    Inventor: Marcelo de Paula Campos
  • Patent number: 9760101
    Abstract: In the related art, there is a problem that the condition of a load is monitored in an indirect manner so that an efficiency enhancing effect is not obtained. A switching regulator control circuit includes an oscillator for generating a carrier signal and a transistor drive circuit for driving a switching transistor and a synchronous rectification transistor based on a PWM signal generated based on the carrier signal. The oscillator switches the frequency of the carrier signal based on the direction of a source-drain voltage of the synchronous rectification transistor.
    Type: Grant
    Filed: June 17, 2013
    Date of Patent: September 12, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Hirofumi Fujiwara, Hirokazu Kawagoshi, Yasuhiro Kosaka
  • Patent number: 9755517
    Abstract: A control circuit included within a multi-phase switched-mode converter is configured for adjusting operational signals for adding power stages of the multi-phase switched-mode converter to dynamically respond to transient changes in load current for minimizing undershoot while avoiding overshoot of an output voltage of the multi-phase switched-mode converter. The control circuit has panic comparators configured such that each panic comparator has an input terminal connected to receive the output voltage for comparison with one of a plurality of reference voltages. A panic controller receives panic indicator signals from the panic comparators and determines which of the power stages are to be activated to match the transient change to the load current to prevent for minimizing undershoot and for preventing overshoot of the output voltage of the multi-phase switched-mode converter. The multi-phase switched-mode converter may operate in a continuous or discontinuous conduction mode.
    Type: Grant
    Filed: December 16, 2015
    Date of Patent: September 5, 2017
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Hidenori Kobayashi, Hyungtaek Chang
  • Patent number: 9748843
    Abstract: An inductor current-sensing circuit for measuring a current in an inductor includes (a) a first RC network coupled between a first terminal of the inductor and a reference voltage source; and (b) a second RC network coupled between a second terminal of the inductor and the reference voltage source. The first RC network and the second RC network each have a time constant substantially equal to the ratio between the inductance and the DC resistance of the inductor. The inductor which current is being measured may be a primary inductor of a four-switch buck boost converter receiving an input voltage and providing an output voltage.
    Type: Grant
    Filed: April 2, 2015
    Date of Patent: August 29, 2017
    Assignee: Linear Technology Corporation
    Inventors: Xu Zhang, Jian Li, Zhouyuan Shi, Yi Ding Gu
  • Patent number: 9742279
    Abstract: An interleaved buck converter performs buck conversion by controlling operation of each of two switches thereof between an ON state and an OFF state. The switches have the same switching period and the same ON time interval, and a time delay from switching of one of the switches into the ON state to switching of the other one of the switches into the ON state equals the ON time interval of the switches minus a predetermined time interval.
    Type: Grant
    Filed: January 22, 2016
    Date of Patent: August 22, 2017
    Assignee: Lite-On Technology Corp.
    Inventors: Jing-Yuan Lin, Tse-Wei Chao, Yao-Ching Hsieh, Huang-Jen Chiu, Yu-Kang Lo, Po-Jung Tseng
  • Patent number: 9735574
    Abstract: The present disclosure includes switching regulator circuits and methods. In one embodiment, a first switching regulator stage receives a first input voltage and produces a first voltage on a first node. A second switching regulator stage receives the first input voltage and produces a second voltage on a second node. A capacitor includes a first terminal coupled to the first node and a second terminal coupled to the second node, and the first switching regulator stage and the second switching regulator stage are configured to set a first voltage on the first node and to set a second voltage on the second node.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: August 15, 2017
    Assignee: Gazelle Semiconductor, Inc.
    Inventors: David Christian Gerard Tournatory, Kevin Kennedy Johnstone
  • Patent number: 9734917
    Abstract: A current balance circuit for a power management device having a first current channel and a second current channel, having: a first current sense circuit configured to detect a current flowing through the first current channel, and to provide a first current sense signal indicative of the current flowing through the first current channel; wherein the current balance circuit draws current from the second current channel to the first current channel based on the first current sense signal.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: August 15, 2017
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Xingwei Wang, Junyong Gong, Brent Hughes
  • Patent number: 9720429
    Abstract: In an embodiment, a coupled-inductor structure includes first and second windings. The first winding is configured to conduct a phase current, has a first node configured for coupling to a phase node of a power supply, and has a second node configured for coupling to an output node of the power supply and to a first node of a sense impedance that is configured to generate a sense signal representative of the phase current. And the second winding is configured for magnetic coupling with the first winding, has a first node coupled to the first node of the first winding, and has a second node configured for coupling to a second node of the sense impedance. For example, the first winding may be a phase inductor of a switching power supply, and the impedance may be a capacitor that generates a sense voltage representative of the phase current.
    Type: Grant
    Filed: February 20, 2015
    Date of Patent: August 1, 2017
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Shuai Jiang, Jian Yin
  • Patent number: 9720021
    Abstract: A method and apparatus use a programmable logic circuit to receive data representing environmental conditions such as irradiance, temperature, wind, snow, elevation, and the like, in a given location, to provide an input signal to a simulated variable power source which produces an output that approximates the output of a variable power source such as a photovoltaic panel that is subject to such environmental conditions. Power from the simulated variable power source is separately directed to each of a number of power converters and the efficiency of each power converter is tested to determine the optimum power converter for use with the variable power source in the given location.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: August 1, 2017
    Assignee: INVENTUS HOLDINGS, LLC
    Inventors: Daniel E. Waugh, Christopher D. Wright
  • Patent number: 9710004
    Abstract: Embodiments of the invention relate generally to power management and the like, and more particularly, to an apparatus, a system, a method, and a computer-readable medium for providing power controlling functionality to generate configurable power signals and to deliver power during fault conditions. In at least some embodiments, a power control unit can generate power signals having configurable attributes as a function of a mode of operation, a fault type, and the like.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: July 18, 2017
    Assignee: Global Embedded Technologies, Inc.
    Inventors: Mark Stanley Stanczak, Louis Stephen Smutek, Alan Wayne Brown, David Allen Backus
  • Patent number: 9684320
    Abstract: A DC/DC converter includes n converters connected in parallel to each other and configured to adjust a level of an input voltage according to a duty ratio of a first pulse signal applied to a first switch device to output an output voltage, wherein the n is an integer of 2 or more; and a control unit configured to compare an average of n sensing currents with the n sensing currents sensed from the converters, respectively, to adjust the duty ratio of the first pulse signal.
    Type: Grant
    Filed: April 14, 2015
    Date of Patent: June 20, 2017
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Bum Su Shin, Jae Sam Lee
  • Patent number: 9680370
    Abstract: A power converting system and method of controlling the same disclosed. In one aspect, the power converting system includes first and second power converters electrically connected to each other, a current controller configured to determine first and second efficiencies of the power converting system, modify an amount of a first current configured to flow into the first power converter and an amount of a second current configured to flow into the second power converter in one of a first mode and a second mode, compare the first efficiency to the second efficiency, and determine the first mode or the second mode as a current adjustment mode based at least in part on the comparison result. The power converting system also includes a current distributor configured to distribute the amounts of the first and second currents based at least in part on the determined current adjustment mode.
    Type: Grant
    Filed: May 14, 2015
    Date of Patent: June 13, 2017
    Assignees: Samsung SDI Co., Ltd., University Industry Liaison Office of CNU
    Inventors: Sangtaek Han, Jungpil Park, Sungjun Park
  • Patent number: 9665147
    Abstract: In some implementations, a computing device may include a plurality of voltage regulators including a first voltage regulator and a second voltage regulator, and a multi-phase oscillator, connected to the first voltage regulator and the second voltage regulator, configured to synchronize the first voltage regulator and the second voltage regulator.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: May 30, 2017
    Assignee: GOOGLE INC.
    Inventors: Srikanth Lakshmikanthan, Christopher Lyon
  • Patent number: 9655180
    Abstract: A load control device for an electrical load may operate in a normal mode and a burst mode to adjust the amount of power delivered to the electrical load. The load control device may comprise a control circuit that operates in the normal mode to regulate an average magnitude of a load current conducted through the load between a maximum rated current and a minimum rated current. During the normal mode, the control circuit may control the operating period of a load regulation circuit between a high-end operating period and a low-end operating period. The control circuit may operate in the burst mode to regulate the average magnitude of the load current below the minimum rated current. During the burst mode, the control circuit may adjust the low-end operating period to be less than or equal to a minimum on time of the load regulation circuit.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: May 16, 2017
    Assignee: LUTRON ELECTRONICS CO., INC.
    Inventors: Robert D. Stevens, Jr., Matthew R. Zartman
  • Patent number: 9647556
    Abstract: In a controller for a DC to DC converter, PWM signal generating circuitry generates a set of PWM signals phase-shifted relative to one another, and controls states of the PWM signals according to a set of control signals. Each PWM signal of the PWM signals has an on-time state and an off-time state. Ramp signal generating circuitry, coupled to the PWM signal generating circuitry, generates a set of ramp signals having substantially the same ramp slope. Each ramp signal of the ramp signals is generated in response to detecting an on-time state of a corresponding PWM signal of the PWM signals. Additionally, a comparing circuit, coupled to the PWM and ramp signal generating circuitry, alternately compares the ramp signals with a preset reference to generate the control signals. A corresponding control signal of the control signals changes the corresponding PWM signal from the on-time state to an off-time state.
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: May 9, 2017
    Assignee: O2Micro, Inc.
    Inventors: Gang Li, Fengjiang Zhang, Guoyong Guo
  • Patent number: 9634568
    Abstract: The invention provides a control device for regulating and balancing currents, for DC/DC converters, between first and second voltage sources, the device comprising: n converters (C1, C2, . . . Cn) that are connected in parallel to the first voltage source (11); n inductors (L1, L2, . . . Ln) that have their outlets connected to the second voltage source (R) via n connections; n current sensors (22) that are arranged on respective ones of the connections; and a single regulator system that has its inputs connected to respective ones of the n current sensors (22), and its output connected to the n converters (C1, C2, . . . Cn).
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: April 25, 2017
    Assignee: ALSTOM TECHNOLOGY LTD
    Inventors: Guillermo Garcia Soto, Olivier Tarrade
  • Patent number: 9627988
    Abstract: A resonant converter includes a primary-side winding electrically coupled to an input voltage, a secondary-side winding electrically coupled to a load, first and second switches coupled to one end of the primary-side winding, and a switch control circuit configured to differently control switching frequency limit ratios of the first and second switches by differently limiting a frequency variation ratio of a first clock signal that determines switching frequencies of the first and second switches according to variation of one of the input voltage and the load.
    Type: Grant
    Filed: February 5, 2015
    Date of Patent: April 18, 2017
    Assignee: Fairchild Korea Semiconductor LTD.
    Inventors: Won-Tae Lee, Hyeong Seok Baek, Ji-Hoon Jang, Hang-Seok Choi
  • Patent number: 9614591
    Abstract: Embodiments of the present disclosure can be used to produce smaller, more compact antenna drivers at a reduced cost. Systems and methods for integrating components of an antenna driver with components of a shunt regulator and clamp are provided. By combining these components according to embodiments of the present disclosure, transistor count in an antenna driver can be reduced. This integrated device advantageously allows antenna driver functionality, regulator functionality, and clamp control functionality to be provided at a reduced manufacturing cost and with reduced real estate.
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: April 4, 2017
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventor: Alastair Lefley
  • Patent number: 9606559
    Abstract: A multi-phase switched-mode converter has a control circuit configured to receive a shed threshold signal indicating that the total output current has fallen below a total current threshold level. The control circuit further includes slave phase shedding switches that have a common switching pole connected to a current share amplifier of each slave power stage, a first select pole is connected to a phase target current level, and a second select pole is connected to a phase zero target current level. A control terminal is connects the phase zero target current signal to each slave power stage to decreases their output currents to approximately a zero level. When the output current approaches the zero level, the slave power stages are deactivated. A panic circuit activates the slave power stages when the load current increases precipitously.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: March 28, 2017
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Seiichi Ozawa
  • Patent number: 9601984
    Abstract: A power converter includes a backup power source Eb provided separately from a power source Es and designed to supply power during a discharge period, and a discharging driver Mb that turns on/off an upper-arm (one) switching element in series-connected switching elements Qu and Qd based on a drive signal that has at least one of a voltage and a frequency, and drives a lower-arm (the other) switching element Qd such that it is always on, the at least one of the voltage and the frequency of the drive signal being within a predetermined range lower than a drive signal outputted from a normal driver Mu, Md.
    Type: Grant
    Filed: May 12, 2011
    Date of Patent: March 21, 2017
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Yoshiyuki Hamanaka, Tsuneo Maebara, Koichi Sakata
  • Patent number: 9601999
    Abstract: Techniques for optimizing the trade-off between minimizing switching losses and minimizing conduction losses in a buck converter. In an aspect, each of a high-side switch and a low-side switch may be implemented as a plurality of parallel-coupled transistors, each transistor having an independently controllable gate voltage, allowing adjustment of the effective transistor size. In response to the target voltage of the buck converter corresponding to a relatively high voltage range, more high-side switch transistors and fewer low-side switch transistors may be selected. Similarly, in response to the target voltage corresponding to a relatively low voltage range, more low-side switch transistors and fewer high-side switch transistors may be selected. In an aspect, the techniques may be applied during a pulse-frequency modulation mode.
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: March 21, 2017
    Assignee: QUALCOMM Incorporated
    Inventor: Joseph D Rutkowski
  • Patent number: 9602005
    Abstract: An embodiment of a power supply includes an output node, inductively coupled phase paths, and a sensor circuit. The output node is configured to provide a regulated output signal, and the inductively coupled phase paths are each configured to provide a respective phase current to the output node. And the sensor circuit is configured to generate a sense signal that represents the phase current flowing through one of the phase paths. For example, because the phase paths are inductively coupled to one another, the sensor circuit takes into account the portions of the phase currents induced by the inductive couplings to generate a sense signal that more accurately represents the phase current through a single phase path as compared to conventional sensor circuits.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: March 21, 2017
    Assignee: Intersil Americas LLC
    Inventors: Shangyang Xiao, Weihong Qiu, Jun Liu
  • Patent number: 9595870
    Abstract: A power system comprising a non-isolated voltage regulator configured to couple to an input voltage and produce an output voltage, wherein the non-isolated voltage regulator is in a power distribution system and configured to boost the input voltage when the input voltage is less than a minimum output voltage, to reduce the input voltage when the input voltage is greater than a maximum output voltage, and to pass-through the input voltage when the input voltage is greater than or equal to the minimum output voltage and less than or equal to the maximum output voltage.
    Type: Grant
    Filed: January 8, 2014
    Date of Patent: March 14, 2017
    Assignee: Futurewei Technologies, Inc.
    Inventors: Hengchun Mao, Dianbo Fu, Bing Cai
  • Patent number: 9591704
    Abstract: Various embodiments may relate to a lighting system including a Power Supply Unit and at least one Light Engine Module, with an interface between the Light Engine Modules and the Power Supply Unit. The Light Engine Modules send pulses representing their current demand to the Power Supply Unit adjusting the output current accordingly. The Light Engine Modules are connected in parallel, and the pulse sequences are sent at the same time. Measures are taken to cope with interfered pulses.
    Type: Grant
    Filed: June 25, 2012
    Date of Patent: March 7, 2017
    Assignee: OSRAM GMBH
    Inventors: Richard Dilger, Reinhard Lecheler
  • Patent number: 9584015
    Abstract: A controller (500) for determining a distribution of switching phases among switching elements of a power supply system The power supply system has a plurality of voltage converters, each comprising a switching element and being arranged to convert an input voltage supplied to the voltage converters to a respective output voltage by switching the switching element at a predetermined frequency. The controller (500) comprises a receiver (510) for receiving one or more signals indicative of a respective contribution from each of the voltage converters to a ripple current component of an input current of the voltage converters, and a rank determining module (520) configured to rank the voltage converters in order of decreasing contribution to the ripple current.
    Type: Grant
    Filed: November 27, 2013
    Date of Patent: February 28, 2017
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Andreas Larsson, Torbjörn Holmberg, Magnus Mellteg
  • Patent number: 9584116
    Abstract: Aspects of the disclosure provide a power circuit that includes a first switch circuit in parallel with a second switch circuit. The first switch circuit and the second switch circuit are coupled to a first driving node, a second driving node, a source node and a drain node via interconnections. The power circuit receives a control signal between the first driving node and the second driving node to control a current flowing from the drain node to the source node through the first switch circuit and the second switch circuit. In the power circuit, a first interconnection and a second interconnection of the interconnections are inductively coupled to balance the current flowing through the first switch circuit and the second switch circuit.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: February 28, 2017
    Assignees: Toyota Motor Engineering & Manufacturing North America, Inc., Virginia Tech Intellectual Properties, Inc.
    Inventors: Yincan Mao, Chi-Ming Wang, Zichen Miao, Khai Ngo
  • Patent number: 9577533
    Abstract: In one embodiment, a control circuit configured for an interleaved switching power supply having first and second voltage conversion circuits, can include: a feedback compensation signal generation circuit that generates a feedback compensation signal; a first power switch control circuit that activates a first on signal when a first voltage signal that represents an inductor current of the first voltage conversion circuit is less than the feedback compensation signal, a first power switch of the first voltage conversion circuit being turned on based on the first on signal, and turned off after a predetermined time; and a second power switch control circuit that activates a second on signal after half of a switching period from a rising edge of the first on signal, and a second power switch control signal to turn on a second power switch of the second voltage conversion circuit based on the second on signal.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: February 21, 2017
    Assignee: Silergy Semiconductor Technology (Hangzhou) LTD
    Inventors: Feng Yu, Chen Zhao
  • Patent number: 9577532
    Abstract: A switching regulator circuit can include multiple switching regulator stages coupled to an output. A first switching regulator stage may be operated at a different frequency than a second switching regulator stage. In some cases, one switching regulator stage is operated at a different duty cycle. The switching regulator circuit may also include multiple switching regulator stages that cancel ripple at an output node.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: February 21, 2017
    Assignee: Gazelle Semiconductor, Inc.
    Inventors: David Christian Gerard Tournatory, Nicolas Stephane Monier
  • Patent number: 9559591
    Abstract: A multi-phase interleaved converter can include: (i) a plurality of phases, where each phase of the multi-phase interleaved converter includes a buck-type power stage having a power switch, a freewheeling switch and an inductor, a switching control circuit and a reference signal generator, and where each switching control circuit includes: (ii) an adder that receives a ramp signal and a feedback signal that represents an output voltage, and generates a feedback voltage signal; (iii) a comparator that receives the feedback voltage signal and a reference voltage signal, and generates a comparator output signal; and (iv) a logic circuit that receives the comparator output signal and an output from an on time control circuit, and controls a switching operation of the power switch.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: January 31, 2017
    Assignee: Silergy Semiconductor Technology (Hangzhou) LTD
    Inventors: Kailang Hang, Liangwei Sun
  • Patent number: 9559583
    Abstract: A power converter includes a wave generator, a low pass filter, a first control circuit, and a second control circuit. The wave generator receives an input voltage, and converts the input signal into a wave signal according to a first control signal and a second control signal. The low pass filter filters the wave signal to generate an output voltage. The first control circuit generates the first control signal according to the wave signal and the output voltage. The second control circuit generates the second control signal according to the wave signal and the output voltage.
    Type: Grant
    Filed: January 13, 2014
    Date of Patent: January 31, 2017
    Assignee: MEDIATEK INC.
    Inventors: Hung-chih Lin, Hung-I Wang, Hao-Ping Hong, Chien-Wei Kuan, Yung-Chih Yen
  • Patent number: 9541950
    Abstract: The present disclosure relates to a display technique and provides a multi-screen display apparatus comprising a plurality of display screens, wherein small signal earth wires of the plurality of display screens are connected with each other, large signal earth wires of the plurality of display screens are connected with each other, the small signal earth wires cause small signal grounds of the respective display screens to be connected with each other, and the large signal earth wires cause large signal grounds of the respective display screens to be connected with each other. The plurality of display screens share one power supply, and common-mode choke coils are disposed at signal input terminals of signal boards of the plurality of display screens. The present disclosure further provides a method for eliminating signal interferences in multi screens based on the multi-screen display apparatus.
    Type: Grant
    Filed: December 14, 2013
    Date of Patent: January 10, 2017
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE VISION-ELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Weijun Huang, Daliang Shen
  • Patent number: 9537393
    Abstract: A controller (500) for determining a distribution of switching phases among switching elements of a power supply system The power supply system has a plurality of voltage converters, each comprising a switching element and being arranged to convert an input voltage supplied to the voltage converters to a respective output voltage by switching the switching element at a predetermined frequency. The controller (500) comprises a receiver (510) for receiving one or more signals indicative of a respective contribution from each of the voltage converters to a ripple current component of an input current of the voltage converters, and a rank determining module (520) configured to rank the voltage converters in order of decreasing contribution to the ripple current.
    Type: Grant
    Filed: November 27, 2013
    Date of Patent: January 3, 2017
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Andreas Larsson, Torbjörn Holmberg, Magnus Mellteg
  • Patent number: 9529373
    Abstract: Disclosed are a switching regulator and a control circuit and a control method therefor. In one embodiment, by means of controlling a rectifying switch in a power stage with a second control signal which has a predetermined frequency and varies in accordance with the difference between a feedback voltage and a reference voltage, more energy may be shunted when a switching regulator operates in a light loaded or unloaded condition, so that audio noise is avoided.
    Type: Grant
    Filed: December 16, 2014
    Date of Patent: December 27, 2016
    Assignee: Silergy Semiconductor Technology (Hangzhou) Ltd.
    Inventor: Xiaolong Yuan
  • Patent number: 9529765
    Abstract: Described is an apparatus which comprises: a plurality of bridges which are operable to drive respective signals for one or more power supply rails; a plurality of controllers; and a main controller to couple one or more controllers from the plurality of controllers to one or more bridges from the plurality of bridges.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: December 27, 2016
    Assignee: INTEL IP CORPORATION
    Inventors: Stephan Henzler, David Herbison
  • Patent number: 9523721
    Abstract: Example embodiments of a processor current monitor include a switching voltage regulator including a series-connected LC filter including a first inductor, with the first inductor having an inductance value of L1, a first terminal coupled to a switch and a second terminal coupled to a first node, and with the LC filter further including a first capacitor, with the first capacitor having a capacitance value of C1, a first terminal coupled to the first node and a second terminal coupled to a second node, where the switch is configured to couple the inductor to an input voltage at a selected frequency and with the switching voltage regulator configured to supply an output current from the first node to a processor, an inductor current monitoring element 729, coupled to the first inductor, configured to output a first signal indicating the magnitude of current flowing through the first inductor, a capacitor current monitoring element 719, coupled to the first capacitor, configured to output a second signal indica
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: December 20, 2016
    Assignee: INTEL CORPORATION
    Inventor: Viktor D. Vogman
  • Patent number: 9520785
    Abstract: A nonlinear converter, such as a DC-DC converter, includes a nonlinear controller configured to receive an output voltage and a current, and configured to generate a PWM signal. The PWM signal is generated based on setting the converter to a first phase associated with both buck and boost modes when a clock signal is asserted, and selecting a second phase associated with the buck mode of the converter, if a sliding function signal achieves a first predetermined relationship with respect to a buck threshold before a next clock signal is asserted, or selecting a third phase associated with the boost mode of the converter, if the sliding function signal achieves a second predetermined relationship with respect to a boost threshold before a next clock signal is asserted. The nonlinear converter may include a power stage configured to provide the output voltage and a coil current to the nonlinear controller.
    Type: Grant
    Filed: November 17, 2009
    Date of Patent: December 13, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Stefano Marsili, Dietmar Straeussnigg, Luca Bizjak, Robert Priewasser, Matteo Agostinelli
  • Patent number: 9520788
    Abstract: An apparatus and method for a multi-phase switch regulator with improved efficiency is disclosed. The device has parallel implementations for the different phases comprising a driver, a current sense variable gain amplifier, a current share circuit, a pulse width modulation (PWM) control circuit, a trim network, and an inductor. A method is disclosed of providing a system with current sharing function comprising a driver circuit, a current sense circuit, a current share circuit, a PWM control circuit and a trim circuit, providing a current sense circuit for each segment of a driver circuit, sensing a signal using a current sense circuit for each segment of a driver circuit, comparing the output of the current sense circuit, providing the current error information to a PWM controller, generating a PWM drive signal of each phase, and finally, equalizing the output of the current sense amplifier. Other methods that utilize dummy output stages and low pass filter feedback is disclosed.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: December 13, 2016
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Hidenori Kobayashi
  • Patent number: 9509217
    Abstract: A controller for a power converter formed with a plurality of converter stages, and method of operating the same. In one embodiment, the controller includes a power system controller configured to determine an unequal current allocation among the plurality of converter stages based on an operation of the power converter. The controller also includes a converter stage controller configured to control an output current produced by each of the plurality of converter stages in response to the current allocation.
    Type: Grant
    Filed: April 20, 2015
    Date of Patent: November 29, 2016
    Assignee: Altera Corporation
    Inventors: Wenguang Yan, Ashraf W. Lotfi
  • Patent number: 9496791
    Abstract: Methods, devices, and circuits are disclosed for a multiphase buck converter with dynamic phase firing that moderates phase output current. In one example, a method includes evaluating a current of a first phase output of the multiphase buck converter. The method further includes, in response to the current of the first phase output not being higher than a current threshold, applying one or more pulses from a first duty cycle signal to the first phase output. The method further includes, in response to the current of the first phase output being higher than the current threshold, applying one or more pulses from the first duty cycle signal to a second phase output.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: November 15, 2016
    Assignee: Infineon Technologies Austria AG
    Inventor: Jens Ejury
  • Patent number: 9494962
    Abstract: Embodiments of circuitry, which includes power supply switching circuitry and a first inductive element, are disclosed. The power supply switching circuitry has a first switching output and a second switching output. The first inductive element is coupled between the first switching output and a power supply output. The power supply switching circuitry operates in one of a first operating mode and a second operating mode. During the first operating mode, the first switching output is voltage compatible with the second switching output. During the second operating mode, the first switching output is allowed to be voltage incompatible with the second switching output.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: November 15, 2016
    Assignee: RF Micro Devices, Inc.
    Inventors: Nadim Khlat, Michael R. Kay
  • Patent number: 9490712
    Abstract: An output current calculating circuit for a flyback converter operating under CCM and DCM is disclosed. The off current value ION and the blanking current value ILEB flowing through a sensing resistor are calculated using a detection module and are summed together using a current summing unit. A voltage converted from the sum value of the off current value IOFF and the blanking current value ILEB is transmitted through an output stage in a predetermined time ratio of a cycle with the duty cycle determined by a logic control unit, in which the logic control unit controls the output stage to receive the voltage converted from sum current in a predetermined time period of each cycle, and prevents the output stage to receive the voltage converted from sum current in the remaining time other than such predetermined time period of each cycle.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: November 8, 2016
    Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.
    Inventors: Yu-Ming Chen, Jung-Pei Cheng, Pei-Lun Huang
  • Patent number: 9490713
    Abstract: A DC/DC converter 10 of the present invention is provided with a constant-voltage power supply circuit 11; a SENSE+ terminal; a SENSE?/OCPSEL terminal pulled up to a predetermined voltage VL through a pull-up resistor R8; and a controller 14 for controlling the constant-voltage power supply circuit 11, wherein the controller 14 controls the output voltage Vout of the constant-voltage power supply circuit 11 on the basis of a potential difference between the SENSE+ terminal and the SENSE?/OCPSEL terminal, on the condition that the voltage of the SENSE?/OCPSEL terminal is lower than a threshold voltage, and sets predetermined control parameters on the basis of the voltage of the SENSE?/OCPSEL terminal, on the condition that the voltage of the SENSE?/OCPSEL terminal is equal to or higher than the threshold voltage.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: November 8, 2016
    Assignee: FDK CORPORATION
    Inventors: Eiji Nagashima, Toshio Shibata
  • Patent number: 9484811
    Abstract: An integrated circuit comprising voltage modulation circuitry arranged to convert an input voltage level at an input node to an output voltage level at an output node. The voltage modulation circuitry comprises a switching element arranged to connect the input node to the output node when in an ON condition, and switching control module operably coupled to the switching element and arranged to control the connection of the input node to the output node by the switching element in accordance with a switching frequency. The voltage modulation circuitry further comprises frequency control module operably coupled to the switching control module and arranged to receive an indication of the input voltage level at the input node, and to configure the switching frequency based at least partly on the input voltage level indication.
    Type: Grant
    Filed: July 16, 2009
    Date of Patent: November 1, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Franck Galtie, Philippe Goyhenetche, Eric Rolland
  • Patent number: 9479071
    Abstract: A multilevel converter includes at least one converting unit, where the converting unit includes N interleaved parallel bridge arms which enable the converting unit to output 2[(M?1×)N]+1 level signals, where N is an integer greater than or equal to 3, M is the number of levels received by the converting unit, and M is an integer greater than or equal to 3; a direct current inputting unit that supplies the direct current to the converting unit; a voltage dividing unit, where an input end of the voltage dividing unit is connected to an output of the direct current inputting unit, and an output end of the voltage dividing unit is connected to an input end of the converting unit; and at least one filtering unit, where the filtering unit is connected to the converting unit to output an alternating current.
    Type: Grant
    Filed: March 19, 2015
    Date of Patent: October 25, 2016
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Lei Shi, Yunfeng Liu, Yanshen Hu
  • Patent number: 9476921
    Abstract: A method may include deactivating a switch of a measurement circuit during a measurement portion of at least one voltage regulator phase, wherein each of the at least one voltage regulator phase is integral to a voltage regulator and each of the at least one voltage regulator phase comprises a power stage. The power stage may include a high-side switch for delivering electrical current to the at least one information handling resource in conformity with a first duty cycle of the high-side switch. The power stage may also include a low-side switch for sinking electrical current to an electrical ground in conformity with a second duty cycle of the low-side switch. The method may also include measuring a voltage across a sense resistor of the measurement circuit during the measurement portion, wherein the sense resistor is coupled in parallel with non-gate terminals of the switch.
    Type: Grant
    Filed: May 19, 2014
    Date of Patent: October 25, 2016
    Assignee: Dell Products L.P.
    Inventors: Shiguo Luo, George Gilman Richards, III
  • Patent number: 9467041
    Abstract: Provided are a digital current equalizing device, an analog current equalizing device, a current equalizing method and a system. The digital current equalizing device comprises: an output current sampling amplifying module (102), a digital processing module (104), and a main power frequency conversion module (106). An input terminal of the output current sampling amplifying module (102) connects to an output loop of a power supply, and an output terminal of the output current sampling amplifying module (102) connects to a current equalizing bus through a resistor R0, wherein the digital processing module (104) is configured to adjust an output voltage reference signal Vr according to a difference between an output voltage signal V2 of the output current sampling amplifying module (102) and an voltage signal Vbus of the current equalizing bus, and the main power frequency conversion module (106) is controlled to adjust the voltage according to the adjusted output voltage reference signal Vr?.
    Type: Grant
    Filed: June 21, 2013
    Date of Patent: October 11, 2016
    Assignee: ZTE Corporation
    Inventors: Yundong Yang, Dacheng Zheng, Qiong Wu, Jingsi Wang, Zhirong Cheng, Hong Wang