Abstract: A power factor correction (PFC) circuit of a power converter is disclosed. The power converter includes a primary side coil, a secondary side coil, an inductive coil, and a power switch. The PFC circuit includes a zero current detection circuit for detecting an inductive signal of the inductive coil to generate a detection signal; an error detection circuit for generating an error signal corresponding to an output voltage signal or an output current signal according to a reference signal; a ramp signal generating circuit for generating a ramp signal; a comparison circuit for comparing the ramp signal with the error signal to generate a comparison signal; and a trigger circuit for generating a control signal to control the power switch and for controlling the ramp signal generating circuit to adjust a slope of the ramp signal according to the detection signal and the comparison signal.

Abstract: A DC-DC converter includes a voltage converting block that converts an input supply voltage to an output voltage and includes a power switch turning on at on-time of a power driving signal, a power driving block that generates the power driving signal using an oscillation output signal, wherein a cycle of the power driving signal varies according to a cycle of the oscillation output signal and a length of the on-time of the power driving signal is fixed to a power time regardless of variation of the cycle of the oscillation output signal, a voltage-controlled oscillating block that generates the oscillation output signal, the cycle of which is controlled according to a level of an oscillation control signal, and a target tracking block that generates a feedback voltage and controls the level of the oscillation control signal such that a feedback voltage follows a target reference voltage.

Abstract: A power conversion circuit, such as a buck converter/regulator, includes a feedback loop operatively coupling the output voltage to the controller for the switching mechanism. The feedback loop includes an analog error amplifier that sources current to the controller when the output voltage falls below a predetermined reference voltage and sinks current from the controller when the output voltage rises above a predetermined reference voltage. The feedback loop further includes at least one of a sinking boost circuit that sinks additional current from the controller when the output voltage falls below a low voltage threshold or a sourcing boost circuit that sources additional current to the controller when the output voltage rises above a high voltage threshold. The boost circuits can include analog amplifiers, digital comparators, or a combination thereof.

Abstract: The present invention relates to a control system and a method for raising the mains-side power factor ? of three-phase fed EC motors having a dc voltage intermediate circuit (2) with an intermediate center tap (DCM) for generating a positive and a negative intermediate circuit potential (DC+, DC?), comprising three active bridge arms (Ia, IIa, IIIa), each of which are connected to a subordinate two-point current control (ZPR1, ZPR2, ZPR3) and, in each case, via said current control to a superimposed intermediate circuit voltage control (3), which controls the potential difference between the middle circuit potentials (DC+, DC?) via set point settings for the subordinate two-point current controllers (ZPR1, ZPR2, ZPR3).

Abstract: A quaternary/ternary modulation selecting circuit of an audio amplifier includes a quaternary signal generating circuit, for receiving complementary analog input signals to generate complementary quaternary signals; and a ternary signal generating circuit for generating a ternary signal according to the complementary quaternary signals, wherein the ternary signal includes a positive ternary wave and a negative ternary wave; wherein when a difference in amplitude between the complementary analog input signals is within a predetermined range of zero amplitude, a signal pattern of the positive ternary wave generated from the ternary signal generating circuit is identical to a signal pattern of the negative ternary wave generated from the ternary signal generating circuit.

Abstract: A circuit and method for power gating is provided. The circuit includes a switch circuit and a modulation oscillator. The switch circuit is connected between a circuit module and a power network having a target level. The switch circuit receives a control signal at its control signal input terminal to gate a connection between the circuit module and the power network under the control of the control signal. The switch circuit is connected to the circuit module at a first node. A modulation oscillator enabling signal input terminal is connected to a gating signal for enabling the modulation oscillator, a modulation oscillator control signal input terminal is connected to the first node, and an modulation oscillator output terminal is connected to the control signal input terminal of the switch circuit. The oscillation signal outputted from the modulation oscillator is modulated by the level of the first node.

Abstract: A switched mode power supply may include circuitry configured to output a bias signal that turns off and on switching circuitry of the switched mode power supply. The circuitry may wait for a first time period determined by the bias signal, and output the bias signal to turn off the switching circuitry when the time period expires. In addition or alternatively, the circuitry may begin waiting for a second time period when the bias signal turns off the switching circuitry. The circuitry may turn on the switching circuitry either when energy in inductive storage circuitry is depleted or when the second time period expires.

Abstract: In one implementation, a voltage converter includes a high side power switch, and first and second low side power switches. The voltage converter also includes a driver stage for driving the high side power switch and the first and second low side power switches, and an adaptive OFF-time control circuit coupled to the driver stage. The adaptive OFF-time control circuit is configured to sense a current through one of the first and second low side switches, and to determine an adaptive off time for the high side power switch based on the sensed current.

Abstract: A voltage control circuit includes a processing unit, a power control circuit, a first impedance circuit, a first switch, and a current source. The power control circuit is used for outputting a core voltage to the processing unit. The first switch and the first impedance circuit are connected in parallel between the processing unit and the power control circuit, and they feedback a feedback voltage to the power control circuit. The current source is used for providing or extracting an operating current via the first impedance circuit or the first switch. The first switch is turned on and the processing unit receives a first core voltage when the processing unit operates at a normal mode. The first switch is turned off and the processing unit receives a second core voltage when the processing unit operates at an overvoltage mode.

Abstract: A quaternary/ternary modulation selecting method of an audio amplifier includes: generating a ternary signal and a quaternary signal; generating a plurality of pulses with limited duty cycles; and selecting one of the quaternary signal, the ternary signal and the plurality of pulses for an output stage of the audio amplifier.

Abstract: A control circuit of a digital control power supply circuit includes: an A/D converter that samples a feedback voltage according to an output voltage of the power supply circuit when a strobe signal is asserted, and converts the sampled feedback voltage into digital feedback data; an error detector that generates error data which indicates a difference between the feedback data and target data; a compensator that generates a duty command value which is adjusted to approximate the error data to zero; a digital pulse width modulator that receives the duty command value and generates a pulse signal having a duty ratio corresponding to the duty command value; and a strobe signal generator that generates the strobe signal and adjusts a sampling timing at which the strobe signal is asserted such that the sampling timing approximates a target position set in a substantial center of a slope of the output voltage.

Abstract: A switch power converter and method of testing and adjusting is provided. A switch power unit comprises at least a power switch for transform of the power. A controller is configured to generate a control signal for the power switch. A detector is configured to detect an output voltage signal and/or an output current signal of the switch power unit and output a sampling signal. A testing and adjusting unit is configured to receive the sampling signal and output a testing signal to the controller. The testing and adjusting unit comprises a compensator. The compensator attends the testing and adjusting of the switch power converter.

Abstract: A step-down chopper type switching power-supply device includes a step-down chopper circuit including an inductor connected to a switching element connected to a DC power source, a regenerative-voltage detecting circuit, a control circuit controlling the switching element such that regenerative voltage becomes a reference voltage, an auxiliary power supply circuit charging a capacitor by using the regenerative voltage and supplying the voltage of the capacitor as power-supply voltage to the control circuit, and a activation circuit stopping supply of current to the capacitor after activation of the auxiliary power supply circuit, wherein, after activation of the auxiliary power supply circuit, in a case where voltage supplied from the DC power source is equal to or less than a first threshold value, the activation circuit performs control by the voltage supplied from the DC power source, such that current is supplied to the capacitor.

Abstract: The invention relates to an apparatus and method for tracking energy consumption. An energy tracking system comprises at least one switching element, at least one inductor and a control block to keep the output voltage at a pre-selected level. The switching elements are configured to apply the source of energy to the inductors. The control block compares the output voltage of the energy tracking system to a reference value and controls the switching of the switched elements in order to transfer energy for the primary voltage into a secondary voltage at the output of the energy tracking system. The electronic device further comprises an ON-time and OFF-time generator and an accumulator wherein the control block is coupled to receive a signal from the ON-time and OFF-time generator and generates switching signals for the at least one switching element in the form of ON-time pulses with a constant width ON-time.

Abstract: A PFC circuit having a switching circuit and a control circuit, the control circuit controls an operation mode of the switching circuit based on an input current and a switching frequency of the switching circuit, when the switching circuit works under a continuous current mode, the switching circuit is turned ON when the input current is less than an OFF current reference signal, and when the switching circuit works under a first discontinuous mode or a second discontinuous mode, the switching circuit is turned ON after a turn ON delay time period when the input current is less than the OFF current reference signal.

Abstract: Methods and apparatus for minimizing average quiescent current for a desire voltage error in a comparator are disclosed. An example method includes receiving a first voltage and a reference voltage, outputting a second voltage when the first voltage is lower than the reference voltage, wherein the outputting of the second voltage increases the first voltage, counting a number of clock cycles while the first voltage is higher than the reference voltage, comparing the number of clock cycles to a maximum number of clock cycles and a minimum number of clock cycles, when the number of clock cycles is above the maximum number of clock cycles, decreasing a frequency of a clock associated with the number of clock cycles, and when the number of clock cycles is below the minimum number of clock cycles increase the frequency of the clock.

Abstract: A system, switching regulators, and methods of control for enhanced peak current-mode PWM switching regulators are disclosed. For example, a switching regulator is disclosed, which includes a master controller circuit and a slave controller circuit coupled to the master controller circuit, wherein the slave controller circuit is configured to generate a ripple current at a first ripple node, and a sensor circuit is configured to sense the ripple current at the first ripple node and convey the sensed ripple current to a second ripple node in the master controller circuit. In some implementations, the switching regulator is part of a power subsystem formed on one or more semiconductor ICs, wafers, chips or dies.

Abstract: A voltage regulator includes: a drive voltage generating part for generating a drive voltage and then apply the drive voltage to a drive line; an output transistor for outputting a voltage corresponding to a voltage value of the drive line as the internal source voltage; and a compulsory drive circuit including a capacitor element configured to receive the source voltage at one end, a first switching element for receiving a ground voltage and applying the ground voltage to the other end of the capacitor element by being set in an ON state over a period in which the selected operational mode is the standby mode, and a second switching element that connects the other end of the capacitor element to the drive line only for a predetermined period in an ON state when the operational mode transitions from the standby mode to the active mode.

Abstract: A power conversion device includes a half bridge type inverter circuit that includes semiconductor elements, and a DC capacitor and that is connected to a positive side bus of the AC power supply, a smoothing capacitor, a semiconductor element that is connected between the semiconductor element and a positive side of the smoothing capacitor, and a semiconductor element that is connected between the semiconductor element and a negative side of the smoothing capacitor, in which turning-on and turning-off of the semiconductor element are controlled so that a DC voltage of the DC capacitor tracks a target voltage, and turning-on and turning-off of the semiconductor elements are controlled so that a DC voltage of the smoothing capacitor tracks a target voltage and thus an input power factor from the AC power supply is adjusted.

Abstract: A switching power converter is provided that provides an adaptive power factor correction using a peak constant current mode and also a constant on time mode during each cycle of an input voltage.

Abstract: A voltage converter for determining whether input power is DC power or AC power includes a power input terminal, an AC to DC converter, a switch and a DC detector. The AC to DC converter converts AC power into a DC output voltage when the input power is AC power. The AC to DC converter includes a brown-out detector, for disabling the AC to DC converter when a voltage of the input power is smaller than a predefined voltage. The switch passes DC power when the input power is DC power. The DC detector determines that the input power is DC power and turns on the switch when the voltage of the input power is within a predefined voltage range, and determines that the input power is AC power and turns off the switch when the voltage of the input power is not within the predefined voltage range.

Abstract: A method for operating a maximum power point tracking (MPPT) controller including a switching circuit adapted to transfer power between an input port and an output port includes the steps of: (a) in a first operating mode of the MPPT controller, causing a first switching device of the switching circuit to operate at a fixed duty cycle; and (b) in a second operating mode of the MPPT controller, causing a control switching device of the switching circuit to repeatedly switch between its conductive and non-conductive states to maximize an amount of power extracted from a photovoltaic device electrically coupled to the input port.

Abstract: A DC-DC converter is provided. The DC-DC converter includes at least one converter circuit configured to include an inductor and to supply a current to a load through the inductor; and a controller configured to sense the current to generate a sensed signal, to sample and hold the sensed signal at a predetermined sampling time to detect an average current of the inductor, and to control an operation of the at least one converter circuit according to the average current. The sampling time is set to a time in a period while the inductor current is less than a peak and greater than a valley.

Abstract: A control circuit (115), a control method, a DC-DC converter and an electronic device are provided. The control circuit (115) is used to control the DC-DC converter to switch its operation modes. In the control circuit (115), whether mode of the DC-DC converter is to be switched is judged according to parameters of a first duration of an active duration and a second duration of an inactive duration. Comparison of analog values is prevented, and as a result, the use of the analog comparator is reduced, thus the influence of the semiconductor processes on designing a controller can be reduced.

Abstract: A driver circuit for driving a switching transistor includes a dead time calibration circuit and/or a quick start circuit. The dead time calibration circuit includes a delay comparator to compare a present delay between the low side switch turning off or the high side switch turning off and a voltage at a switch node between the high side switch and the low side switch to a past delay and a controller responsive to the comparison is configured to adjust the delay of an adjustable delay element coupled to a control terminal of a switching transistor. The quick start circuit includes a quick start signal generator having an adjustable delay element to generate a quick start signal having a pulse to turn on the switching transistor for a quick start interval, a quick start comparator configured to monitor the quick start signal, and a control circuit responsive to the comparison by the quick start comparator to adjust the delay of the delay element.

Abstract: A display device includes; a touch panel device including; a touch panel and a touch controller connected to the touch panel, the touch controller including; a sampling unit which samples a sensing output signal input thereto from the touch panel to generate a sampled signal, and an analog/digital converter which converts the sampled signal to generate contact information, and a display panel device including; a display panel, a gate driver which applies a gate signal to the display panel, and a data driver which applies a data voltage to the display panel, wherein the sampling unit samples a portion of the sensing output signal which does not include a coupling noise.

Abstract: A synchronous DC-DC converter (300) for converting an input voltage (Vin) into an output voltage (Vout), the converter having a continuous current operative mode (CCM) and a discontinuous current operative mode (DCM), the converter including: an active switch (302) receiving a first gate signal for turning on the active switch for a first time interval (Tq1), the first gate signal having a period (Tprd); a synchronous rectifier (304) receiving a second gate signal for turning on the synchronous rectifier for a second time interval (Tq2); and a controller (306) for determining an estimation (Tq1est) for the first time interval, and thereafter comparing the estimation (Tq1est) with the value of the first time interval (Tq1); wherein responsive to the comparison the controller (306) determines an operative mode of the converter (300) and controls the second time interval (Tq2) depending on the determined operative mode.

Abstract: A control circuit for controlling a switching circuit is disclosed. The control circuit has a ramp compensation circuit, a ramp regulating circuit and a comparison circuit. The ramp compensation circuit generates a ramp compensation signal with the amplitude proportional to the difference between 1 and the duty cycle of a main switch of the switching circuit. The ramp regulating circuit generates a ramp regulating signal with the amplitude proportional to the duty cycle of the main switch. The comparison circuit compares a reference signal with the sum of the ramp compensation signal, the ramp regulating signal and a feedback signal representative of an output voltage of the switching circuit, so as to provide a comparison result to control the switching circuit.

Abstract: The invention relates to an apparatus and method for tracking energy consumption. An energy tracking system comprises at least one switching element, at least one inductor and a control block to keep the output voltage at a pre-selected level. The switching elements are configured to apply the source of energy to the inductors. The control block compares the output voltage of the energy tracking system to a reference value and controls the switching of the switched elements in order to transfer energy for the primary voltage into a secondary voltage at the output of the energy tracking system. The electronic device further comprises an ON-time and OFF-time generator and an accumulator wherein the control block is coupled to receive a signal from the ON-time and OFF-time generator and generates switching signals for the at least one switching element in the form of ON-time pulses with a constant width ON-time.

Abstract: In a device, a pulse modulation switching logic is provided to generate switching signals of a pulse modulator so as to generate a pulse modulated signal with a first pulse modulation control parameter and a second pulse modulation control parameter. The first pulse modulation control parameter is controlled on the basis of a first control signal, and the second pulse modulation control parameter is controlled on the basis of a second control signal. A first control loop is provided to generate the first control signal from an output signal derived from the pulse modulated signal. A second control loop is provided to generate the second control signal on the basis of the output signal. The first and second control signals are applied to concurrently control the first and second pulse modulation control parameters.

Abstract: In accordance with an embodiment, a method includes driving an electronic switch in a switched-mode power converter in successive drive cycles, wherein driving the switch in each of the drive cycles comprises switching on the electronic for an on-period and subsequently switching off the electronic switch for an off-period, and measuring an operation parameter of the switched-mode power converter during the on-periods of the drive cycles, and storing the operation parameter measured in an on-period if a duration of the on-period met a predefined criteria. The method further includes forcing the on-period of a drive cycle to meet the predefined criteria if the operation parameter has not been stored for a predefined number of drive cycles, or for a pre-defined time duration.

Abstract: A switching voltage regulator includes a power stage for delivering output current to a load through an inductor. The power stage has a high-side transistor and a low-side transistor. The switching voltage regulator also includes a controller for setting the power stage in a PFM (pulse frequency modulation) switching mode if the output current decreases below a first threshold. Each period of the PFM switching mode includes an on-time during which the high-side transistor is on and the low-side transistor is off, an off-time during which the low-side transistor is on and the high-side transistor is off and a HiZ-time during which the high-side transistor and the low-side transistor are both off. The controller varies the on-time of the PFM switching mode responsive to a change in the output current.

Abstract: A switching DC-DC voltage regulator (VR) provides for light and sinking loads by compute components of an information handling system (IHS). A controller detects a load current value and a voltage output value of a synchronous Buck VR. In response to detecting that the load current value is less than a threshold value, the controller drives a high side control switch (HS) and low side synchronous switch (LS) to regulate an output voltage value across a capacitor by causing an inductor current ripple through an inductor of the synchronous Buck VR in discontinuous conduction mode (DCM) to reduce power consumption during a light load. In response to detecting an electrical characteristic indicative of a voltage overshoot of the output voltage, the controller drives the HS and LS to cause the synchronous Buck VR to perform forced continuous conduction mode (FCCM) to sink the load current each switching cycle.

Abstract: A circuit includes a first transistor having a first current electrode coupled to a first power supply node, a second current electrode coupled to a switching node; a second transistor having a first current electrode coupled to the switching node, a second current electrode coupled to a second power supply node; an inductor having a first terminal coupled to the switching node, a second terminal coupled to an output node; a third transistor having a first current electrode coupled to the output node, a second current electrode coupled to the switching node; a driver circuit configured to transition the switching node from a first voltage to a second voltage by turning on the third transistor to couple the output node to the switching node during a first time period, turning on the first transistor to couple the first power supply node to the switching node during a second time period.

Abstract: An output voltage control method and apparatus are provided. The method includes sensing output voltages of a DC-DC converter and a high-voltage battery and sensing an inductor current flowing through an inductor in a boost circuit at a front end of the DC-DC converter. In addition, the method includes varying a gain of an output voltage controller of the DC-DC converter based on a difference of the sensed inductor current with respect to an inductor current at the center point in a specified region.

Abstract: There is disclosed an asynchronous switch mode power supply comprising: a subtractor for subtracting an output of the switch mode power supply from a reference signal; a filter for filtering the subtracted output; a quantizer for generating a plurality of quantizer outputs in dependence on the integrated subtracted output; and a power switch stage for connecting one of a plurality of supply voltages to the output of the switch mode power supply in dependence on the quantizer outputs.

Abstract: A multiphase power converter has a plurality of phase circuits, each of which provides a phase current when being active. During single-phase operation of the multiphase power converter, an enhanced phase control circuit and method monitor the summation of the phase currents, and when the summation becomes higher than a threshold, switch the multiphase power converter to a higher power zone to increase the number of active phases. A high efficiency and high reliability multiphase power converter is thus accomplished.

Abstract: A control method for a power supply system having at least two power parts with power outputs connected in parallel, wherein each power part is actuated via a separate control and where at least one first power limit is specified for each control, where the control actuates the allocated power part up to the first power limit in a normal mode, a first drawdown value of the output voltage is specified for each control upon reaching the first power limit, and the respective control regulates the output voltage of the related power part to the first drawdown value upon reaching the first power limit so that the parallel connection of a plurality of power parts without a super-ordinate control is achieved.

Abstract: A control circuit of digital control power supply circuit includes: first filter generating detection voltage having voltage level based on time average of output voltage of the digital control power supply circuit; A/D converter sampling feedback voltage having voltage level based on the output voltage at peak or bottom of the output voltage and converting the sampled feedback voltage into digital feedback data, and converting the detection voltage into digital detection data; error detector generating error data indicating difference between the feedback data and target data indicating target value of the feedback voltage; compensator generating duty command value adjusted to make the error data approximate zero; digital pulse modulator receiving the duty command value and generating pulse signal having duty ratio corresponding to the duty command value; and correction unit correcting the target data based on difference between the detection data and the feedback data.

Abstract: A multiphase buck converter (10) is disclosed, comprising: —a first buck converter branch (SD1, L1) comprising a first core section (COR1), a first power section (PWR1) having a first output node (LX1), a first coil (11) having a first end connected to the first output node (LX1), the first power section (PWR1) being adapted to be controlled by the first core section (COR1) for providing to the coil (L1) a coil current (I1), the first core section (COR1) and the first power section (PWR1) being integrated in a chip (IC); —a second buck converter branch (SD2, L2) comprising a second core section (COR2), a second power section (PWR2) having a second output node (LX2), a second coil (L2) having a first end connected to the second output node (LX2), the second power section (PWR2) being adapted to be controlled by the second core section (COR2) for providing to the second coil (L2) a second coil current (I2), the second core section (COR2) and the second power section (PWR2) being integrated in said chip (IC); —a

Abstract: A voltage regulator and a control method thereof are provided to dynamically adjust an output voltage. The voltage regulator comprises a plurality of switching transistors and a control circuit. The first end of each switching transistor receives a driving voltage, and the second end of each switching transistor is electrically connected to the end which outputs the output voltage. The input end and the feedback end of the control circuit respectively receive a reference voltage and the output voltage. A plurality of output ends of the control circuit are electrically connected to the control ends of the switching transistors respectively. Switching transistors adjust the output voltage. The control circuit compares the output voltage with the reference voltage, and selectively turns the switching transistors on or off according to the comparison between the output voltage and the reference voltage, to control the output voltage to approach the reference voltage.

Abstract: Disclosed is a control method for a series resonant converter is provided, which includes: a feedback signal is acquired by collecting an analog output signal of a series resonant converter, and an operating frequency of the series resonant converter is changed according to the feedback signal; the series resonant converter adopts a hybrid control mode combing frequency and width modulation with width-fixed frequency modulation when lightly loaded or unloaded and a frequency modulation control mode when heavily loaded, wherein a switching can be conducted between the hybrid control mode and the frequency modulation control mode through hysteresis control.

Abstract: A power supply apparatus is provided, and which includes a power conversion circuit, a control chip with soft-start function and a short protection circuit. The power conversion circuit is configured to provide a DC output voltage to a load in response to an output pulse-width-modulation (PWM) signal. The control chip is operated under a DC input voltage, and configured to generate the output PWM signal to control the operation of the power conversion circuit. The short protection circuit is configured to pull-down the level of a soft-start pin of the control chip, so as to substantially/significantly reduce the frequency and duty cycle of the output PWM signal, and then substantially/significantly reduce the current flowing through the shorted load.

Abstract: A method is provided for current compensation. The method is based on division-sigma (D-?) control for a DC/DC converter. Inductance changes are allowed with D-? digital control achieved. Loop gain can be quickly adjusted. The disadvantage of average current-mode control (ACMC) is solved, where the disadvantage is a reduction of the response speed caused by the filter within the current loop. The present invention uses midpoint current sampling to ensure taking an average inductor current value in each switching cycle. By doing so, a lack of fidelity of peak current-mode control (PCMC) is solved, where the lack of fidelity is due to the amount of error value between the peak value and the average value. Besides, the present invention uses a table of the inductance following current changes to achieve compensation of duty cycle ratio, where the table is built in a single chip.

Abstract: In described examples, a phase interleaver obtains (i) a first signal indicating a variance between a reference voltage and a regulated output voltage and (ii) a second signal indicating a voltage across an energy storage device. A voltage regulator includes multiple phase blocks collectively configured to generate the regulated output voltage. In a repeating cycle, (i) the voltage across the energy storage device is increased while the second signal is less than the first signal and (ii) in response to a determination that the second signal is greater than the first signal, the energy storage device is substantially discharged, multiple stages of a clock divider are transitioned in the phase interleaver, and a set of control signals is output from the clock divider. The control signals have a common switching frequency and a common switching period. The control signals control the phase blocks active in generating the output voltage.

Abstract: A switching power supply device wherein an input voltage is stepped-up by first and second switching elements that are driven on and off in a complementary way, thus obtaining a stabilized output voltage. The switching power supply device includes a comparator that detects fluctuation in an operating reference potential of the second switching element accompanying fluctuation in the input voltage, and a drive signal generator circuit that carries out a logical operation on an output control signal, a dead time signal, and the output signal of the comparator, thus generating first and second drive signals that determine the on-state time of the first and second switching elements.

Abstract: A multi-mode current-allocating device serves to control the DC to DC converter in each power supply device of a distributive power supply system. The multi-mode current-allocating device has an active current-sharing control circuit, a current-allocating bypass circuit, and a droop current sharing control circuit to be selectively operated under an active current-sharing mode, a current-allocating mode or a droop current-sharing mode according to the factors of the type of input power of each power supply device, the state of system load, and the system reliability so as to maintain the power supply efficiency of entire power supply system and reduce unnecessary power loss.

Abstract: A dual mode low dropout voltage regulator has a low dropout regulation mode and a bypass mode and provides a smooth transition between mode transitions taking place under load. When an accessory requires a larger voltage level, a bypass signal commands the dual mode low dropout voltage regulator to go into bypass mode and transfer voltage level of the unregulated input voltage source to the output of the dual mode low dropout voltage regulator. The dual mode low dropout voltage regulator provides a smooth transition to the bypass to prevent the output of the dual mode low dropout voltage regulator from decreasing or having a “brown out” until a pass transistor is forced to turn on fully to provide the voltage level of the unregulated input voltage source to fully bypass the low dropout regulating mode of operation.

Abstract: A mixed signal integrated circuit, such as a typical microcontroller or digital signal controller (DSC), provides digital slope compensation for implementing peak current control in switched mode power supply (SMPS) systems. Simple and fast software calculations using digital values already measured require a single multiply and accumulate instruction (MAC) to determine the slope compensated peak current reference signal, ICMP, that will be compared with the inductor/switch current to control power switch. Doing all calculations in digital form using a software program also allows easy configurability for many different applications, setting slope values by writing to a register(s) in a memory map, and to allow SMPS applications to be dynamically adaptable or configurable on the fly. The entire slope compensation function and PWM control may be self-contained within the microcontroller or DSC and without the need of external components.

Abstract: A circuit and method for providing switching regulation with an improved current monitor comprising a pulse width modulation (PWM) controller configured to provide an output signal voltage, an output stage configured to provide switching comprising a first and second transistor, and first inverter, a sense circuit configured to provide signal sensing from said output stage, a sampling switch circuit configured to provide sample signals from said sense circuit, a differential integrator circuit configured to provide sample signals from said sampling switch circuit, a comparator configured to provide signals from said integrator circuit, a control logic circuit configured to provide signals from said comparator, a current digital-to-analog converter (DAC) configured to provide feedback signal from said control logic circuit, and, a digital filter configured to provide output current information.