Abstract: A system includes a pulse width modulator and a shift generator. The pulse width modulator receives a saw-tooth signal and generates pulse width modulated pulses based on the saw-tooth signal to regulate an output voltage of a DC-to-DC converter. The shift generator generates a DC voltage in response to a change in an input voltage of the DC-to-DC converter and shifts the saw-tooth signal by the DC voltage to regulate the output voltage of the DC-to-DC converter.

Abstract: The embodiments herein describe a switched mode power converter. In particular, the embodiments herein disclose techniques for reducing power consumption of a synchronous rectifier controller of the switched mode power converter. The switched mode power converter includes a plurality of circuit components that control operation of a synchronous rectifier included in the switched mode power converter. One or more of the circuit components may be disabled to reduce power consumption.

Abstract: A circuit and method for switching between a system's internal clock and an external synchronization clock when a stable external clock has been detected, and for switching back to operating the system using said internal clock when a predetermined number of sequential external clock pulses exceed a predetermined switching period dropout threshold or are otherwise missing.

Abstract: A gear lubrication arrangement comprises a lubrication pump for circulating lubrication fluid. A power source coupled to the lubrication pump drives the lubrication pump, and a controller controls an output power of the lubrication pump. The gear lubrication arrangement comprises a pressure sensor disposed down-stream of the lubrication pump The pressure sensor is configured to measure a pressure of the lubrication fluid and to produce a pressure indication signal representative thereof. The controller is arranged to vary the output power of the lubrication pump at least partly on the basis of the pressure indication signal.

Abstract: A power loss control method comprises detecting a load condition of the MOS unit, and adjusting driving loss of the MOS unit based on the load condition. The driving loss of the MOS unit is configured to decrease when the MOS unit is at light load condition.

Abstract: A power conversion apparatus includes a switch circuit which activates switching elements on the basis of a control signal, a feedback means which performs feedback control, a signal output means which outputs the control signal on the basis of a control variable of the feedback control, and a mode switching means which controls switching operation of the switch circuit by switching an operation mode between a normal mode and an intermittent mode in which the number of operations is less than that in the normal mode. The mode switching means changes timing of switching from the normal mode to the intermittent mode, on the basis of either or both of a first detection value which is an input value inputted to the switch circuit and a second detection value which is an output value outputted from the switch circuit.

Abstract: The DC-DC converter includes a reference voltage generating circuit that generates a reference voltage. The DC-DC converter includes a modulation clock signal generating circuit that generates a modulation clock signal. The DC-DC converter includes a modulator that performs modulation of the reference voltage in synchronization with the modulation clock signal and outputs a resulting reference signal. The DC-DC converter includes a first comparator that compares the reference signal and a first feedback signal, which is based on the output voltage, and outputs a signal based on a result of the comparison. The DC-DC converter includes a driver that shapes a waveform of a PWM signal, which is based on the signal output from the first comparator, and outputs the PWM signal with the shaped waveform to the control node.

Abstract: A highly accurate control is achieved in such a way that a timing value is generated from a differential control amount calculation result and a filter calculation result at iteration intervals not exceeding the iteration intervals of the filter calculation and then the timing set value of a driving signal generation circuit is updated by this timing value. A device for controlling a power conversion circuit comprises an AD conversion circuit (22), a driving timing value generation circuit (23), and a driving signal generation circuit (24). The driving timing value generation circuit (23) includes a control amount calculation circuit (231) and a digital-digital addition circuit (232). The digital-digital addition circuit (232) generates a driving timing value for a switch of a power conversion circuit. The driving signal generation circuit (24) receives the driving timing value and generates a driving signal for the switch (11) of the power conversion circuit (1).

Abstract: A power converter is disclosed. The power converter includes a comparator and a timing generator. The comparator compares a first input signal with a second input signal to provide a control signal. The timing generator is coupled to the comparator. The timing generator includes a plurality of timing generating units, a logic unit, and a calculation unit. The timing generator generates a plurality of timing signals through the timing generating units and the logic unit according to the control signal, and the calculation unit forms a pulse width modulation (PWM) signal according to the timing signals. At least a part of the timing signals are overlapped.

Abstract: In an apparatus for controlling a variable of a rotary machine based on an AC voltage supplied to the rotary machine via a switching element of a power converter, a generator generates a drive signal including an on-off pattern of the switching element. A driver drives, based on the on-off pattern of the drive signal, the switching element. A parameter monitor monitors a parameter indicative of change of a harmonic current flowing in the rotary machine based on a harmonic voltage included in the AC voltage. A limiter limits, based on the parameter monitored by the parameter detector, generation of the drive signal by the generator to limit an increase of a level of the harmonic current.

Abstract: One embodiment includes a power supply system. The system includes a pulse-width modulation (PWM) system configured to generate a PWM signal. The system also includes a power stage comprising a gate driver, a high-side switch, and a low-side switch. The gate driver can be configured to alternately activate the high-side and low-side switches to provide an output signal to a load in response to the PWM signal, and to provide an activation dead-time between the alternate activation of the high-side and low-side switches. The system further includes a digital delay system configured to measure the activation dead-time and to add the measured activation dead-time to the activation of the high-side switch.

Abstract: A switching mode power converter includes a DSC with a digital PWM module configured for complementary operation mode during normal operation. The control algorithm of the DSC is configured such that during an initialization stage immediately following power up of the device relevant digital PWM modules used for interleaving operation are reconfigured to temporarily operate in an independent operation mode with the duty cycle associated with each channel set at zero. The reconfigured digital PWM modules remain set in the independent operation mode for a predefined period of time. Once the predefined time period is reached, the reconfigured digital PWM modules are again reconfigured back to the original complementary operation mode configuration and the control algorithm resumes normal operation of the DSC and digital PWM modules.

Abstract: A computer program product for controlling the in rush current to a hot plug device. The computer program product includes program instructions that cause a processor to perform a method. The method includes providing a series of turn on pulses to the gates of a plurality of turn on FETs on a hot plug device coupled to a direct current power source, wherein each pulse causes the plurality of FETs to pass current from the direct current power source to a subsystem of the hot plug device, and wherein each pulse has a duration that ends before the impedance of the turn on FETs falls below a safe operating region. The method further includes providing a steady turn on signal to the FETs in response to the output voltage from the FETs to a subsystem of the hot plug device exceeding a predetermined voltage threshold.

Abstract: Methods and apparatus for control of DC-DC converters, especially in valley current mode. The DC-DC converter is operable so that a low side supply switch may be turned off, before the high side supply switch is turned on. During the period when both switches are off the current loop control remains active and the change in inductor (L) current is emulated. One embodiment uses a current sensor for lossless current sensing and emulates the change in inductor current by holding the value of the output of the current sensor (ISNS) at the time that the low side switch turns off and adding an emulated ramp signal (VISLP) until the inductor current reaches zero. Embodiment employing a pulse-skip mode of operation based on a minimum conduction time are also disclosed. The invention enables a seamless transition from Continuous Conduction Mode the Discontinuous Conduction Mode and Pulse Skipping and provide converters that are efficient at low current loads.

Abstract: A voltage generating circuit comprising: an output current generating circuit, generating an output current, such that an output voltage is generated at an output terminal, according to an output voltage control signal; a comparing device, comprising a first input terminal receiving a reference voltage, a second input terminal receiving a feedback voltage related with the output voltage, and an output terminal outputting the output voltage control signal according to the reference voltage and the feedback voltage; an adjustable voltage dropping circuit, comprising a first terminal coupled to the second input terminal, and a second terminal coupled to the output terminal; and a current source, for generating a predetermined current to the first terminal of the adjustable voltage dropping circuit, thereby the feedback voltage is generated at the first terminal of the adjustable voltage dropping circuit. The predetermined current flows through the adjustable voltage dropping circuit to the output terminal.

Abstract: The present invention relates to a method and apparatus for controlling supply voltage of clock and data recovery circuit.

Abstract: A synchronization circuit receives an external clock input. The circuit includes an internal oscillator; a clock detection circuit, coupled to the external clock input, for determining whether a clock signal at the external clock input is valid; circuitry for keeping the frequency of the internal oscillator constant until the clock detection circuit determines that an external clock signal is valid; and circuitry for switching the output of the synchronization circuit from the internal oscillator to the external clock input when the clock detection circuit determines than an external clock signal is valid.

Abstract: A two-quadrant chopper including first, second, third and fourth nodes wherein an input voltage may be applied between the first and second nodes, a first output voltage may be picked off between the first and third nodes and a second output voltage may be picked off between the third and second nodes, wherein a first capacitor is between the first and third nodes and a second capacitor is between the third and second nodes, a first transistor and a first diode are connected to the first and fourth nodes, a second transistor and a second diode are connected to the fourth and second nodes, and an inductor is between the third and fourth nodes.

Abstract: A problem of the present invention is to provide a switching power supply device and a pulse width modulation circuit capable of operating stably in synchronization with a clock signal. To solve the problem, a pulse width modulation circuit 3A in a switching power supply device 1A includes square-wave voltage output means 8A for, when an integrated voltage Vn rises to an upper threshold voltage or more, shifting a square-wave voltage VPWM to L level, or when the voltage Vn drops to a lower threshold voltage or less, shifting the voltage VPWM to H level, and clock means 6A for outputting a first clock signal VCL1 and a second clock signal VCL2, which are 180° out of phase from each other.

Abstract: A fully digital synthesizable digital controller (152, 152a) controls a switch-mode DC-DC converter (150, 230, 240, 250, 260) having switching elements (154) and an LC circuit (156, 157) for producing an output voltage (160) that is maintained at a desired level regardless of load changes that can occur on the output. The digital controller (152, 152a) comprises an input stage (164), proportional-integral-derivative (PID) compensator (170), and a digital sigma-delta modulator (172). The input stage (164) produces a difference signal between a reference voltage Vref and a feedback voltage Vfbk, and comprises (i) first and second delta-sigma-delta modulators (178, 180) and a subtractor (182), (ii) a delta-sigma-delta modulator (180) and a subtractor (182); or (iii) a comparator (218). The PID compensator (170) processes the difference signal to compensate for an undesired phase shift and to stabilize the feedback loop.

Abstract: A system includes a multi-phase switching converter and a converter control module. The multi-phase switching converter receives an input voltage and that supplies an output voltage to a load via a plurality of phases. Each phase includes a plurality of switches, an on-time generator module that determines an on-time of the switches, and a switch control module that controls a switching frequency of the switches based on the on-time and a clock signal, and an inductance that connects the switches to the load. The converter control module varies the switching frequency without varying the on-time or varies the on-time without varying the switching frequency when current through the load varies.

Abstract: A method and apparatus are provided for implementing dynamic regulator output current limiting. An input power to the regulator is measured, and the measured input power is related to a regulator output current and a regulator over current trip point, and dynamically used for providing dynamic regulator output current limiting.

Abstract: Exemplary embodiments are directed to a power controller. A method may include comparing a summation voltage comprising a sum of an amplified error voltage and a reference voltage with an estimated voltage to generate a comparator output signal. The method may also include generating a gate drive signal from the comparator output signal and filtering a signal coupled to a power stage to generate the estimated voltage.

Abstract: In a preferred embodiment, a voltage inverter comprises a voltage converter circuit and a controller. The voltage inverter produces a time-varying output voltage from an input voltage, which can be a DC input voltage or an AC input voltage. The controller provides a control signal at a duty ratio determined dynamically by a set of signals. The set of signals include the time-varying output voltage, a predetermined output voltage, a gain factor and an inductor current in the voltage converter circuit. The predetermined output voltage can have an AC waveform or an arbitrary time-varying waveform. The voltage inverter operates to match the time-varying output voltage to the predetermined output voltage. Input-output linearization is used to design a buck inverter, and input-output linearization with leading edge modulation is used to design boost and buck-boost inverters under conditions where left half plane zero effects are present.

Abstract: A voltage-controlled oscillator (VCO) comprises a supply voltage node, configured to receive a supply voltage, a VCO output capacitor, configured to provide an oscillating output voltage across the capacitor, a discharge switch configured to discharge the capacitor according to an oscillation frequency of the oscillating output voltage, and a comparator circuit configured to provide, to a control terminal of the discharge switch, a control signal that is determined based on a comparison of the output voltage and a specified threshold voltage. The oscillating output voltage includes a pulse having a ramp slope that is determined as a function of a magnitude of the supply voltage, and is capable of being adjusted independently of the oscillation frequency.

Abstract: A driving circuit includes first and second switches coupled in series, a delay generating circuit and a delay controlling circuit. The delay generating circuit and the delay controlling circuit are coupled to first and second control terminals of the first and second switches. The delay generating circuit is configured to alternately turn ON the first switch and the second switch in accordance with an input signal and with a delay between successive ON times of the first switch and the second switch. The delay controlling circuit is configured to store a setting of the delay, and control the delay generating circuit to generate the delay in accordance with the stored setting, a first voltage on the first control terminal and a second voltage on the second control terminal.

Abstract: A system and method are provided for controlling a soft-switched modified buck regulator circuit. A voltage (Vx) across or a current through a pull-down switching mechanism within the modified buck regulator circuit is sensed when the pull-down switching mechanism is enabled, where the pull-down switching mechanism is coupled to an upstream end of an inductor and is coupled in parallel with a capacitor. A target time when the pull-down switching mechanism will be disabled (tlf) is computed and the pull-down transistor is disabled at the computed target time.

Abstract: A transition mode power factor correction converter comprising a boost inductor, a switch, a diode, and output tank capacitor, has circuit means of limitation of the off-time interval of the switch to a fraction of the off-time interval, “complementary” to the on-time interval that is normally controlled for regulating the output voltage, during part of a cycle of a rectified sinusoidal voltage waveform input to the converter, when the current flowing in the inductor reaches a maximum threshold, causing the mode of operation of the device to switch from transition mode to continuous current mode for a middle phase angle region of a rectified sinusoidal input voltage waveform, under high load conditions, defined by said maximum current threshold. Current peaks amplitude and ripple are effectively reduced for same output power.

Abstract: A DC-to-DC, converter that can reduce a loss of the converter is provided. The DC-to-DC converter includes an inductor, a switching transistor connected to the inductor, and a controller that drives the transistor. The controller acquires a next step reference value for the DC-to-DC converter in a sampling time Ta. The next step reference value is expressed by an output voltage of the DC-to-DC converter or a flux linkage of the inductor. The controller determines interpolating points between a current state value that corresponds to the current reference value and the next step reference value in a sampling time Ts that is shorter than the sampling time Ta based on a loss of the DC-to-DC converter while changing from the current state value to the next step reference value. The controller supplies to the switching transistor the PWM signals with a duty that corresponds to each of the interpolating points.

Abstract: A power supply control apparatus includes a first adder configured to generate a difference signal based on a target value and a feedback signal; a compensator having a first transfer function Wc(z) and configured to generate a control signal based on the difference signal; a control target having a second transfer function Wp(z) and configured to output an output signal generated in response to the control signal; a disturbance canceller having a third transfer function {l+Wc(z)·Wp(z)}/{Wc(z)·Wp(z)} and configured to generate a disturbance cancelling signal based on the output signal corresponding to a control amount y; a second adder configured to generate a differential disturbance signal based on an output of the first adder and the disturbance cancelling signal; and a filter circuit which generates the feedback signal based on the differential disturbance signal.

Abstract: A power system for providing an output current at a regulated system output voltage includes a first power stage and a second power stage, each being a constant on-time (COT) controlled power converter. The first and second power stages generate respective first and second regulated output voltage having reduced or very small output ripple at a common output voltage node. The first and second power stages each includes a ripple injection circuit to inject a ripple signal to the feedback control circuit in each power stage. The power system further includes a current sharing control circuit configured to measure a first output current of the first power stage and a second output current of the second power stage, and to generate a control signal to modulate the feedback control circuit of the second power stage to force the second output current to equal to the first output current.

Abstract: In one embodiment, a method of forming a ripple suppressor circuit includes a configuring the ripple suppressor circuit to receive a first signal that is representative of a requested voltage and a second signal that is a filtered value of the first signal. The method also includes configuring the ripple suppressor circuit to determine a peak value of the second signal responsively to the first signal and to determine a minimum value of the second signal responsively to the first signal. The method may also include configuring the ripple suppressor circuit to form an average value of the peak value and the minimum value.

Abstract: A digital compensator combines a version of the input voltage with a version of the output current or voltage in such a way as to eliminate dependence on variations in the input voltage.

Abstract: In a digital control power supply, a mode control unit measures a first frequency and a second frequency for a difference between a second digital value and a target value. Based on the measured first frequency and second frequency and a predetermined threshold set to the first and second frequencies, the mode control unit determines whether an amplification factor for use in amplification processing by an amplifier is maintained at a current amplification factor or is changed to an amplification factor which is larger or smaller by 1 than the current amplification factor. This contributes to an improvement in noise resistance of the digital control power supply and prevents an output voltage from being unstable.

Abstract: Disclosed are devices, apparatus, circuitry, components, mechanisms, modules, systems, and methods for virtual output voltage sensing for feed-forward control of a voltage regulator. A buffer has an input coupled to sense a monitored signal indicating a duty cycle of switch circuitry coupled to an output filter of the voltage regulator. The buffer is configured to provide at an output, responsive to the monitored signal, a buffer output signal having a high reference voltage for a high side on time and a low reference voltage for a low side on time of the switch circuitry. A filter is coupled to receive and filter the buffer output signal to provide a feed-forward signal indicating the output voltage of the voltage regulator. Control circuitry is configured to control the switching of the switch circuitry responsive to the feed-forward signal.

Abstract: The invention relates to an apparatus and method for tracking energy consumption. An energy tracking system comprises at least one switching element, at least one inductor and a control block to keep the output voltage at a pre-selected level. The switching elements are configured to apply the source of energy to the inductors. The control block compares the output voltage of the energy tracking system to a reference value and controls the switching of the switched elements in order to transfer energy for the primary voltage into a secondary voltage at the output of the energy tracking system. The electronic device further comprises an ON-time and OFF-time generator and an accumulator wherein the control block is coupled to receive a signal from the ON-time and OFF-time generator and generates switching signals for the at least one switching element in the form of ON-time pulses with a constant width ON-time.

Abstract: Exemplary embodiments are related to a switching voltage regulator. A switching voltage regulator may include a current limit detector configured to detect an over-current condition. The switching voltage regulator may further include a pulse-width modulation (PWM) module coupled to the current limit detector and configured to convey a PWM signal based on a programmed switching frequency and an output voltage and in response to the over-current condition.

Abstract: Aspects of the invention provide a switching power supply in which frequency reduction control in a light load condition both in a power factor correction converter and a DC-DC converter restrains energy loss and achieves optimum efficiency. A switching power supply can include a power factor correction converter and a DC-DC converter. The DC-DC converter can include a load condition detecting means for detecting a condition of the load, and a frequency reducing means for reducing a switching frequency in the DC-DC converter when a light load condition is detected by the load condition detecting means. The power factor correction converter can include a frequency reducing means for reducing a switching frequency in the power factor correction converter corresponding to the load condition detected by the load condition detecting means of the DC-DC converter.

Abstract: A system for managing distribution of electrical power includes a power management circuit, power control units, a first keyline and a second keyline. The power management circuit includes a device configured to measure power consumed by an electrical load, and a comparator comparing the measured power with a power limit. Each power control unit includes an outlet for delivering power to a load; a timing control circuit coupled to each outlet and configured to deliver an enabling signal to each outlet individually with a time delay; a signal input; and a signal output. The first keyline connects the power management circuit with the signal input of one power control unit; the second keyline connects the signal output of that power control unit with the signal input of another power control unit. Each power control unit is configured to propagate a signal to another power control signal via the second keyline.

Abstract: A power supplying device performs both of a suppression of EMI noise and a reduction in an output voltage. In the power supply device, a switching control device that controls a switching element according to a pulse control signal includes a PPM circuit that modulates a pulse position; a PWM circuit that modulates a pulse width; and a pulse generator circuit that generates a pulse modulated by the PPM circuit and the PWM circuit. When a pulse interval of the pulse modulated in the pulse position by the PPM circuit is sparser than the pulse interval of the pulse before the modulation, the PWM circuit lengthens the pulse width. On the contrary, when the pulse interval of the pulse modulated in the pulse position by the PPM circuit is denser than the pulse interval of the pulse before the modulation, the PWM circuit shortens the pulse width.

Abstract: A DC-DC converter, having an output voltage and including at least one electronic switch; first circuitry controlling the output voltage by adjusting a switching frequency of the electronic switch, and second circuitry adjusting the switching frequency toward a target switching frequency when the switching frequency significantly deviates from the target switching frequency.

Abstract: A current control semiconductor device that can detect a current with high precision within an IC of one chip by dynamically correcting a variation in a gain a and an offset b, and a control device using the semiconductor device are provided. A transistor 4, a current-voltage converter circuit 22, and an AD converter 23 are disposed on an identical semiconductor chip. Reference current generator circuits 6 and 6? superimpose a current pulse Ic on a current of a load 2, and vary a voltage digital value output by the AD converter. A gain/offset correction unit 8 subjects a variation in a voltage digital value caused by the reference current generator circuits 6, 6? to signal processing, and dynamically acquires gains a, a? and offsets b, b? in a linear relational expression of the voltage digital value output by the AD converter 23 and a current digital value of the load.

Abstract: In a control method for a buck power converter, an output voltage is generated according to a pulse width modulation signal and an input voltage; an error signal is generated by sampling the output voltage and differencing the sampled output voltage and an output voltage reference; a duty ratio that defines a duty cycle of a pulse width modulation signal is determined by a control law; the pulse width modulation signal is generated by providing the duty ratio to a digital pulse width modulator; a steady state or a load transient is detected; and an average inductor current is monitored and a difference between the average inductor current and a specific inductor current limit is accumulated in order to generate an offset value which is subtracted from the output voltage reference.

Abstract: A switching controller of power converter according to the present invention comprises a PWM circuit and a burst-mode management circuit to reduce the power loss and the acoustic noise of the power converter at light-load. The PWM circuit generates a PWM signal. The burst-mode management circuit receives the PWM signal to generate a switching signal for generating a switching current and regulating the output of the power converter. The burst-mode management circuit further generates a current-limit signal in response to the output of the power converter to limit the switching current for reducing the power loss and the acoustic noise of the power converter when the power converter is at light-load.

Abstract: An integrated circuit includes a delay compensation circuit (221, 222) that further includes a terminal for receiving a varying signal from a circuit external to the integrated circuit; a sampler circuit that samples and holds a present value of the varying signal at each occurrence of a transition in a digital signal; an integrator, coupled to the sampler circuit, that integrates a voltage difference between a sample of the varying signal and a reference signal, and that outputs results of the integration, wherein a time constant of the integrator is greater than a period of the varying signal; a waveform generator that generates a decreasing voltage in response to a transition in a second digital signal; and a comparator that has one input terminal for receiving the decreasing voltage, an inverted input terminal for receiving the results, and an output terminal for outputting a signal that generates an output signal.

Abstract: A converter control arrangement for regulating the output voltage of a dc source power converter connecting an ac system to a HVDC system to enable dc electrical power to be supplied from the ac system to the HVDC system comprises a dynamic droop control device including first and second droop controllers in which the droop rate of the second droop controller is greater than the droop rate of the first droop controller. The converter control arrangement comprises a voltage regulator for regulating the output voltage of the dc source power converter by comparing an output voltage value with a target voltage value derived by combining a reference voltage value and a droop voltage value provided by the dynamic droop control device. The reference current value is the desired output current value of the dc source power converter and defines, in combination with the reference voltage value, a target operating point.

Abstract: A power supply system (10) includes a pulse-width modulation (PWM) system (14) configured to generate a PWM signal. The system (10) also includes a power stage (16) comprising a gate driver (60), a high-side switch, and a low-side switch. The gate driver (60) can be configured to alternately activate the high-side and low-side switches to provide an output signal to a load (12) in response to the PWM signal, and to provide an activation dead-time between the alternate activation of the high-side and low-side switches. The system (10) further includes a digital delay system (18) configured to measure the activation dead-time and to add the measured activation dead-time to the activation of the high-side switch.

Abstract: Dual frequency control of first and second pairs of switches of a buck-boost regulator with pass through band is disclosed. In buck and boost modes respectively a first pair of the switches is operated at high frequency and a second pair of the switches is operated at low frequency. In pass through mode, both pairs of switches are operated at low frequency. Dual frequency control and operation of the pairs of switches enables current sharing between positive and negative power leads in buck, boost and pass-through modes.

Abstract: A method for moving object detection based on a Cerebellar Model Articulation Controller (CMAC) network includes the following steps. A time series of incoming frames of a fixed location delivered over a network is received. A CMAC network is constructed from the time series of incoming frames, where the CMAC network includes an input space, an association memory space, a weight memory space, and an output space. A current frame is received and divided into a plurality of current blocks. Each of the current blocks is classified as either a background block or a moving object block according to the CMAC network. Whether a target pixel of the moving object blocks is a moving object pixel or a background pixel is determined according to an output of the CMAC network in the output space.

Abstract: A digital power supply and power supply controller are presented, including a voltage control loop and a current control loop, with a controller for pulse width modulating a switching power supply according to a voltage control loop duty cycle output or a current control loop duty cycle output, in which the controller selectively presets the voltage control loop duty cycle output to a predetermined value before switching from current loop control to voltage loop control and/or inhibits increase in a voltage loop integrator value during current loop control to mitigate voltage overshoot.