Abstract: A multi-phase power source device capable of easily changing the number of phases is realized. For example, a plurality of drive units POL[1]-POL[4] corresponding to the number of phases are provided, wherein each POL[n] receives a phase input signal PHI[n] serving as a pulse signal, and generates a phase output signal PHO[n] by delaying PHI[n] by a predetermined cycles of a clock signal CLK. PHI[n] and PHO[n] of each POL[n] are coupled in a ring, wherein each POL[n] performs a switching operation with PHI[n] or PHO[n] as a starting point. In this case, each POL[n] charges and discharges a capacitor Cct commonly coupled to each POL[n] with an equal current, and a frequency of CLK is determined based on this charge and discharge rate. That is, if the number of phases increases n times, the frequency of CLK will be automatically controlled to n times.

Abstract: A timing controller includes a controller that controls an operation timing of a controlled unit, and a setting unit that associates a timing obtained by dividing a setting of the operation timing into a plurality of timings, each timing having an identification number, and sets the control unit so that an offset period based on the associated timing is added to the operation timing of the controlled unit.

Abstract: An integrated circuit includes a DC-DC converter, which includes an inductor; a first transistor coupled to the inductor and configured to pass an inductor current to the inductor; and a second transistor forming a current mirror with the first transistor. The integrated circuit further includes an operational amplifier. The operational amplifier includes a first input node and a second input node. The first input node is configured to couple to a drain of the first transistor when the first transistor is turned on, and decoupled from the drain of the first transistor when the first transistor is turned off. The second input node is coupled to a drain of the second transistor.

Abstract: A methodology for regulating power supplied to a powered component based on hardware performance, such as may be used in a system that includes the powered component and a switching regulator (EMU or energy management unit) configured to supply a regulated supply voltage to the powered component. Performance monitoring circuitry generates a performance monitoring signal corresponding to a detected performance level of selected digital operations of the powered component relative to a reference performance level. Switching control circuitry provides a switching control signal in response to the performance monitoring signal. In an example embodiments, the switching control circuitry for the switching regulator (switching transistor) is integrated into the powered component, and the detected performance level corresponds to a detected signal path delay associated with the digital operations of the powered component.

Abstract: A semiconductor switching device includes a power control part, which includes a voltage dropping chopper circuit having a first switching element and a first diode, a voltage boosting chopper circuit having a second switching element and a second diode, and an inductance. And the inductance is connected such that an unusual current caused by the arm short circuit is forced to pass through the inductance.

Abstract: The present invention relates to a method for compensating a current of a DC/DC converter that detects an average value of a pulsatory current that is output as a chopping wave form from an inductor that is used in a DC/DC converter to compensate an offset value in real time. A method for compensating a current of a DC/DC converter can include analyzing a PWM signal for a switching DC-DC converter, if the PWM signal is on, comparing a delay time with a rise half cycle size between a detected current and a real current that is output by an inductor, calculating a current variation amount and determining an offset compensation value for compensating a current variation amount according to the comparison result of the rise half cycle size and the delay time, and applying the offset compensation value to compensate the detected current of the inductor.

Abstract: A system for reducing oscillations on a high voltage bus. The system includes a high voltage battery electrically coupled to the high voltage bus and a DC/DC boost converter electrically coupled to the high voltage bus and a fuel cell stack. The DC/DC converter includes a current controller that selectively controls the current provided by the fuel cell stack. A system controller provides a stack current set-point to the DC/DC converter. The DC/DC converter includes a voltage device that receives a voltage signal from the bus and provides a time derivative of the voltage signal that defines voltage changes on the bus over time. The time derivative signal is provided to a summer that adjusts the current stack set-point to provide a modified current set-point to the current controller that selectively adjusts the current provided by the fuel cell stack to dampen oscillations on the high voltage bus.

Abstract: A voltage supply circuit for providing an output DC voltage from an input DC voltage bus that includes a III-nitride based power semiconductor device series connected between the input DC voltage bus and an output capacitor, which is switchable from an on state to an off state in order to charge up the output capacitor.

Abstract: A switching element having an electromechanical switch (such as an electrically conductive membrane switch, for example a graphene membrane switch) is disclosed herein. Such a switching element can be made and used in a switching power converter to reduce power loss and to maximize efficiency of the switching power converter.

Abstract: An integrated circuit boost regulator design providing selection of either a low power on-chip power component boost regulator circuit or a high power off-chip power component boost regulator circuit using the same integrated circuit device.

Abstract: A bias voltage is compared with a voltage difference in a detecting element according to the present invention. A bias voltage unit is coupled to the detecting element, so that they have a common voltage level to avoid noises when the circuit is operating. Accordingly, the erroneous detection caused by the noise interference can be avoided. Hence, a detecting element with a low resistance, such as an MOEFET, can be used in the present invention to decrease power consumption arisen from current detection and to further increase conversion efficiency.

Abstract: A step-down converter is provided. The step-down converter includes a DC-DC converter including a boost capacitor and an NMOS transistor, the DC-DC converter converting an input direct current (DC) voltage to an output DC voltage; and an electric discharge circuit which adjusts the output voltage to be less than or equal to the input voltage.

Abstract: A system for testing a DC power supply performance includes a load module electrically coupled to the DC power supply, a switch module electrically coupled to the DC power supply, a control module electrically coupled to the load module and the switch module respectively, and an indication module electrically coupled to the control module. The control module includes a judge module and a comparison module. The judge module is configured for receiving DC voltage signals from the DC power supply; wherein the judge module is capable of turning on when the DC power supply is normal. The comparison module is configured for comparing the DC voltage signals with a reference voltage; wherein the comparison module is capable of outputting a control signal when the DC voltage signals are greater than the reference voltage. The indication module is configured for receiving the control signal and indicating status of the DC power supply.

Abstract: A power supply system to provide power for a central processing unit (CPU) includes a bridge circuit, a pulse width modulation (PWM) controller and a pulse adjusting driver circuit. The bridge circuit detects a work state of the PWM controller to obtain a feedback signal output from the PWM controller, and provides the feedback signal to the CPU. The CPU outputs a control signal to the bridge circuit according to a work state of the CPU and the feedback signal, and the bridge circuit outputs a PWM signal to the pulse adjusting driver circuit according to the control signal. The pulse adjusting driver circuit receives a first driving signal provided by an external circuit, and adjusts the first driving signal according to the PWM signal to generate at least one second driving signal to drive the CPU.

Abstract: Methods and apparatuses for providing a solution for incompatibility between nonsinusoidal waveform uninterruptible power supply (UPS) systems and active power factor correction (PFC) loads are disclosed. An embodiment of the invention includes generating a nonsinusoidal signal waveform (e.g., a voltage waveform), to be delivered to the load, with a pulse width modulation (PWM) duty width, sampling the nonsinusoidal signal waveform to collect output signal samples, and adjusting the duty width to control the nonsinusoidal signal waveform as a function of the output signal samples to deliver a desired signal characteristic (e.g., RMS signal level) to the load. In embodiments of the invention, the output duty width is adjusted differently in cases of rising and falling power consumption, respectively, by the load. Techniques disclosed herein find broad applicability in UPS systems and inverters and improve efficiency and reliability for end users and utility providers.

Abstract: A method and apparatus for providing intermittent or interruptible power to an electronic device. The circuit may provide power upon user initiation and interrupt that power in response to a user command, fault state, period of inactivity and so forth. As one example, interruptible power may be initially provided to activate or “power up” an electronic device and constant power provided after the initial activation. The initial powering up of the device may be facilitated by closing two contacts. The circuit may continue to provide power after the button is released through a monitoring and/or feedback mechanism.

Abstract: A low noise step-down converter includes a rectified voltage output, a pulse generator, a rectifying diode, a rectifying inductor, a rectifying capacitor, and an impedance element. The rectified voltage output is provided for outputting a converted voltage. The pulse generator includes a pulse wave output. The pulse generator receives an input voltage and outputs a pulse wave through the pulse wave output. The rectifying diode is reversely coupled to the pulse wave output. One end of the rectifying inductor is connected to the pulse wave output for receiving the pulse wave while the other is connected to the rectified voltage output. One end of the rectifying capacitor is connected to the rectified voltage output, and the other end is electrically grounded. The impedance element at least provides resistance impedance and inductance impedance, wherein the rectifying diode and the impedance element are connected in series and are electrically grounded.

Abstract: A switch mode power supply (SMPS) response to a disturbance is improved by using a hysteretic control in combination with a fixed frequency, pulse-width modulated (PWM) controller for providing robust control and optimizing the response to disturbances in buck or buck derived switch mode power supply (SMPS) system topologies.

Abstract: A system includes power saving circuitry to revive a system controller from a sleep mode for performance of operations in an active mode. The system also includes a regulator including a floating gate reference device to generate output voltage and current capable of powering the power saving circuitry during the sleep mode. A method includes generating a reference voltage and current with a float gate device, and powering wake-up circuitry with the reference voltage and current while in a power saving mode. The wake-up circuitry is configured to activate a main system controller from the power saving mode.

Abstract: An output voltage adjustment circuit for buck circuits includes a microcontroller, first to eighth keys, and a display unit. The first to eighth keys input voltage adjustment signals to the microcontroller. A first input pin of the microcontroller is connected to a voltage output terminal. A second resistor is connected between the first input pin of the microcontroller and ground. A first to a sixth input/output pin of the microcontroller are connected to the display unit. A first to an eighth output pin of the microcontroller are connected to a pulse width modulation (PWM) controller. The first to eighth keys are selectively activated to provide voltage adjustment signals to the microcontroller, sampling output voltages of the voltage output terminal, comparing with a predetermined voltage, controlling the PWM controller to fine tune the duty cycle to output a stable voltage from the voltage output terminal. The display unit displays the voltages on the voltage output terminal.

Abstract: A voltage regulator includes an active control switch, an active sync switch, a driver circuit, and a gate resistor. The active control switch is coupled between an input voltage line and an input of an energy storage device. The active sync switch is coupled to the input of the energy storage device. The driver circuit is coupled to the control and sync switches to alternately drive each of the control and sync switches into a conducting state to produce a regulated voltage at an output of the energy storage device. The gate resistor is coupled in series within a control path of the sync switch. The gate resistor has a resistance value that is tuned to reduce an anticipated dead time between a turn-off time of the sync switch and a turn-on time of the control switch.

Abstract: A liquid crystal display device includes a back light assembly that emits light on a liquid crystal panel; and an inverter that controls brightness of the light emitted from the back light assembly according to a difference between video data of at least three frames that are sequentially inputted to the liquid crystal panel.

Abstract: A method and apparatus for providing intermittent or interruptible power to an electronic device. The circuit may provide power upon user initiation and interrupt that power in response to a user command, fault state, period of inactivity and so forth. As one example, interruptible power may be initially provided to activate or “power up” an electronic device and constant power provided after the initial activation. The initial powering up of the device may be facilitated by closing two contacts. The circuit may continue to provide power after the button is released through a monitoring and/or feedback mechanism.

Abstract: Techniques for mitigating interference from a switching voltage regulator by intelligently varying the switcher frequency of the switching voltage regulator are provided. In one aspect, the switcher frequency is set by adjusting a frequency setting input to a programmable clock divider. In a further aspect, a processor drives a programmable clock divider which receives a value representative of a dividing factor by which to divide a reference clock frequency signal to generate a desired switcher frequency for the switching voltage regulator. Values of the programmable clock divider are selectively varied to achieve optimal performance and mitigate the effect of switcher frequency spurious content for a given operating condition or conditions.

Abstract: A converter for converting a DC input voltage includes two input lines receiving the DC input voltage; at least one normally off semiconductor switch which is not conductive without application of a control voltage to its gate and which is provided in one of the input lines. The converter also includes electric circuitry connected between the input lines and including at least one normally on semiconductor switch which is conductive without application of a control voltage to its gate; and a controller. In operation of the converter, the controller operates the at least one normally on semiconductor switch of the electric circuitry by temporarily applying a first control voltage to its gate; and permanently applies a second control voltage to the gate of the at least one normally off semiconductor switch in the one input line. Any normally on semiconductor switch of the electric circuitry is spatially separated and thus thermally isolated from any normally off semiconductor switch.

Abstract: A load controller includes: an input circuit which detects that a drive instruction signal is less or equal to a first input threshold value; a constant current source activated in accordance with a detection by the input circuit; a PWM signal generating unit that is activated by the constant current source and generates a PWM signal; a comparator that is activated by the constant current source and compares the drive instruction signal with a second input threshold value set to be lower than the first input threshold value; a logic calculation unit that carries out a logic calculation of the PWM signal with a compared result of the comparator; a drive control unit that operates in accordance with an output from the logic calculation unit to generate a PWM drive control signal; and a load driving element that is driven by the PWM drive control signal to control a load.

Abstract: A power conversion system and power control method for reducing cross regulation effect uses a voltage feedback adjustment circuit to modulate an error signal fed back from an output voltage so as to predict the energy of an output corresponding to its load states. While the energy delivered to an output terminal with its load remaining the same does not change, the energy delivered to an output terminal with its load changing is adjusted accordingly. The power conversion system thus effectively reduces the cross regulation effect and obtains excellent steady system output and transient response.

Abstract: The present invention discloses a voltage mode switching regulator with improved light load efficiency and mode transition characteristic, and a control circuit and a control method therefor. The switching regulator can switch between a pulse width modulation (PWM) mode and a pulse skipping mode. The control method for the switching regulator comprises: comparing a feedback signal relating to an output voltage with a reference signal, to generate an error amplification signal; generating a duty signal according to the error amplification signal and a ramp signal, to control the switching regulator; setting a threshold level of the error amplification signal and a threshold level of the pulse skipping mode according to the error amplification signal in a stable status; and when the error amplification signal is close or equal to the threshold level of the pulse skipping mode, generating a pulse skip signal to enter the pulse skipping mode.

Abstract: A light-emitting diode (LED) driver circuit is provided, which includes a transistor, a current regulator, a release diode, and a voltage clamping device. The transistor is coupled in series with an LED string. The LED string is coupled between the transistor and a bus voltage. The current regulator is coupled to the transistor for regulating the current through the transistor and the LED string to a predetermined current. The release diode has an anode coupled between the LED string and the transistor. The voltage clamping device is coupled to the cathode of the release diode for clamping the voltage level at the cathode of the release diode to a predetermined voltage. The voltage clamping device protects the transistor from breakdown when the transistor is turned off for dimming control.

Abstract: A power conversion circuit and method of formation is provided, which in one embodiment includes a transistor, a driver circuit having an output connected to a control electrode of the transistor and having a bootstrap port configured to be connected to a first terminal of a capacitor; a switch circuit having a first port connected to a current carrying electrode of the transistor and having a ground port connected to a ground, a capacitor port configured to be connected to a second of the capacitor, a first switch configuration in which the capacitor port is connected to the first port, and a second switch configuration in which the capacitor port is connected to the ground port.

Abstract: A system and method for controlling the output voltage of a power supply that includes a control section and an interconnect section having an output point. A voltage regulator provides a control section voltage, and a current measurement device measures a control section current and generates a current signal. A controller receives the current signal and a voltage command signal representing a desired output voltage at the output point of the interconnect section. The controller generates an adjusted voltage command signal based on the voltage command signal representing the desired output voltage, the current signal, a control section internal resistance and an interconnect section external resistance. The voltage regulator receives the adjusted voltage command signal and provides a control section voltage based thereon in order to supply an output voltage at the output point that is substantially equal to the desired output voltage.

Abstract: A high frequency power supply, in particular a plasma supply device, for generating an output power greater than 1 kW at a basic frequency of at least 3 MHz with at least one switch bridge, which has two series connected switching elements, wherein one of the switching elements is connected to a reference potential varying in operation, and is activated by a driver, and wherein the driver has a differential input with two signal inputs and is connected to the reference potential varying in operation.

Abstract: A tester includes a device under test (DUT) power supply (DPS) with and input and output includes an amplifier configured to set an output voltage of the DPS output equal to an input voltage for the DPS. The DPS has a first output stage coupled to the amplifier and configured to source and sink current at the output of the DPS between a first voltage rail and a third voltage rail. The DPS has a second output stage coupled to the amplifier and configured to source and sink current to the output of the DPS between a second voltage rail and the third voltage rail. A selection device is configured to enable the first and second output stages based on a selection input signal. The selection device is situated outside of the first and the second output stages.

Abstract: Upon detecting an external signal which instructs to stop discharge, an input voltage equal to or less than a set value for the prevention of overdischarge, or an output voltage equal to or more than a set value for the prevention of output of an overvoltage, a control unit (12) stops discharge to a load (40) by opening a switching element (4b) of a step-down unit (11b). Upon detecting that an external signal is reset or an input voltage equal to or more than a set value larger than the set value for the prevention of overdischarge, the control unit (12) resumes discharge to the load (40) by setting the switching element (4b) in a switching operation state or short-circuiting it.

Abstract: An output voltage adjustment circuit for buck circuits includes a microcontroller, first to eighth keys, and a display unit. The first to eighth keys input voltage adjustment signals to the microcontroller. A first input pin of the microcontroller is connected to a voltage output terminal. A second resistor is connected between the first input pin of the microcontroller and ground. A first to a sixth input/output pin of the microcontroller are connected to the display unit. A first to an eighth output pin of the microcontroller are connected to a pulse width modulation (PWM) controller. The first to eighth keys are selectively activated to provide voltage adjustment signals to the microcontroller, sampling output voltages of the voltage output terminal, comparing with a predetermined voltage, controlling the PWM controller to fine tune the duty cycle to output a stable voltage from the voltage output terminal. The display unit displays the voltages on the voltage output terminal.

Abstract: In one embodiment, a multi-phase power supply controller is configured to an operating status signal and responsively inhibit the PWM controller from forming at least one PWM drive signal of a plurality of PWM drive signals.

Abstract: A switching power supply system has a control circuit that controls an output voltage by causing a switching device to turn ON and OFF. The control circuit includes a control pulse supplying unit that supplies a pulsed signal that keeps the switching device turned-ON and -OFF. A protection circuit shuts down the switching power supply system upon occurrence of an abnormality. A delay circuit produces a delay signal that delays by a specified time duration the termination of a state of the pulsed signal in which the pulsed signal keeps the switching device turned-ON. The protection circuit is responsive to the pulsed signal or the delay signal to switch between an operation state and a stand-by state.

Abstract: The present invention provides a programmable low dropout linear regulator using a reference voltage to convert an input voltage into a regulated voltage according to a control signal. The programmable low dropout linear regulator includes an operational amplifier having a negative input coupled to receive the reference voltage, a first transistor having a gate coupled to an output terminal of the operational amplifier and a first source/drain coupled to an output terminal of the regulated voltage, a first impedance coupled between a positive input of the operational amplifier and the output terminal of the regulated voltage, and a second impedance coupled between the positive input of the operational amplifier and a ground. The second impedance includes a second transistor having a gate coupled to receive the control signal.

Abstract: A phase locked loop is used to synchronize the switching frequency of a high frequency switching power converter to a clock signal. A switching power converter integrated circuit is a tile-based power management unit and includes an oscillator and multiple tiles of switching power converters. The oscillator generates a clock signal having a clock frequency. A first switching power converter includes a switch and a phase locked loop and switches at a first frequency. The switch has a gate that receives a gate signal. The phase locked loop synchronizes the first frequency to a first integer multiple of the clock frequency. A second switching power converter switches at a second frequency that is a second integer multiple of the clock frequency. The first frequency is synchronized to a multiple of the clock frequency when a second edge of the gate signal coincides with a first edge of the clock signal.

Abstract: A system involves LED strings and programmable current source circuits (CSC). An LED current flows through each LED string. Each LED current is controlled by an associated programmable CSC. In one embodiment, the CSCs form a chain. A first CSC uses a reference current for calibration, and thereafter supplies the reference current to the next CSC. When the next CSC detects the reference current, it uses the reference current for calibration. CSCs are calibrated one by one down the chain. In a second embodiment, each CSC can receive the reference current from a common conductor. If the common conductor is detected to be available, then the CSC uses the reference current for calibration. When the conductor is in use, the other CSCs detect the conductor as unavailable and do not attempt to self-calibrate. The CSCs use the reference current one by one, but in an order that changes over time.

Abstract: A power controller includes a digital control circuit which performs a digital control on a basis of a difference between an output voltage supplied to a power control target device and a voltage reference, so that the output voltage is equal to the voltage reference, and a processor control circuit which conducts an operation of a processor in the digital control circuit, in response to a change of a control signal supplied by the power control target device and indicating a state of a load in the power control target device, which monitors an output from the digital control circuit, and which stops the operation of the processor when the load is judged to have no change.

Abstract: An open loop modulation network for a voltage regulator including a latch network, an output sense network, a timing network, and pulse control logic. The latch network latches assertion of a pulse control signal and provides a corresponding latched control pulse indication. The output sense network detects initiation of an output pulse and provides a corresponding output pulse indication. The timing network initiates a delay period in response to the output pulse indication and resets the latched control pulse indication after expiration of the delay period. The pulse control logic terminates the output pulse after the latched control pulse indication is reset and the pulse control signal is negated, whichever occurs last. Very narrow input pulses are detected and either a minimum output pulse is generated or the output pulse is based on the pulse control signal.

Abstract: Combined type transformer includes: a transformer core; first and second coils provided with respect to the transformer core; first and second inductor cores provided around the first coil; and third and fourth inductor cores provided around the second coil. The transformer core and the first and second coils constitute a transformer, the first coil and the first and second inductor cores constitute a first inductor, and the second coil and the third and fourth inductor cores constitute a second inductor.

Abstract: A switching regulator: first switching element and second switching element; a logic unit which outputs to the load the output voltage converted from the input voltage to the constant voltage, by causing the first switching element and the second switching element to perform a switching operation; an error amplifier which outputs first signal indicating an error between the output voltage and the first reference voltage; first comparator which inputs the first signal and second signal indicating an output voltage that is proportional to load current flowing in the load, and outputs to the logic unit control signal causing the logic unit to perform the switching operation based on the first signal and the second signal; and a correction unit which is connected to an input side of the error amplifier, and corrects an input voltage of the error amplifier to reduce the input voltage to a certain value or lower.

Abstract: A wireless system includes a radio and a voltage regulator, which provides a supply voltage to the radio. The voltage regulator includes a storage element, at least one switch that is coupled to the storage element and a controller. The controller operates the voltage regulator in a continuous mode of operation, operates the voltage regulator in a discontinuous mode of operation in response to an output current of the voltage regulator decreasing below a predetermined threshold; operates the switch(es) to energize the storage element in response to a detection of whether an output voltage is below a threshold level; operates the switch(es) to halt the energization of the storage element in response to detecting a current in the storage element reaching a predetermined current threshold; operates the switch(es) to energize and de-energize the storage element in the discontinuous mode of operation; and operates the switch(es) to energize the storage element in synchronization with a periodic clock signal.

Abstract: A motherboard and a power supply module thereof are disclosed. The power supply module provided by the invention can be directly fixed on a motherboard supporting an AM2 CPU and an AM2+ CPU. The power supply module provided by the invention utilizes a switching unit to switch between a group of pulse width modulation (PWM) signals for generating core voltages needed by an AM2 CPU and another PWM signal for generating a core voltage needed by an AM2+ CPU according to a version signal provided by the CPU of the motherboard. Therefore, no matter a CPU socket of the motherboard receives the AM2 CPU or the AM2+ CPU, the power supply module of the invention can obtain the maximum usage efficiency thereof, and the manufacture cost of motherboard with the power supply module decreases.

Abstract: A power interface enables a low-power device to be powered from an alternating current (AC) wall receptacle or light socket with automatic backup battery charging. The power interface of an embodiment comprises a transformer module that receives an input signal. The device includes a battery module coupled to the transformer module, and the battery module includes battery charging circuitry coupled to a battery. The device comprises an output controller coupled to the transformer module and the battery module. The output controller includes detector circuitry that detects a state of the input signal. The output controller automatically controls coupling of one of a transformer module output and a battery module output to a device output according to the state of the input signal.

Abstract: An amplitude, phase and frequency modulator circuit is provided with the circuit containing a periodically driven switch. The circuit connects a DC power source and a resistive load. Periodic operation of the switch generates a square-wave of voltage across the load. A transistor used as a switch is embedded in a switch driver that controls base current and base-emitter reverse bias voltage. The modulator DC input resistance is approximately equal to the load resistance when the switch ON-state period and OFF-state period are approximately equal. The modulator efficiency is nearly one hundred percent. The frequency response of the square-wave modulator system is high-pass with a lower cutoff frequency determined by element values.

Abstract: A LED driving circuit includes a bridge rectifier, a high-bias-voltage diode, a balancing capacitor, a driving chip, and a switch. The bridge rectifier receives external AC power and outputs a full-wave or half-wave AC power. One terminal of the high-bias-voltage diode and one terminal of the balancing capacitor are electrically coupled to a balancing node. The other terminals of the high-bias-voltage diode and the balancing capacitor are electrically coupled to the bridge rectifier and grounded respectively. The driving chip receives operating power from the balancing node, and outputs driving signals to operate the switch, so as to drive an LED. Through the arrangement of the forward bias voltage direction of the high-bias-voltage diode, the balancing capacitor is only discharged to the driving chip. Therefore, the capacitance value and the volume of the balancing capacitor, the space occupied by the driving circuit, and the cost of the driving circuit are reduced.

Abstract: A current-loop output circuit for an industrial controller provides for low power dissipation and reduced part count by driving current loads of different resistances directly from a switched voltage source. Proper filtering and design of a feedback loop allows the necessary transient response times to be obtained.