Abstract: Disclosed is a switching-type constant current power supply, which comprises an alteration circuit 9 provided on the output side of a power conversion circuit 3 together with a voltage detection circuit 7, and a feedback circuit 8 provided between the voltage detection circuit 7, a current detection circuit 5 and a control circuit 4. The alteration circuit 9 is operable, during a current flow period where a load current IL is flowing, to set the signal level of a second feedback signal F2 at a value less than a reference voltage Vref to be supplied to a common error amplifier EA1 in a control circuit 4, and operable, during a current cut-off period where the load current IL is not flowing, to set the signal level of the second feedback signal F2 at a value greater than the reference voltage Vref.

Abstract: A load drive control apparatus comprises a drive control circuit and a mode switchover circuit. The drive control circuit, which operates under a driving power, for driving/controlling a load on a control signal. The drive/control of the load includes an overheat protection control with a hysteresis characteristic carried out on a temperature of a component of the drive control circuit and/or the load. The overheat protection control involves a drive-limiting operation to stop a drive of the load. The mode switchover circuit switches over the drive control circuit between a normal mode and a stand-by mode responsively to the control signal. The stand-by mode is less in driving power consumption than the normal mode. The stop of the drive of the load is maintained during the drive-limiting operation whatever the control signal indicates, as long as the temperature is higher than a lower limit of the hysteresis characteristic.

Abstract: A selector sets respective phases of pulse driving signals in reverse when a proportion signal or integration signal does not exceed a threshold. Shifting the respective phases of the pulse driving signals from each other lowers the ripple voltage. When the load current increases drastically, the output voltage Vo tends to decrease remarkably because of the shortage of capacity in the power supply. In this case, when the proportion signal or integration signal exceeds its corresponding threshold, a phase control unit causes the pulse driving signals to synchronize their phases, i.e., the selector supplies the same ramp wave to the comparators, so that respective output voltages supplied from the DC voltage converter circuits attain the same phase, thereby restraining the output voltage supplied to the load from decreasing remarkably.

Abstract: A DC converter with a halt mode setting is disclosed for preventing the occurrence of over-current while alleviating the increase in the size of circuits, along with a method for setting up such a halt mode. The DC converter includes a semiconductor switch, a clock generator for outputting a clock signal to a gate of the semiconductor switch to be utilized for controlling an on/off time of the semiconductor switch such that a predetermined power is output from the generator, and a drive circuit for switching the semiconductor switch to the continuous-on state according to a halt mode setting requirement regardless of the clock signal, when the semiconductor switch, normally repeating on/off operations responsive to the clock signal, is in its off-state.

Abstract: There are provided a control circuit of a DC—DC converter of a synchronous rectification system which can realize rapid lowering of an output voltage with low power consumption at the stop of power supply, and a control method thereof. While a power supply stop signal is at low level, a control part controls an NMOS transistor according to the output signals of a comparator and a flip-flop circuit. While the power supply stop signal is at high level, the control part masks a reverse current detection signal and the output signal of the flip-flop circuit to control the NMOS transistor according to a detection signal of a comparator. When a choke coil current is reversely flowed and an output voltage is lowered to an output reference voltage corresponding to a reference voltage, the NMOS transistor is brought to the non-conductive state to regenerate the electric power to an input terminal.

Abstract: In one aspect this invention provides a DC-DC converter that has a switch mode part for coupling between a DC source and a load, the switch mode part providing x amount of output power; and that further has a linear mode part coupled in parallel with the switch mode part between the DC source and the load, the linear mode part providing y amount of output power, where x is preferably greater than y, and the ratio of x to y may be optimized for particular application constraints. In a further aspect there is a radio frequency (RF) transmitter (TX) for coupling to an antenna, where the TX has a polar architecture having an amplitude modulation (AM) path coupled to a power supply of a power amplifier (PA) and a phase modulation (PM) path coupled to an input of the PA, where the power supply includes the switch mode part for coupling between a battery and the PA and the linear mode part coupled in parallel with the switch mode part between the battery and the PA.

Abstract: Power is applied to a voltage supply. A signal that indicates reduced work capability in an integrated circuit (IC) that is being powered by the voltage supply is generated based on workload demand or conscious power and performance tradeoffs. This signal is applied to increase the power efficiency of the voltage supply, while the supply is powering the IC in its reduced work capability state.

Abstract: System for providing a switched regulator with an adjustable operating frequency range. A preferred embodiment comprises a voltage supply and a load, a switch and filter block (SFB) (such as the SFB 510), a comparator (such as the comparator 520), and a fixed off time logic (FOTL) (such as the FOTL 525). The comparator compares an output voltage with a reference voltage. When the output voltage is equal to or exceeds the reference voltage, the comparator asserts a value on a signal line to the FOTL. The FOTL then shuts down the SFB for a specified period of time. During the off time, the output voltage decays. After the specified period of time expires, the SFB is turned back on and the output voltage can recharge. The duration of time that the SFB remains on is a function of the supply voltage, thus permitting an adjustable operating frequency.

Abstract: A power supply of one embodiment of the invention is disclosed that includes a conversion mechanism and a feedback mechanism. The conversion mechanism is to control conversion of a first direct current (DC) signal from to a second DC signal provided to an electronic device by switching the first DC signal to vary the second DC signal. The feedback mechanism is to cause the switching control mechanism to operate in a nominal-power mode or a reduced-power mode according to a control signal received from the electronic device. The conversion mechanism is caused in the reduced-power mode to lessen at least one of the duty cycle and the frequency at which the first DC signal is switched until the voltage of the second DC signal decays to a first voltage level.

Abstract: A method and apparatus for detecting output current in switching power supplies forgoes the need for any resistor or other components in series with the load. A method according to the invention includes the steps of inferring the peak current through the inductor as a function of input voltage and inductor charge time, and deriving the current available to the load based upon the flyback voltage during discharge of the inductor. Although a disclosed example is based upon a buck/boost topology, other converter topologies are anticipated. In terms of apparatus, in a switching power supply of the type wherein a switching device is used to charge an inductor that discharges to a load, the invention provides devices arranged for detecting output current without the need for a resistor or other component in series with the load.

Abstract: A power supply comprising a switching converter capable of being controlled by a control signal to provide a desired output from a DC input voltage, an analog to digital converter receiving as analog inputs a gate drive voltage of at least one switch of the switching converter, a temperature related measurement of the switching converter, the DC input voltage and an output current of the switching converter and converting the analog inputs to digital input signals, a digital processor receiving the digital input signals and generating the control signal to drive at least one switch of the switching converter to drive the output of the switching converter to the desired output and a memory storing data relating the digital input signals to the desired output of the switching converter and providing to the digital processor a memory output signal to enable the processor to generate the control signal to drive the at least one switch to provide the desired output from the switching converter.

Abstract: Briefly, in accordance with one embodiment of the invention, an integrated circuit has a voltage regulator and a clock divider that may be used to adjust the operational frequency and/or voltage potential of the integrated circuit to reduce the power consumption of the integrated circuit while in operation.

Abstract: A DC converter with a halt mode setting is disclosed for preventing the occurrence of over-current while alleviating the increase in the size of circuits, along with a method for setting up such a halt mode. The DC converter includes a semiconductor switch, a clock generator for outputting a clock signal to a gate of the semiconductor switch to be utilized for controlling an on/off time of the semiconductor switch such that a predetermined power is output from the generator, and a drive circuit for switching the semiconductor switch to the continuous-on state according to a halt mode setting requirement regardless of the clock signal, when the semiconductor switch, normally repeating on/off operations responsive to the clock signal, is in its off-state.

Abstract: A power supply system prevents the output voltage from dropping during the changeover of the power source from a series regulator to a DC-DC converter. The power supply system has two types of power sources, a DC-DC converter and a series regulator that are connected parallel to each other. The first switching element of the DC-DC converter transfers the input voltage to the load. The second switching element connects the load to the ground. The control circuit turns ON and OFF the first and second switching elements on receipt of a first selection signal so that the number of turn-ONs of the second switching element gradually increases. This suppresses the current from flowing backward through the second switching element SW2 to the ground while the power source is changing over, preventing drop in the output voltage.

Abstract: A reference voltage register stores a reference value Vref indicating the output voltage Vout of a power supply circuit. A digital filter amplifies the difference between the output voltage Vout from the power supply circuit and the reference value Vref stored in the reference voltage register. A pulse width computation unit computes the duty such that the output voltage Vout matches the reference value Vref, and generates the on-time of a pulse signal corresponding to the duty. A reference value operation unit updates the reference voltage register depending on the output current from the power supply circuit or the temperature around the power supply circuit.

Abstract: A DC to DC power converter includes synchronous rectifiers which respond to a control waveform. Negative current from a load into the power converter is prevented by increasing the converter output voltage at a minimum current limit. The synchronous rectifiers may be held off in response to decision logic by activation of a hold-off circuit connected to a control terminal of a synchronous rectifier or of an ORing transistor at the converter output. When the synchronous rectifier is subsequently enabled, its control waveform may be increased slowly relative to the switching cycle.

Abstract: A device to control a 3-phase motor having an inverter connected to each phase terminal and a brake to arrest the 3-phase motor, includes a power supply to supply power to the brake and the inverter at the same time based on a predetermined synchronization signal. The device also includes a control unit to output an inverter control signal to control the inverter and a power control signal to enable the power supply to supply the power to the brake and the inverter. Thus, the device to control a 3-phase motor has an immediate response to a control signal with a reduced production cost and a system size, by reducing circuit components such as a brake relay and a brake power supply.

Abstract: This power converter comprises a plurality of switching elements, an inductor, and a smoothing capacitor. An input current of low frequency from the AC source is intermitted by the switching element turned on and off at high frequency, and an output current to a load is restricted by the inductor. These switching elements are controlled in different patterns. While these patterns are repeated, a current is always supplied to the load and inductor. Therefore, the power converter can provide a desired output power, making the inductance required for the inductor into the minimum. That is, the power converter can combine miniaturization and high-efficiency.

Abstract: Several novel zero voltage switching (ZVS) cells and a ZVS dc to dc transformer circuit are revealed. A U core transformer structure for use with the dc to dc transformer circuit is also revealed. An optimal gate drive circuit that achieves optimal switch timing for ZVS switches is revealed. The optimal gate drive circuit achieves optimal timing for the case in which there is sufficient energy available to drive a zero voltage transition and also for the case in which there is insufficient energy to drive a zero voltage transition providing turn on current to the switch at the minimum drain voltage of the switch. A magnetically coupled multi-phase converter cell structure is revealed which achieves reduced switch ripple current and fast transient response for multi-phase systems with three or more cells. A ZVS active reset switch drive scheme is revealed for providing zero voltage switching in bi-directional power flow converters for both directions of power flow using a single active reset circuit.

Abstract: A DC-DC conversion type power supply unit has an error amplifier for feeding back the output voltage of the unit to one input terminal of the error amplifier during a startup of the unit. The input terminal is once fixed to a prohibition voltage that prohibits the output of the unit from being outputted therefrom for a predetermined period of time to charge up a feedback condenser. After the period, the feedback condenser discharges its electric charge to gradually raise the voltage of the input terminal to the reference voltage of the power supply unit, thereby allowing a soft start of the power supply unit without changing the reference source voltage of the unit.

Abstract: An integrated assembly includes a power converter module having an input bus bar, an output bus bar, an n-level converter and driver circuitry adapted to control the n-level converter, in response to received control signals. The n-level converter switches between a pair of voltage levels selected from a set of n levels, where n≧3. The integrated assembly also includes a controller providing the control signals to the driver circuitry, and fiber optic lines connecting the driver circuitry of the n-level converter to the controller. The integrated assembly includes DC-DC switching power supply, having an input for receiving a DC input voltage, for generating a DC output voltage and providing it to a load. The switching power supply includes controlled switching devices, each having an input terminal and an output terminal. Each of the controlled switching devices receives a portion of the DC input voltage and each has a voltage-rating characteristic that is less than the DC input voltage.

Abstract: Power is applied to a voltage supply. A signal that indicates reduced work capability in an integrated circuit (IC) that is being powered by the voltage supply is generated based on workload demand or conscious power and performance tradeoffs. This signal is applied to increase the power efficiency of the voltage supply, while the supply is powering the IC in its reduced work capability state.

Abstract: There is intended to provide an overvoltage-protective device capable of protecting a power system from overvoltage not destructively without using a fuse. An alarm signal from an MOS transistor Tr3, a structural element of a DC/DC converter 21, is inputted to a switching circuit 55, a structural element of the AC/DC converter 11. In case an alarm signal keeps high-level potential without indicating overvoltage-state, the switching circuit 55 connects a output current detecting circuit 53 having the smaller gain G1 to an output voltage detecting circuit 50 as well as a feedback circuit 51A, thereby to set large output-power-supply capability. In case an alarm signal inverses to low-level potential indicating overvoltage-state, the switching circuit 55 connects a output current detecting circuit 54 having the larger gain G2 to the output voltage detecting circuit 50 as well as the feedback circuit 51A, thereby to set small output-power-supply capability.

Abstract: Briefly, in accordance with one embodiment of the invention, an integrated circuit has a voltage regulator and a clock divider that may be used to adjust the operational frequency and/or voltage potential of the integrated circuit to reduce the power consumption of the integrated circuit while in operation.

Abstract: The invention relates to a system for wireless power transmission, which makes it possible to generate an increased voltage on the receiver side using a radio signal that is optimized for this purpose and thereby permits operation particularly of digital semiconductor components in the receiver even if the receiver does not have a power supply of its own.

Abstract: Briefly, in accordance with one embodiment of the invention, an integrated circuit has a voltage regulator and a clock divider that may be used to adjust the operational frequency and/or voltage potential of the integrated circuit to reduce the power consumption of the integrated circuit while in operation.

Abstract: An SMPS converter with an inductor connected in series to the standard inductor present in the output filter to form an inductive divider supplying an intermediate voltage having an amplitude greater than the output voltage. The intermediate voltage is supplied to a capacitor that stores the voltage during the conduction phase of the integrated circuit that forms the switch of the converter and transfers the voltage during opening of the integrated circuit to a capacitor connected between the output and the supply input of the integrated circuit.

Abstract: According to one embodiment, a computer system is disclosed. The computer system includes a central processing unit (CPU) and a voltage regulator coupled to the CPU. The voltage regulator operates at a variable switching frequencies based upon the status of a feedback signal which indicates load transient events.

Abstract: Bang or bang-bang control is applied to interleaved power converters. With the bang control on, oscillator signals applied to the power converters are overridden in order to change the power output of both power converters. When the override is removed, both oscillating signals continue from points in their cycles at which they were overridden. An oscillator may be frozen during override by interrupting the charging and discharging of a capacitor in the oscillator.

Abstract: An apparatus is provided to suppress an increase in the ripple voltage inevitable in a conventional switching power supply device used at low temperatures. A switching power supply device is provided that has a DC—DC converter that receives an input voltage and outputs a varying voltage by varying the ratio of on periods to off periods of a switching transistor. An error amplifier compares the output voltage of the DC—DC converter or a divided voltage thereof with a reference voltage and outputs an error voltage. An operator produces a pulse signal according to the error voltage and controls the switching transistor with the pulse signal. A gain control circuit varies the gain of the error amplifier according to at least one of the duty factor of the pulse signal and the ambient temperature.

Abstract: There is disclosed an adaptive voltage power supply that finely adjusts VDD to an optimum level. The adaptive voltage power supply comprises: 1) a first charging circuit capable of increasing a reference voltage on a charge capacitor in response to receipt of a first VDD control signal; 2) a second charging circuit capable of decreasing the reference voltage on the charge capacitor in response to receipt of a second VDD control signal; and 3) a power supply capable of receiving the reference voltage on the charge capacitor and generating an output power level, VDD, determined by a level of the reference voltage.

Abstract: A transistor (48) is switched on or off to thereby cause a counter electromotive force on a coil (42) so that a high voltage is charged to a capacitor (46) via a zener diode (44). As a breakdown current of the zener diode (44) flows to the ground via the transistor (48), a voltage lower than a predetermined voltage is applied to the transistor (48). In addition, as the breakdown current of the zener diode (44) does not flow directly to the ground, variance of a boosted voltage can be prevented.

Abstract: A new ZVS (zero-voltage-switching) snubber circuit suitable for high power boost converters used as power factor correction circuits used in AC-to-DC modules. The ZVS circuit comprises a main switch, an auxiliary switch, a load circuit, a reset circuit, a first diode, a blocking diode, and a first capacitor. The switches and the capacitor are connected in parallel. The circuit includes a blocking diode having an anode terminal connected to a drain terminal of the auxiliary switch and a cathode terminal connected to the reset circuit. At turn-off, the current tail of the main switch is taken over by the auxiliary switch. The ZVS circuit keeps the collector-emitter voltage of main switch almost zero, so that the turn-off loss is minimized.

Abstract: A drive with a high impedance input, low impedance output is created. When a switching or driving action requiring the sourcing and sinking of current from a common node in a wide frequency range is desired, the invention allows the creation of a simple, efficient, two switch drive system that functions across a wide range of conditions. The circuit uses a discrete N-Channel FET paired with discrete PNP transistors. A high impedance input node is formed by connecting the FET gate to the transistor base. The differential threshold voltage that exists between the FET gate and the transistor base prevents the two devices from generating conflicting currents at the output node formed by the common source emitter. The circuit further lends itself to output waveform variations as may be required for various drive strategies by manipulating the input signal processing to custom modify the resulting output voltage and current.

Abstract: Recovery systems and methods of the present invention include circuitry that transfers energy from an input to an output with reduced power dissipation. A synchronous switching regulator is one application for the recovery system of the present invention. An inductor may be used in a synchronous switching regulator to reduce power dissipation caused by reverse recovery current that flows through the body diode of the synchronous switching transistor when the synchronous switching transistor turns OFF. Energy in the inductor may be transferred back to the input or output capacitor of the switching regulator through a recovery system of the present invention. The recovery circuit of the present invention provides an efficient method for intercepting energy in the inductor, and presenting power to a recovery switcher in a manner that allows the recovery switcher to transfer the energy into the input or output capacitor of the switching regulator efficiently.

Abstract: A synchronous switching DC-DC regulator uses the output switching node as the control reference for the main FET gate drive voltage limiting and the appropriate on-time gate drive FET as the controlled switch. The control reference provided by the output switching node times the main FET gate drive voltage setting process and supplies most of the energy necessary to turn on the main FETs. The energy is provided in part from an external inductor coupled to the output switching node.

Abstract: A power supply for both alternating current (AC) and direct current (DC) which has an AC/DC converter and DC/DC converter detachably coupled with each other. The AC/DC converter is adapted to convert an AC input voltage into a DC signal, and the DC/DC converter is adapted to convert a DC input voltage into a DC signal. An output voltage selector is provided to obtain a DC output voltage appropriate to an associated device. The present power supply can be conveniently carried, supply power to an associated device regardless of AC and DC input voltages and select a level of an output DC voltage. Therefore, the present power supply can be used universally irrespective of the types of associated devices and manufacturers.

Abstract: The present invention is a power supply device including a power input terminal which inputs a DC voltage, a DC/DC converter which has a feedback terminal and converts the input DC voltage from the power input terminal, a power output terminal which outputs the DC voltage converted by the DC/DC converter, a voltage generator which supplies a voltage, and a resistor which is connected between the power output terminal and the voltage generator. The feedback terminal is connected between the register and voltage generator.

Abstract: It is an object to enhance a breakdown voltage without requiring a complicated manufacturing process while maintaining a stable operation. A control signal (A) output from an MCU (11) is transmitted to a driving circuit (3a) for driving a power switching element (1a) of an upper arm through two-stage level shift circuits. The level shift circuit in a first stage is constituted by a series circuit of a switching element (13) and a resistive element (14), and the level shift circuit in a second stage is constituted by a series circuit of a switching element (16) and a resistive element (17).

Abstract: A power output circuit having a pulse-width modulation generator and an upstream closed-loop control circuit which switches the pulse-width modulation generator and the power output stage to a permanently open mode, a PWM mode having pulse-width-modulated pulses, and a permanently closed mode as a function of a preset external setpoint, an actual value of the power output stage, and a reference voltage derived from the supply voltage. High power loss and high EMC in the full-load threshold region are avoided by prematurely switching from the PWM mode to the permanently closed mode as a function of a preset setpoint and the supply voltage, and returning to the PMW mode with a hysteresis of these values.

Abstract: A new ZVS (zero-voltage-switching) snubber circuit (500) suitable for high power boost converters used as Power Factor Correction circuits used in AC-to-DC modules. The ZVS circuit comprising a main switch (S), an auxiliary switch (S1), a load circuit (LD) a reset circuit (RC), a first diode (D1), a blocking diode (d2), and a first capacitor (C1). The switches and the capacitor are connected in parallel. The circuit having an anode terminal (a2) of a blocking diode (D2) being connected to a drain terminal (d1) of the auxiliary switch and that a cathode terminal (k2) being connected to the reset circuit. At turn-off, the current tail of the main switch is taken over by the auxiliary switch. The ZVS circuit keeps the collector-emitter voltage of main switch almost zero, so that the turn-off loss is minimized.

Abstract: A board mountable power supply module is described. The power supply module includes a power train for converting an input voltage into a regulated output voltage and a controller operable to control the power train. The power train is connected to the input and output voltages through an input voltage pin, an output voltage pin and a common pin. The controller includes a multifunction control pin, which allows for disabling the power supply module and for trimming the output voltage. Additionally, two or more power supply modules can be connected in parallel to form a power supply that is capable of meeting increased load current requirements. Each of the multifunction control pins in the power supply is electrically connected together to improve current sharing between modules by reducing internal variances between modules.

Abstract: To easily and quickly return from a power-off state, as well as reducing power consumption of an electrical apparatus by an automatic power-off, a power supply source connection controller 10 comprises: a power source connecting switch R0-2; a relay R0 for controlling the opening and closing of the switch R0-2; control switches SW1, SW2, and SW3 for sending a signal to a microcomputer 72 to provide instructions for executing a predetermined function, as well as connecting a power supply circuit 74 to the relay R0; a connection holding switch R0-1 for holding a connection between the relay R0 and the circuit 74; and a connection releasing switch SW0 for releasing a connection between the relay R0 and the circuit 74.

Abstract: A control system and method for supplying a constant RMS voltage to a load includes a outer control loop for monitoring a characteristic variable of the system and an inner control loop for maintaining the power delivered to the load as a function of the received input power. A pulse width modulator (PWM) coupled to both control loops delivers pulses representative of an unregulated input voltage duty cycle. The inner control loop compares the duty cycle representation of the input voltage with a duty cycle representation of the pulse and generates a control signal to the PWM accordingly.

Abstract: The output terminal of an error amplifier (32) is coupled to the inverting input of a comparator circuit (34). Additionally, a clamp circuit is coupled between the output terminal of the error amplifier (32) and circuitry connected to the non-inverting input of the comparator circuit (34), to clamp the voltage there between to a predetermined voltage level. This circuit arrangement provides improved controller closed loop response that is adaptive to the power supply (10) output voltage.

Abstract: A switching mode voltage regulator circuit that operates at reduced quiescent current levels is provided. The voltage regulator preferably includes a control circuit and a switching element that connects and disconnects filter circuitry from the control circuit. An error amplifier in the control circuit is placed in a micropower operating state when the regulator is in standby mode to reduce quiescent current.

Abstract: An objective of this invention is to provide a drive control device to control the drive applied to a high-speed rotor unit which would have no circuits in either its pump unit A or its power supply unit B that would limit the use of the device with various types of rotor units, which could easily be used with various types of rotor units, and whose power supply unit B could be used generally. The drive control device for controlling a high-speed rotor unit according to this invention has a power supply unit contains a set of tables of constants needed to control the various types of rotor units with which the drive control device might be used. These constants allow the rotation of the high-speed rotor unit to be adjusted or set according to the type of rotor unit. A signal intended to detect and indicate the type of rotor unit to be driven by the rotor is automatically detected and input before the motor is driven. Based on this signal, the appropriate table is selected.

Abstract: The present invention is a power supply (10) that starts a load (20) with a heavy start-up power draw from a power grid (12) and then switches the load to a generator (22) for lower power draw operation thereby avoiding the need for a large capacity generator capable of initial start-up of the load (20). The power supply comprises a conductor (15) for connecting to a power grid, an electrical power generation device (30), an electrical power using device or load (20) and a switching mechanism (40) for 1) isolating the power grid (12) from the power generation device (30), 2) connecting the power grid conductor (15) to the electrical power using device (20) for the initial start-up of the power using device (20), and 3) connecting the power generation device (30) to the power using device (20) after initial start-up.

Abstract: A load transient compensator and method of operating the load transient compensator for reducing the transient response time to a load capable of operating at either of several consumption levels when the load changes its power consumption level . The load transient compensator has a comparator having an output connected to an input of an upper driver and of a lower driver with the output of each of the driver being connected to a gate of a power transistor. When the load is in sleep mode and is about to start being accessed, the upper driver is turned on to turn on its associated transistor to supply additional current to the load, regulated by the comparison circuit. When the load is in the power up mode and it is about to stop being accessed, the lower driver is turned on to turn on its associated transistor to drain current supplied to the load by a supply, regulated by the comparison circuit.

Abstract: A method for reducing the transient response time of a voltage regulator when the load attached to it is entering or exiting a lower power consumption level by changing the bandwidth of the voltage regulator without compromising its stability, and a bandwidth regulator for implementing such a method are disclosed, wherein the bandwidth of the voltage regulator is changed based on a signal sent by a control device when it senses that the component is about to change power consumption levels.