In Or On Support For Device Under Test Patents (Class 324/754.08)
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Patent number: 8378698Abstract: A testing apparatus includes a test controller configured to output a plurality of chip selection signals for selecting chips to be tested from among a plurality of chips, a plurality of first control signals for controlling supply of a power supply voltage to the chips selected by the chip selection signals, and a plurality of second control signals for controlling receiving of test voltages output from the chips supplied with the power supply voltage, and a probe card including one or more test blocks each having a plurality of signal transmitters configured to respectively transfer the power supply voltage to the corresponding chips in response to the different first control signals and respectively apply the test voltages output from the corresponding chips to the test controller in response to the different second control signals.Type: GrantFiled: April 7, 2010Date of Patent: February 19, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-Young Choi, Chang-Hyun Cho
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Publication number: 20120326741Abstract: Apparatus (10) for transmission testing of a telecommunications jack (100) having a plurality of insulation displacement contacts (IDCs) (103), the apparatus (10) including: a base (30); a plurality of transmission test probes (31) associated with the base (30); and a jack holder (20) for removably coupling the jack (100) to the base (30) such that IDCs (103) of the jack (100) are in electrical communication with corresponding test probes (31); wherein the jack holder (20) is fixed relative to the base (30) during testing, such that the jack (100) remains stationary with respect to the probes (31).Type: ApplicationFiled: June 15, 2012Publication date: December 27, 2012Applicant: ADC Communications (Australia) Pty LimitedInventors: Kevin James Truskett, Kristian Darrell Stewart
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Patent number: 8334704Abstract: This relates to systems and methods for providing a system-on-a-substrate. In some embodiments, the necessary components for an entire system (e.g., a processor, memory, accelerometers, I/O circuitry, or any other suitable components) can be fabricated on a single microchip in “bare die” form. The die can, for example, be coupled to suitable flash memory through a substrate and flexible printed circuit board (“flex”). In some embodiments, the flex can extend past the substrate, die, or both, to allow additional, relatively large components to be coupled to the flex. In some embodiments, the die can be coupled to the flash memory through the flex and without a substrate. In some embodiments, component test points can be placed on the flash memory side of the substrate.Type: GrantFiled: September 23, 2009Date of Patent: December 18, 2012Assignee: Apple Inc.Inventors: Gloria Lin, Bryson Gardner, Jr., Joseph Fisher, Jr., Dave Goh, Barry Corlett, Dennis Pyper, Amir Salehi
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Patent number: 8269516Abstract: Disclosed is a contactor interconnect in an integrated circuit device test fixture comprises a plurality of contactor pins enabled to provide electrical contact with the contact points of an integrated circuit device, the contactor pins being mounted in the test fixture; and an electrical circuit coupled to two or more of the contactor pins of the test fixture, wherein the electrical circuit is isolated from other contactor pins of the plurality of contactor pins and wherein the electrical circuit is coupled to the two or more contactor pins by an electronically direct pathway.Type: GrantFiled: April 3, 2009Date of Patent: September 18, 2012Assignee: Xilinx, Inc.Inventors: Mohsen H. Mardi, David M. Mahoney
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Patent number: 8242794Abstract: An apparatus for testing electric characteristics of a test object including first connection terminals on a bottom surface and second connection terminals on a top surface, the apparatus comprises a test board comprising first pads on a predetermined surface; a socket configured to electrically connect the test object to the test board; and a handler configured to transport the test object to the socket. The socket comprises a first connection unit configured to be electrically connected to the first connection terminals of the test object and a second connection unit configured to be electrically connected to the second connection terminals of the test object.Type: GrantFiled: April 15, 2011Date of Patent: August 14, 2012Assignee: Samsung Electronics Co., Ltd.Inventor: Byeong-Hwan Cho
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Patent number: 8232816Abstract: A probe head for testing semiconductor wafers has a probe contactor substrate have a first side and a second side. A plurality of probe contactor tips are coupled to the first side and the plurality of tips lie in a first plane. A plurality of mounting structures are coupled to the second side with each of the mounting structures each having a top surface lying in a second plane, wherein the first plane is substantially parallel to the second plane.Type: GrantFiled: December 19, 2006Date of Patent: July 31, 2012Assignee: Advantest America, Inc.Inventors: Salleh Ismail, Raffi Garabedian, Steven Wang
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Patent number: 8143909Abstract: A universal test socket includes a housing frame including a side wall, an inner protruding portion protruding inwardly from the side wall, and a through window formed at a center portion of the housing frame, wherein the through window is surrounded by the side wall, a pin plate assembly coupled to the housing frame and including a pin plate in which a plurality of test pins are arranged and a plurality of guide pins formed on periphery of the pin plate, and a package guide portion coupled to the housing frame and located above the pin plate assembly, a semiconductor package to be tested being mounted on the package guide portion. When the pin plate assembly is coupled to the housing frame, the positions of the test pins arranged in the housing frame are varied according to a rotation angle of the pin plate assembly with respect to the housing frame.Type: GrantFiled: January 8, 2010Date of Patent: March 27, 2012Assignee: Samsung Electronics Co., Ltd.Inventor: In-sun Ryu
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Patent number: 8138776Abstract: A test assembly that may provide access to signals of a circuit that includes an integrated circuit. The test assembly may include structural members that limit movement of components relative to each other.Type: GrantFiled: June 30, 2009Date of Patent: March 20, 2012Inventors: Robert C. Shelsky, Kenneth W. Graham, Dennis D. Everson
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Patent number: 8120024Abstract: A semiconductor package and testing method is disclosed. The package includes a substrate having top and bottom surfaces, a semiconductor chip mounted in a centrally located semiconductor chip mounting area of the substrate, and a plurality of test pads disposed on top and bottom surfaces of the substrate and comprising a first group of test pads configured on the top and bottom surfaces of the substrate and having a first height above the respective top and bottom surface of the substrate, and a second group of test pads disposed on the lower surface of the substrate and having a second height greater than the first, wherein each one of the second group of test pads includes a solder ball attached thereto.Type: GrantFiled: June 5, 2007Date of Patent: February 21, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Eun-seok Song, Dong-han Kim, Hee-seok Lee
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Publication number: 20110316574Abstract: A prober for testing devices in a repeat structure on a substrate is provided with a probe holder plate, probe holders mounted on the plate, and a test probe associated with each holder. Each test probe is displaceable via a manipulator connected to a probe holder, and a substrate carrier fixedly supports the substrate. Testing of devices, which are situated in a repeat structure on a substrate, in sequence without a substrate movement and avoiding individual manipulation of the test probes in relation to the contact islands on the devices, is achieved in that the probe holders are fastened on a shared probe holder plate and the probe holder plate is moved in relation to the test substrate.Type: ApplicationFiled: April 26, 2011Publication date: December 29, 2011Inventors: Frank-Michael WERNER, Matthias ZIEGER, Sebastian GIESSMANN
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Publication number: 20110309853Abstract: The test probe assembly of the invention is used for an electric meter such as a multimeter or the like. The electric meter has a main body. The test probe assembly includes a pair of insulated rods, a pair of probe tips and a pair of leads. The insulated rods are separately provided with two corresponding engaging portions, so that the insulated rods can be combined or detached. One end of each probe tip is fixed in one of the insulated rods and the other ends are protrudent. The leads connect between the insulated rods and main body. The combination or detachment of the test probe assembly may form a variety of configurations for different measured objects.Type: ApplicationFiled: June 17, 2010Publication date: December 22, 2011Inventor: Po-Chao TAN
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Publication number: 20110291683Abstract: A substrate support unit adapted for a system for testing or processing of a substrate is provided. The substrate support unit includes a support table having at least one substrate carrier structure adapted to support a substrate, wherein the substrate carrier structure is electrically floating with respect to ground.Type: ApplicationFiled: June 16, 2010Publication date: December 1, 2011Applicant: APPLIED MATERIALS, INC.Inventor: Bernhard Gunter MUELLER
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Patent number: 8067718Abstract: A probe comprises a small “consumable” probe substrate permanently mounted to a circuit-under-test. The probe substrate includes a high-fidelity signal pathway, which is inserted into a conductor of the circuit-under-test, and a high-bandwidth sensing circuit which senses the signal-under-test as it propagates along the signal pathway. The probe substrate further includes a probe socket for receiving a detachable interconnect to a measurement instrument. Power is alternatively supplied to the probe by the circuit-under-test or the interconnect. When the interconnect is attached, control signals from the measurement instrument are supplied to the sensing circuit and the output of the sensing circuit is supplied to the measurement instrument. In one embodiment, the sensing circuit uses high-breakdown transistors in order to avoid the use of passive attenuation. In a further embodiment, the sensing circuit includes broadband directional sensing circuitry.Type: GrantFiled: May 4, 2006Date of Patent: November 29, 2011Assignee: Tektronix, Inc.Inventors: Robert A. Nordstrom, William Q. Law, Mark W. Nightingale, Einar O. Traa, Ira G. Pollock
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Publication number: 20110285415Abstract: A ground terminal has a cylindrical main body. A signal terminal has a terminal main body that is disposed on the inside of the cylindrical main body, and a connecting plate portion that extends from an end portion of the terminal main body. Additionally, a ground terminal has at least three connecting plate portions that are disposed so as to encompass the connecting plate portion of the ground terminal, each extending from mutually different positions on an edge of the cylindrical main body.Type: ApplicationFiled: May 18, 2011Publication date: November 24, 2011Applicants: Advantest Corporation, Molex Japan Co., Ltd.Inventors: Ryo Uesaka, Jun Watanabe, Akinori Mizumura, Hirotaka Wagata
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Patent number: 7969172Abstract: Disclosed is a probing method including, when the probes are configured to make contact with a chip row including four chips continuously arranged in an oblique direction so that the probe card test four chips at a time, finding a first reference oblique chip row extending in the oblique direction and containing a center chip positioned at the center of the wafer and a plurality of first additional oblique chip rows arranged in parallel with the first reference oblique chip row at an upper side of the first reference oblique chip row, and setting contact positions between the probes and the first oblique chip rows wherein the contact positions are positions of the probes obtained by shifting the probes; setting contact positions between the probes and the second oblique chip rows in an opposite direction to a first step; and setting a plurality of index group and test order.Type: GrantFiled: August 6, 2009Date of Patent: June 28, 2011Assignee: Tokyo Electron LimitedInventors: Hideaki Tanaka, Yukihiko Fukasawa
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Patent number: 7956631Abstract: A test socket, adapted for connecting the semiconductor package and a printed circuit board comprises a base and a plurality of contacts received in the base. The base has a retaining board defining a plurality of first receiving holes and a positioning board defining a plurality of second receiving holes. The contacts has a contacting portion, an elastic portion and a retaining portion, the elastic portion is disposed between the retaining board and the positioning board and protruding rightward, and the contacting portion extends beyond the elastic portion and defines a acute angle with a horizontal line in a right hand before contacting with the semiconductor package to prevent the contacting portion from scratching with the left inner sidewall of the second receiving hole when pushed downward by the semiconductor package and rotating leftward.Type: GrantFiled: March 10, 2009Date of Patent: June 7, 2011Assignee: Hon Hai Precision Ind. Co., Ltd.Inventors: Ke-Hao Chen, Wen-Yi Hsieh
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Publication number: 20110115513Abstract: According to one embodiment, a wafer prober for conducting a backside analysis on a wafer is provided. The wafer prober includes a wafer stage and a movable plate. The wafer stage includes surface and back opposed in a thickness direction, a concave portion provided at the surface which supports the wafer, and a first through hole which passes through a bottom face of the concave portion in the thickness direction in the concave portion. The movable plate is accommodated in the concave portion of the wafer stage. The movable plate is movable in a direction parallel to a top face of the wafer stage. The movable plate has a thickness equivalent to a depth of the concave portion of the wafer stage. The movable plate has a second through hole. The second through hole passes through the movable plate in a thickness direction. The second through hole is smaller than the first through hole. The second through hole communicates with the first through hole.Type: ApplicationFiled: June 8, 2010Publication date: May 19, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Tamotsu Harada
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Patent number: 7944223Abstract: The present invention discloses a burn-in testing system including a burn-in board and a burn-in testing apparatus, the burn-in board including: a first interface component, adapted to connect with the burn-in testing apparatus for signal input and/or output between the burn-in board and the burn-in testing apparatus; and a second interface component, adapted to connect with a device under test for signal input and/or output between the burn-in board and the device, wherein the burn-in testing system further includes a pin matching unit flexibly connected with the burn-in board and adapted to adjust signal connection relationship between the first interface component and the second interface component according to a pin description of the device.Type: GrantFiled: September 14, 2010Date of Patent: May 17, 2011Assignee: Semiconductor Manufacturing International (Shanghai) CorporationInventors: Venson Chang, Kary Chien, Shunwang Chiang
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Patent number: 7940068Abstract: A test board is provided. The test board includes a power connecting interface, diode modules, a power module a detecting module, and a processor. The power connecting interface includes power pins, wherein each of the power pins is electrically connected to a motherboard power socket to receive a power signal. Each of the diode modules is electrically connected to one of the power pins and includes at least one diode. The power module is electrically connected to the diode modules to receive the power signal through each of the diode modules. The detection module is electrically connected to points between the diode modules and the power connecting interface to generate a detection result according to the voltage between each diode module and the power connecting interface. The processor is used to determine the connecting state between the power pin and the corresponding motherboard power socket according to the detection result.Type: GrantFiled: July 20, 2009Date of Patent: May 10, 2011Assignee: Inventec CorporationInventors: Chih-Jen Chin, Chun-Hao Chu, Ting-Hong Wang, Sheng-Yuan Tsai
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Patent number: 7893702Abstract: A semiconductor package testing apparatus comprises a test substrate that electrically tests a semiconductor package chip; a socket having an electrical contact between the test substrate and the semiconductor package; an insert block inserted into the socket, wherein the semiconductor package is mounted to the insert block; and a pusher that brings the socket into contact with the semiconductor package by compressing an upper part of the semiconductor package, wherein the pusher is multilevel-controlled to compress the semiconductor package by a predefined pressure according to a thickness of the semiconductor package.Type: GrantFiled: January 6, 2009Date of Patent: February 22, 2011Assignee: Samsung Electronics Co., Ltd.Inventor: Young-Chul Lee
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Patent number: 7880488Abstract: In one embodiment, a universal current leakage measurement device is disclosed. A universal current leakage testing adapter has the ability to couple with at least two differently sized or shaped probe connectors. The universal current leakage testing adapter is configured to couple with differently sized or shaped probe connectors by conductive planes either functioning independently or in concert to contact the pins of a probe connector.Type: GrantFiled: October 31, 2008Date of Patent: February 1, 2011Assignee: Unisyn Medical Technologies, Inc.Inventors: Steven Emil Dananay, G. Wayne Moore, James Ginther
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Publication number: 20110018564Abstract: A wafer prober is provided with a tray which supports a wafer at a set position, transports it to a processing position of the wafer and is placed at the processing position; one or more alignment units which position the wafer at the set position with respect to the tray; contact units arranged in number larger than that of the alignment units and performing inspection processing in contact with the wafer at the processing position; and a tray transport portion for transporting the tray supporting the wafer between the alignment unit and the contact unit. The tray is provided with three or more pin holes for allowing movement of the chuck pin in the XYZ? directions, an alignment mark for positioning the wafer, and an alignment portion for positioning the tray itself.Type: ApplicationFiled: June 16, 2010Publication date: January 27, 2011Applicant: KABUSHIKI KAISHA NIHON MICRONCSInventors: Kenichi WASHIO, Katsuo Yasuta, Umenori Sugiyama, Hikaru Masuta
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Patent number: RE43739Abstract: A test probe for a finger tester for the testing of non-componented circuit boards has a test needle with a probe tip which may be brought into contact with a circuit board test point, and which may be pivotably attached to a mount by means of at least two flexible sprung retaining arms. It is distinguished by the fact that at least one of the retaining arms is made of an electrically conductive material and is electrically connected to the test needle. In a corresponding finger tester, the test probe is driven by a linear motor.Type: GrantFiled: October 9, 2008Date of Patent: October 16, 2012Assignee: ATG Luther & Maelzer GmbHInventor: Victor Romanov