Abstract: Superconducting integrated circuits may advantageously employ superconducting resonators coupled to a microwave transmission line to efficiently address superconducting flux storage devices. In an XY-addressing scheme, a global flux bias may be applied to a number of superconducting flux storage devices via a low-frequency address line, and individual superconducting flux storage devices addressed via application of high-frequency pulses via resonators driven by the microwave transmission line. Frequency multiplexing can be employed to provide signals to two or more resonators. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to provide Z-addressing. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to eliminate a flux bias line.

Abstract: A radio-frequency (RF) to direct current (DC) converter is provided. When a DC electrical current is applied via a DC input port of the converter, the DC electrical current is shunted to ground through a Josephson junction (JJ) of the converter and substantially no DC electrical current flows through a resistor of the converter, and when an RF electrical current is applied via an RF input port of the converter, output trains of SFQ current pulses from a DC to SFQ converter of the RF-to-DC converter with pulse-to-pulse spacing inversely proportional to the RF electrical current frequency cause the JJ to switch at a rate commensurate with an RF frequency of the RF electrical current to generate a steady state voltage across the JJ linearly dependent on the RF frequency.

Abstract: A circuit can include a first sub-circuit, a second sub-circuit, and a third sub-circuit. The first sub-circuit can store a reset state or a set state, and can include a first Josephson junction (JJ), a second JJ, and a third JJ coupled in parallel using superconducting inductors. The first JJ, the second JJ, and the third JJ can be biased using a JJ-based current source. The second sub-circuit can switch the first sub-circuit to the set state in response to receiving a pulse. The third sub-circuit can switch the first sub-circuit to the reset state in response to receiving one or more pulses.

Abstract: According to one embodiment, a calculating device includes a nonlinear oscillator. The nonlinear oscillator includes a circuit part including a first Josephson junction and a second Josephson junction, and a conductive member including a first terminal. An electrical signal is input to the first terminal. The electrical signal includes a first signal in a first operation. The first signal includes a first frequency component having a first frequency, and a second frequency component having a second frequency. The first frequency is 2 times an oscillation frequency of the nonlinear oscillator. An absolute value of a difference between the first frequency and the second frequency is not more than 0.3 times the first frequency.

Abstract: The present disclosure provides a method and a system for generating a quantum bit control signal. The method includes: receiving a first tag code and a first standard signal corresponding to each basic quantum logic gate in a set of reference quantum gates from a master computer; storing the first standard signal, and obtaining a first address code identifying a storage location of the first standard signal; receiving a target tag code and a target time code corresponding to each basic quantum logic gate in a target quantum program from the master computer; and obtaining, according to the target tag code and the target time code, the first standard signal corresponding to the basic quantum logic gate in the target quantum program as a signal to be processed, and processing the signal to be processed to obtain the quantum bit control signal.

Abstract: One example includes a superconducting latch system. The system includes a first input stage configured to receive a first input pulse and a second input stage configured to receive a second input pulse. The system also includes a storage loop configured to switch from a first state to a second state in response to receiving the first input pulse, and to switch from the second state to the first state in response to the second input pulse. The first state corresponds to no flux in the storage loop and the second state corresponds to a flux in the storage loop. The system further includes an output stage configured to generate an output pulse in the second state of the storage loop.

Abstract: Techniques for operating a mechanical oscillator as a quantum memory are described. According to some aspects, a qubit may be coupled to a piezoelectric material such that the electric field of the qubit causes stress within the piezoelectric material. The piezoelectric material may be in contact with a crystalline substrate forming an acoustic resonator such that the qubit couples to bulk acoustic waves in the crystalline substrate via its interaction with the piezoelectric material. According to some aspects, application of a suitable electromagnetic pulse to the qubit may cause an exchange of energy from the qubit to the acoustic phonon system and thereby transfer quantum information from the qubit to the phonon system.

Abstract: A superconducting field programmable gate array (SuperFPGA) apparatus for implementing a superconducting electronic circuit includes a superconducting logic core that includes a plurality of superconducting single flux quantum configurable logic blocks having regular Josephson junctions and inductors that are interconnectible to each other and to input/output terminals of the superconducting electronic circuit. The SuperFPGA apparatus also includes a superconducting routing network, a zero-static-power dissipation biasing network, magnetic Josephson junctions, and a magnetic Josephson junction programming layer.

Abstract: A quantum computing device includes multiple co-planar waveguide flux qubits, at least one coupler element arranged such that each co-planar waveguide flux qubit, of the multiple co-planar waveguide flux qubits, is operatively couplable to each other co-planar waveguide flux qubit, of the multiple co-planar waveguide flux qubits, of the quantum computing device, and a tuning quantum device, in which the tuning quantum device is in electrical contact with a first co-planar waveguide flux qubit of the plurality of co-planar waveguide flux qubits and with a second co-planar waveguide flux qubit of the plurality of co-planar waveguide flux qubits.

Abstract: A system and method for controlling qubits to perform quantum computation is provided. In some aspects, the system includes at least one superconducting quantum processor comprising a multi-qubit architecture having coupled qubits that are described by an anharmonic energy spectrum. The system also includes a microwave source connected to the at least one superconducting quantum processor, and configured to provide a microwave irradiation to at least one of the coupled qubits in the multi-qubit architecture to perform a gate on the at least one of the coupled qubits. The system further includes a controller configured to direct the microwave source to provide the microwave irradiation to at least one of the coupled qubits in the multi-qubit architecture.

Abstract: Superconducting circuits and methods for latching data are described. An example superconducting circuit includes an edge detect circuit configured to receive a logical clock signal and generate a return-to-zero clock signal. The superconducting circuit further includes a first latch configured to receive the logical clock signal and an input data signal, where the first latch is further configured to selectively delay the input data signal to generate a delayed data signal. The superconducting circuit further includes a second latch configured to receive the return-to-zero clock signal and the delayed data signal, where the second latch is further configured to capture a logical high value corresponding to the input data signal in response to a rising edge of the return-to-zero clock signal and capture a low logical value corresponding to the input data signal in response to a falling edge of the return-to-zero clock signal.

Abstract: An inverting reciprocal quantum logic (RQL) phase-mode D flip-flop accepts a data input and a logical clock input. The flip-flop includes a stacked Josephson junction and a comparator. The triggering or untriggering of the stacked Josephson junction by positive or negative single flux quantum (SFQ) pulses can switch a direction of DC bias current through a component of the comparator, such as an output Josephson junction, which can then either pass or suppress logical clock SFQ pulses. When so passed, the data input is captured to the output upon clocking the flip-flop via the provision of the logical clock SFQ pulses, e.g., as reciprocal pulse pairs.

Abstract: Superconducting circuits based devices and methods, including reciprocal quantum logic (RQL) based devices and methods are provided. In one example, a device comprising an output terminal, a first input terminal for receiving a first set of pulses, and a second input terminal for receiving a second set of pulses is provided. The first section may be configured to pass a single pulse received during a single clock cycle at any of the first input terminal or the second input terminal, but to not pass two or more positive pulses received during a single clock cycle at the first input terminal and the second input terminal. The second section, coupled to the first section, may be configured to, in response to the single pulse, generate a negative pulse after a predetermined fraction of a single clock cycle after providing a positive pulse at the output terminal.

Abstract: Superconducting circuits-based devices and methods, including reciprocal quantum logic (RQL) based devices and methods are provided. In one example, a circuit for an A-and-not-B gate including an output terminal, a first input terminal for receiving a first set of single flux quantum (SFQ) pulses, and a second input terminal for receiving a second set of SFQ pulses is provided. The circuit further includes a first Josephson junction (JJ) coupled to receive the first set of SFQ pulses. The circuit further includes a second JJ, where the second JJ when positively biased is configured to negatively bias the first JJ such that the circuit is configured to not pass the first set of SFQ pulses to the output terminal only when the second set of SFQ pulses have arrived at the second input terminal prior to an arrival of the first set of SFQ pulses at the first input terminal.

Abstract: One embodiment describes a Josephson current source system comprising a flux-shuttle loop that is inductively coupled with an AC input signal. The flux-shuttle loop includes a plurality of stages each comprising at least one Josephson junction. The plurality of stages can be spaced about the flux shuttle loop. Each of a plurality of pairs of the plurality of stages are configured to concurrently trigger in a sequence via the respective at least one Josephson junction in response to the AC input signal and to provide a respective pair of single-flux quantum (SFQ) pulses that move sequentially and continuously through each stage of the plurality of stages around the flux-shuttle loop via each of the at least one Josephson junction of each of the respective stages that results in a DC output current being provided through an output inductor.

Abstract: A Josephson AND/OR gate circuit makes efficient use of Josephson junction (JJ) and inductor components to provide two-input, two-output AND/OR logical functions. The circuit includes four logical input storage loops that each contain one of two logical decision JJs that are configured such that they trigger to provide the OR and AND signals, respectively. Functional asymmetry is provided in the topologically symmetrical AND/OR gate circuit by a bias storage loop that includes both of the logical decision JJs and that is initialized to store a directional ?0 of current at system start-up.

Abstract: Embodiments of the present invention are directed to an integrated drive and readout circuit assembly. Directional couplers are configured to connect to qubit-resonator systems. Diplexers are coupled to the directional couplers. A microwave signal combiner is coupled to the diplexers.

Abstract: Systems and methods are provided for linking two components in a superconducting circuit. A plurality of circuit elements, each comprising one of an inductor, a capacitor, and a Josephson junction, are connected in series on a path connecting the two components. A plurality of tunable oscillators are connected from the path connecting the two components. Each tunable oscillator is responsive to a control signal to tune an associated resonance frequency of the tunable oscillator within a first frequency range, within which the two components are coupled, and within a second frequency range, within which the two components are isolated.

Abstract: A quantum processor is operable as a universal adiabatic quantum computing system. The quantum processor includes physical qubits, with at least a first and second communicative coupling available between pairs of qubits via an in-situ tunable superconducting capacitive coupler and an in-situ tunable superconducting inductive coupler, respectively. Tunable couplers provide diagonal and off-diagonal coupling. Compound Josephson junctions (CJJs) of the tunable couplers are responsive to a flux bias to tune a sign and magnitude of a sum of a capacitance of a fixed capacitor and a tunable capacitance which is mediated across a pair of coupling capacitors. The qubits may be hybrid qubits, operable in a flux regime or a charge regime. Qubits may include a pair of CJJs that interrupt a loop of material and which are separated by an island of superconducting material which is voltage biased with respect to a qubit body.

Abstract: A superconducting logic cell includes at least one quantum phase-slip junction (QPSJ) for receiving at least one input and responsively providing at least one output, each QPSJ being configured such that when an input voltage of an input voltage pulse exceeds a critical value, a quantized charge of a Cooper electron pair tunnels across said QPSJ as an output, when the input voltage is less than the critical value, no quantized charge of the Cooper electron pair tunnels across said QPSJ as the output, where the presence and absence of the quantized charge in the form of a constant area current pulse in the output form two logic states, and the at least one QPSJ is biased with a bias voltage. The superconducting logic cell further includes at least one Josephson junction (JJ) coupled with the at least one QPSJ to perform one or more logic operations.

Abstract: A system and method for high-speed, low-power cryogenic computing are presented, comprising ultrafast energy-efficient RSFQ superconducting computing circuits, and hybrid magnetic/superconducting memory arrays and interface circuits, operating together in the same cryogenic environment. An arithmetic logic unit and register file with an ultrafast asynchronous wave-pipelined datapath is also provided. The superconducting circuits may comprise inductive elements fabricated using both a high-inductance layer and a low-inductance layer. The memory cells may comprise superconducting tunnel junctions that incorporate magnetic layers. Alternatively, the memory cells may comprise superconducting spin transfer magnetic devices (such as orthogonal spin transfer and spin-Hall effect devices). Together, these technologies may enable the production of an advanced superconducting computer that operates at clock speeds up to 100 GHz.

Abstract: Embodiments of the present invention are directed to an integrated drive and readout circuit assembly. Directional couplers are configured to connect to qubit-resonator systems. Diplexers are coupled to the directional couplers. A microwave signal combiner is coupled to the diplexers.

Abstract: A memory system including a content addressable memory having an array of content addressable memory elements including a plurality of rows of content addressable memory elements and a plurality of columns of content addressable memory elements is provided. Each of the content addressable memory elements further includes a first superconducting quantum interference device (SQUID) and a second superconducting quantum interference device (SQUID), where an input bit to each of the content addressable memory elements is compared with: (1) a first state of the first SQUID and (2) a second state of the second SQUID to generate an output signal. The memory system further includes a Josephson magnetic random access memory (JMRAM), coupled to the content addressable memory.

Abstract: The current application is directed to methods and quantum circuits that prepare qubits in specified non-stabilizer quantum states that can, in turn, be used for a variety of different purposes, including in a quantum-circuit implementation of an arbitrary single-qubit unitary quantum gate that imparts a specified, arbitrary rotation to the state-vector representation of the state of an input qubit. In certain implementations, the methods and systems consume multiple magic-state qubits in order to carry out probabilistic rotation operators to prepare qubits with state vectors having specified rotation angles with respect to a rotation axis. These qubits are used as resources input to various quantum circuits, including the quantum-circuit implementation of an arbitrary single-qubit unitary quantum gate, including a V gate.

Abstract: One aspect of the present invention includes a reciprocal quantum logic (RQL) readout system. The system includes an input stage on which a read pulse is provided and an output stage configured to propagate an output pulse. The system also includes an RQL comparator comprising a first Josephson junction and a second Josephson junction that are coupled to a qubit. A bias current switches between a first Josephson junction in a first quantum state of the qubit and a second Josephson junction in a second quantum state of the qubit. The first Josephson junction triggers to provide the output pulse on the output stage in the first quantum state in response to the read pulse and the second Josephson junction triggers to provide no output pulse on the output stage in the second quantum state in response to the read pulse.

Abstract: A system and method for high-speed, low-power cryogenic computing are presented, comprising ultrafast energy-efficient RSFQ superconducting computing circuits, and hybrid magnetic/superconducting memory arrays and interface circuits, operating together in the same cryogenic environment. An arithmetic logic unit and register file with an ultrafast asynchronous wave-pipelined datapath is also provided. The superconducting circuits may comprise inductive elements fabricated using both a high-inductance layer and a low-inductance layer. The memory cells may comprise superconducting tunnel junctions that incorporate magnetic layers. Alternatively, the memory cells may comprise superconducting spin transfer magnetic devices (such as orthogonal spin transfer and spin-Hall effect devices). Together, these technologies may enable the production of an advanced superconducting computer that operates at clock speeds up to 100 GHz.

Abstract: One embodiment includes a superconductive gate system. The superconductive gate system includes a Josephson D-gate circuit comprising a bi-stable loop configured to store a digital state as one of a first data state and a second data state in response to an enable single flux quantum (SFQ) pulse provided on an enable input and a respective presence of or absence of a data SFQ pulse provided on a data input. The digital state can be provided at an output. The readout circuit is coupled to the output and can be configured to reproduce the digital state as an output signal.

Abstract: Systems and methods are provided for a hybrid qubit circuit assembly is provided. A first plural set of Josephson junctions is arranged in series on a first path between two nodes of a circuit. A second plural set of Josephson junctions is arranged in parallel with one another to form a direct current superconducting quantum interference device (DC SQUID). The DC SQUID is in parallel with the first plural set of Josephson junctions. A capacitor is in parallel with each of the first plural set of Josephson junctions and the DC SQUID.

Abstract: The effects of decoherence and/or noise in adiabatic quantum computation and quantum annealing are reduced by implementing replica coding schemes. Multiple instances of the same problem are mapped to respective subsets of the qubits and coupling devices of a quantum processor. The multiple instances are evolved simultaneously in the presence of coupling between the qubits of different instances. Quantum processor architectures that are adapted to facilitate replica coding are also described.

Abstract: A method of characterizing a tunable superconducting circuit, includes selecting an operating direct current (DC) flux for a first charge island from a plurality of coupled charge islands residing in the tunable superconducting circuit coupled to a first resonator and a second resonator, tuning operating DC flux values for at least two charge islands from the plurality of coupled charge islands, measuring coupling energies of the first resonator and the second resonator and measuring frequencies from each of the plurality of coupled charge islands.

Abstract: A quantum information processing system includes a waveguide having an aperture, a non-linear quantum circuit disposed in the waveguide and an electromagnetic control signal source coupled to the aperture.

Abstract: Preservation of quantum entanglement in a two-qubit system is achieved by use of the disclosed systems. Three different example two-qubit systems are shown: (1) a system employing a weak measurement, (2) a system in which a generalized amplitude dampening occurs without use of a weak measurement, and (3) an extended system in which the system is prepared in a more robust state less susceptible to decoherence prior to a generalized amplitude dampening.

Abstract: A tunable superconducting circuit includes a first charge island, a second charge island, a third charge island, a fourth charge island, a first junction loop electrically coupled to the first and third charge islands, a second junction loop coupled to the second and third charge islands and a third junction loop coupled to the third and fourth charge islands, wherein the first, second and third junction loops are tuned in frequency to operate together as a qubit.

Abstract: Systems and methods for reading out the states of superconducting flux qubits may couple magnetic flux representative of a qubit state to a DC-SQUID in a variable transformer circuit. The DC-SQUID is electrically coupled in parallel with a primary inductor such that a time-varying (e.g., AC) drive current is divided between the DC-SQUID and the primary inductor in a ratio that is dependent on the qubit state. The primary inductor is inductively coupled to a secondary inductor to provide a time-varying (e.g., AC) output signal indicative of the qubit state without causing the DC-SQUID to switch into a voltage state. Coupling between the superconducting flux qubit and the DC-SQUID may be mediated by a routing system including a plurality of latching qubits. Multiple superconducting flux qubits may be coupled to the same routing system so that a single variable transformer circuit may be used to measure the states of multiple qubits.

Abstract: One embodiment of the invention includes a quantum processor system. The quantum processor system includes a first resonator having a first characteristic frequency and a second resonator having a second characteristic frequency greater than the first characteristic frequency. A qubit cell is coupled to each of the first resonator and the second resonator. The qubit cell has a frequency tunable over a range of frequencies including the first characteristic frequency and the second characteristic frequency. A classical control mechanism is configured to tune the frequency of the qubit cell as to transfer quantum information between the first resonator and the second resonator.

Abstract: A quantum information processing system includes a waveguide having an aperture, a non-linear quantum circuit disposed in the waveguide and an electromagnetic control signal source coupled to the aperture.

Abstract: Computing bus devices that enable quantum information to be coherently transferred between topological and conventional qubits are disclosed. A concrete realization of such a topological quantum bus acting between a topological qubit in a Majorana wire network and a conventional semiconductor double quantum dot qubit is described. The disclosed device measures the joint (fermion) parity of the two different qubits by using the Aharonov-Casher effect in conjunction with an ancillary superconducting flux qubit that facilitates the measurement. Such a parity measurement, together with the ability to apply Hadamard gates to the two qubits, allows for the production of states in which the topological and conventional qubits are maximally entangled, and for teleporting quantum states between the topological and conventional quantum systems.

Abstract: Methods and apparatuses are provided for storing a quantum bit. One apparatus includes a first phase qubit, a second phase qubit, and a common bias circuit configured to provide a first bias to the first phase qubit and a second bias to the second phase qubit, such that noise within the first bias is anti-correlated to noise within the second bias.

Abstract: A superconducting integrated circuit, comprising a plurality of superconducting circuit elements, each having a variation in operating voltage over time; a common power line; and a plurality of bias circuits, each connected to the common power line, and to a respective superconducting circuit element, wherein each respective bias circuit is superconducting during at least one time portion of the operation of a respective superconducting circuit element, and is configured to supply the variation in operating voltage over time to the respective superconducting circuit element.

Abstract: Systems and methods are provided for reading an associated state of a qubit. A first soliton is injected along a first Josephson transmission line coupled to the qubit. A velocity of the first soliton is selected according to a physical length of the qubit and a characteristic frequency of the qubit. A second soliton is injected at the selected velocity along a second Josephson transmission line that is not coupled to the qubit. A delay associated with the first soliton is determined relative to the second soliton.

Abstract: One embodiment of the invention includes a quantum processor system. The quantum processor system includes a first resonator having a first characteristic frequency and a second resonator having a second characteristic frequency greater than the first characteristic frequency. A qubit cell is coupled to each of the first resonator and the second resonator. The qubit cell has a frequency tunable over a range of frequencies including the first characteristic frequency and the second characteristic frequency. A classical control mechanism is configured to tune the frequency of the qubit cell as to transfer quantum information between the first resonator and the second resonator.

Abstract: A binary half-adder comprising first and second oscillators, each oscillator being connected to a first input and to a second input, the second oscillator being connected to the first oscillator, wherein the first oscillator is configured to oscillate if the first input is high or the second input is high, the second oscillator is configured to oscillate if the first and the second inputs are high, and wherein the connection between the second oscillator and the first oscillator is configured to suppress oscillation of the first oscillator if the second oscillator is oscillating.

Abstract: A system for performing digital operations, including a first device configured to transform a digital input into one or more signals, at least one AB ring, the at least one AB ring irreducibly-coupled and configured to include at least three terminals, a second device configured to read a portion of a signal expressed upon two or more of the at least three terminals, and a third device configured to transform the portion of the signal expressed upon two or more of the at least three terminals into a digital output, the third device operationally connected to the second device.

Abstract: Methods and systems are disclosed for restoring a state of a qubit transformed by a weak measurement to its original state. Unlike traditional methods, in which, the restoration was carried out by way of another weak measurement, the disclosed method uses an additional qubit, referred to as the ancillary qubit, and appropriate Hadamard and CNOT transformation for restoring the original state. Because the disclosed method avoids a second weak measurement, the time for restoration of the original state is considerably reduced.

Abstract: One embodiment of the invention includes a quantum system. The system includes a superconducting qubit that is controlled by a control parameter to manipulate a photon for performing quantum operations. The system also includes a quantum resonator system coupled to the superconducting qubit and which includes a first resonator and a second resonator having approximately equal resonator frequencies. The quantum resonator system can represent a first quantum logic state based on a first physical quantum state of the first and second resonators with respect to storage of the photon and a second quantum logic state based on a second physical quantum state of the first and second resonators with respect to storage of the photon.

Abstract: Methods and systems are disclosed for restoring a state of a qubit transformed by a weak measurement to its original state. Unlike traditional methods, in which, the restoration was carried out by way of another weak measurement, the disclosed method uses an additional qubit, referred to as the ancillary qubit, and appropriate Hadamard and CNOT transformation for restoring the original state. Because the disclosed method avoids a second weak measurement, the time for restoration of the original state is considerably reduced.

Abstract: One embodiment of the invention includes a quantum processor system. The quantum processor system includes a first resonator having a first characteristic frequency and a second resonator having a second characteristic frequency greater than the first characteristic frequency. A qubit cell is coupled to each of the first resonator and the second resonator. The qubit cell has a frequency tunable over a range of frequencies including the first characteristic frequency and the second characteristic frequency. A classical control mechanism is configured to tune the frequency of the qubit cell as to transfer quantum information between the first resonator and the second resonator.

Abstract: A transverse coupling system may include a first qubit, a second qubit, a first conductive path capacitively connecting the first qubit and the second qubit, a second conductive path connecting the first qubit and the second qubit, and a dc SQUID connecting the first and the second conductive paths wherein the compound junction loop is threaded by an amount of magnetic flux.

Abstract: Digital mixers which permit mixing of asynchronous signals may be constructed of Rapid Single Flux Quantum (RSFQ) logic elements. The logic elements may include an RSFQ non-destructive readout cell (NDRO), an RSFQ D flip-flop, an RSFQ XOR circuit, and an RSFQ T flip-flop. A binary tree arrangement of T flip-flops can be used to provide in-phase and quadrature phase-divided replicas of a reference signal. The mixing elements can be either an XOR circuit, a dual port NDRO circuit functioning as a multiplexer or an RS type NDRO functioning as an AND gate. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.

Abstract: Superconducting single flux quantum circuits are disclosed herein, each having at least one Josephson junction which will flip when the current through it exceeds a critical current. Bias current for the Josephson junction is provided by a biasing transformer instead of a resistor. The lack of any bias resistors ensures that unwanted power dissipation is eliminated.