Abstract: A power supply circuitry includes a first circuitry, a second circuitry, a fourth circuitry, and a fifth circuitry. The first circuitry outputs a first current based on a drive signal. The second circuitry generates a second current according to the first current. The fourth circuitry generates the drive signal based on a first voltage according to the first current. The fifth circuitry outputs a second voltage based on the first current and on the second current.

Abstract: A converter includes a control chip, a switching transistor, a step-down circuit and a linear power circuit. The control chip is configured to: convert an input voltage from an external power supply module into a control voltage; when a bootstrap voltage is received, convert the bootstrap voltage into the control voltage and stop converting the input voltage; and control the switching transistor to be periodically turned on and off based on the control voltage to cause the power supply module to periodically output the input voltage to the step-down circuit. The step-down circuit is configured to generate an operating voltage based on the input voltage and outputs the operating voltage to an electrical unit and the linear power circuit. The linear power circuit is configured to convert the operating voltage into the bootstrap voltage and output the bootstrap voltage to the control chip.

Abstract: An ideal diode circuit is described which uses an NMOS transistor as a low-loss ideal diode. The control circuit for the transistor is referenced to the anode voltage and not to ground, so the control circuitry may be low voltage circuitry, even if the input voltage is very high, referenced to earth ground. A capacitor is clamped to about 10-20V, referenced to the anode voltage. The clamped voltage powers a differential amplifier for the detecting if the anode voltage is greater than the cathode voltage. The capacitor is charged to the clamped voltage during normal operation of the ideal diode by controlling the conductivity of a second transistor coupled between the cathode and the capacitor, enabling the circuit to be used with a wide range of frequencies and voltages. All voltages applied to the differential amplifier are equal to or less than the clamped voltage.

Abstract: Aspects of the present disclosure include a frequency-to-current (F2I) circuit and systems, methods, devices, and other circuits related thereto. The F2I circuit is implemented with a delta-modulator-based control loop to settle and maintain an operating point on a bias node. The control loop provides an integral of an output of a comparator, and the comparator compares it to a self-built voltage reference. Upon powering on the circuit, an integrator in the control loop starts to integrate the charge on both a bias voltage and an internal voltage to provide a settling process for the internal voltage to approximate the reference voltage and for the bias voltage to approximate a predetermined operating point of the bias node. After the circuit has settled, the comparator's output charge toggles and the internal voltage and bias voltage become sawtooth-like waveforms at the reference voltage and operating points, respectively.

Abstract: A voltage converter can be switched among two or more modes to produce an output voltage tracking a reference voltage that can be of an intermediate level between discrete levels corresponding to the modes. One or more voltages generated from a power supply voltage, such as a battery voltage, can be compared with the reference voltage to determine whether to adjust the mode. The reference voltage can be independent of the power supply voltage. Further, the voltage converter may implement frequency modulation and a pulse skipping mode to improve the efficiency of switching operational states of the voltage converter.

Abstract: An object is to suppress operation delay caused when a semiconductor device that amplifies and outputs an error between two potentials returns from a standby mode. Electrical connection between an output terminal of a transconductance amplifier and one electrode of a capacitor is controlled by a transistor whose channel is formed in an oxide semiconductor layer. Consequently, turning off the transistor allows the one electrode of the capacitor to hold charge for a long time even if the transconductance amplifier is in the standby mode. Moreover, when the transconductance amplifier returns from the standby mode, turning on the transistor makes it possible to settle charging and discharging of the capacitor in a short time. As a result, the operation of the semiconductor device can enter into a steady state in a short time.

Abstract: An integrated DC blocking amplifier circuit, including: an operational amplifier configured in a differential amplifier; and at least first and second two-stage switched-capacitor circuits, each two stage switched-capacitor circuit including a first-stage circuit and a second-stage circuit, wherein the first two-stage switched capacitor circuit is connected to a positive side feedback path of the operational amplifier and the second two-stage switched capacitor circuit is connected to a negative side feedback path of the operational amplifier, wherein the first-stage circuit is switched at a relatively low switching frequency, while the second-stage circuit is switched at a relatively high switching frequency.

Abstract: An object of the present invention is to provide a semiconductor device which can obtain the high potential necessary for writing data to a memory, using a small circuit area. In the present invention, by using as input voltage of a booster circuit not the conventionally used output VDD of a regulator circuit 104, but rather an output VDD0 of a rectifier circuit portion 103, which is a higher potential than the VDD, the high potential necessary for writing data to a memory can be obtained with a small circuit area.

Abstract: A transmission line driver and a method for driving the same are provided, in which a composite current source is provided as an input current source, such that an output voltage is fixed. The composite current source includes an internal current source and an external current source. The composite current source is supplied to a single-ended transmission line driver or a differential transmission line driver, such that the output voltage is fixed.

Abstract: A frequency detection apparatus includes: a constant current generator, arranged for providing a constant current to a voltage output terminal; a first capacitor, coupled between the voltage output terminal and a first reference voltage; a first transistor, which has a first connection terminal coupled to the voltage output terminal, a control terminal coupled to an input signal; a second connection terminal, coupled between the second connection terminal of the first transistor and the first reference voltage; a second transistor, which has a first connection terminal coupled to the second connection terminal of the first transistor, a second connection terminal coupled to the first reference voltage, a control terminal coupled to an inverted input signal, which is obtained by inverting the input signal; wherein a voltage output of the voltage output terminal changes with an input signal frequency of the input signal.

Abstract: A voltage regulator for controlling an output device in accordance with embodiments includes an error amplifier; a controlled conductance output device; and a load predicting circuit; wherein an output of the error amplifier and an output of the load predicting circuit are summed to control the output device.

Abstract: A voltage to frequency conversion system may be used in association with clock related applications such as a closed loop oscillator. The voltage to frequency conversion system includes independent current sources that are synchronously operated to generate substantially the same respective output currents under varying temperature and supply voltage conditions. One of the current sources is used to generate a reference voltage, and the other of the current sources is used to charge a capacitor in a predetermined ramp. The capacitor may be selectively charged and discharged based on a frequency of an input signal, and an average of the variable charge voltage of the capacitor may be compared to the reference voltage to generate an analog output signal indicative of frequency.

Abstract: According to the invention, there is provided a frequency to voltage converter for generating an output voltage proportional to the frequency of input signal. It comprises a switched capacitor circuit for receiving input signal and generating an input current proportional to said frequency, the switched capacitor having a capacitor charging and discharging at said frequency; an operational transconductance amplifier (OTA) for receiving at least one control voltage representative of the input current and generating current proportional to the at least one control voltage; at least one negative feedback circuit connecting input and output of the OTA, each negative feedback circuit comprising: a control transistor coupled to a node of the OTA; a diode connected transistor coupled to the control transistor for sensing current flowing through the control transistor; and a feedback transistor coupled to another node of the OTA.

Abstract: A voltage to frequency conversion system may be used in association with clock related applications such as a closed loop oscillator. The voltage to frequency conversion system includes independent current sources that are synchronously operated to generate substantially the same respective output currents under varying temperature and supply voltage conditions. One of the current sources is used to generate a reference voltage, and the other of the current sources is used to charge a capacitor in a predetermined ramp. The capacitor may be selectively charged and discharged based on a frequency of an input signal, and an average of the variable charge voltage of the capacitor may be compared to the reference voltage to generate an analog output signal indicative of frequency.

Abstract: A phase lock loop (PLL) circuit incorporates switched capacitive circuitry and feedback circuitry to reduce the time to achieve a lock condition. During a first mode, the frequency of a voltage controlled oscillator (VCO) is used to adjust the control voltage of the VCO to achieve a coarse lock condition. During a second mode, a reference frequency is used to control a charge pump to more precisely adjust the control voltage to achieve fine lock of the PLL. Because the VCO frequency is significantly higher than the reference frequency, the control voltage is varied at a greater rate during the first mode. In some embodiments, the time to achieve lock may be further reduced by initializing the VCO control voltage to a particular voltage so as to reduce the difference between the control voltage at start-up and the control voltage at the beginning of the first mode during coarse lock.

Abstract: A time to current conversion apparatus and methods. An impedance having an input for selectively receiving a time varying periodic signal or a known voltage signal is provided; and a current output is coupled to the impedance. By observing the average current through the impedance for the known voltage signal over a time period, and by observing the average current through the impedance for a time varying periodic signal, the duty cycle of the time varying periodic signal may be determined by evaluating a ratio of a first average current observed at the current output while the time varying periodic signal is coupled to the impedance to a second average current observed at the current output while the known voltage signal is coupled to the impedance. An embodiment time to current converter circuit is disclosed. Method embodiments for determining the duty cycle of a time varying periodic signal are provided.

Abstract: A method for operating a magneto-inductive flow measuring device having a measuring tube, wherein an at least partially electrically-conductive measured material flows through the measuring tube. For determining flow, there is produced by means of at least one coil arrangement a clocked magnetic field, which at least partially passes through the measured material, wherein the magnetic field is produced by an exciter current, which flows through the coil arrangement. The magnetic field is operated with at least a first clocking, wherein, in a case in which the coil arrangement is free of exciter current, an electrical potential difference is sensed between the measured material and a reference potential by means of at least a first measuring electrode communicating with the measured material.

Abstract: Techniques are described to mirror currents and subtract currents accurately. In an implementation, a circuit includes a first current source coupled to a first node to provide a current IPD1 and a current mirror coupled to the first node through a first switch T1 to provide a current IREF1. In a closed configuration, the current IREF1 flows from the current mirror into the first node. A sigma delta modulator controls the switch T1 such that over a period of time an average current flowing from the current mirror into the first node is equal to the current IPD1 flowing out of the first node. The sigma delta modulator generates a digital output to control switch T2 to allow a current IREF2 into a second node, thus subtracting a portion of a current IPD2 at the second node over a period of time.

Abstract: A laser source assembly (210) for generating an assembly output beam (212) includes a first laser source (218A), a second laser source (218B), and a dispersive beam combiner (222). The first laser source (218A) emits a first beam (220A) having a first center wavelength, and the second laser source (218B) emits a second beam (220B) having a second center wavelength that is different than the first center wavelength. The dispersive beam combiner (222) includes a common area 224 that combines the first beam (220A) and the second beam (220B) to provide the assembly output beam (212). The first beam (220A) impinges on the common area (224) at a first beam angle (226A), and the second beam (220B) impinges on the common area (224) at a second beam angle (226B) that is different than the first beam angle (226A). Further, the beams (220A) (220B) that exit from the dispersive beam combiner (222) are substantially coaxial, are fully overlapping, and are co-propagating.

Abstract: One configuration of the present disclosure is directed to a switch driver circuit. The switch driver circuit can include an input to receive a control signal; an output to control a state of an switch in accordance with the control signal; and a set of parallel switches. The set of parallel switches in the switch driver circuit includes a P-type field effect transistor in parallel with an N-type field effect transistor. During operation, via variations in the control signal, the control signal selectively and electrically couples a voltage source signal to the output of the switch driver circuit to control the state of the switch.

Abstract: Disclosed herein is a current source, including: a current control oscillator configured to output an oscillation signal of a frequency dependent on an input current; a comparator configured to compare the oscillation signal with a reference signal; a charge pump configured to output a current dependent on a comparison result by the comparator; a low-pass filter configured to include a smoothing capacitor charged and discharged by an output current of the charge pump; a loop converter configured to be connected to the smoothing capacitor and generate a current dependent on a voltage generated by the smoothing capacitor to supply the current as the input current to the current control oscillator; and an output converter configured to be connected to the low-pass filter and generate a current dependent on a voltage generated in the low-pass filter to output the current as an output current.

Abstract: Techniques are described to mirror currents and subtract currents accurately. In an implementation, a circuit includes a first current source coupled to a first node to provide a current IPD1 and a current mirror coupled to the first node through a first switch T1 to provide a current IREF1. In a closed configuration, the current IREF1 flows from the current mirror into the first node. A sigma delta modulator controls the switch T1 such that over a period of time an average current flowing from the current mirror into the first node is equal to the current IPD1 flowing out of the first node. The sigma delta modulator generates a digital output to control switch T2 to allow a current IREF2 into a second node, thus subtracting a portion of a current IPD2 at the second node over a period of time.

Abstract: A frequency-voltage converting circuit 13 is composed of a switch unit including switches SW1 and SW2, electrostatic capacitive elements C and C10 to C13, and switches CSW0 to CSW3. The electrostatic capacitive elements C10 to C13 are composed of elements having mutually different absolute values of capacitance and are provided so as to cover a frequency range intended by a designer. The electrostatic capacitance values are weighted by, for example, 2. The electrostatic capacitive elements C11 to C13 are selected by, for example, the switches CSW0 to CSW3 based on 4-bit frequency adjustment control signals SELC0 to SELC3, thereby carrying out frequency switching.

Abstract: A frequency divider can include at least one input device receiving an input signal, the at least one input device converting the input signal to a current signal; a driver stage with at least two drivers, the at least two drivers receiving the current signal from the at least one input device; a latch stage with at least two latches receiving output signals from the driver stage, the latch stage amplifying the output signals from the driver stage in proportion to an imbalance on the driver stage; and a feedback loop feeding back latch stage output signals to the driver stage. The driver stage and the latch stage can divide the input signal such that the current signal has a frequency of a multiple of the divided signal, and the frequency divider can also include at least one output device to convert the divided signal to a divided voltage signal.

Abstract: A frequency detection apparatus and method are provided. The frequency detection apparatus includes a frequency conversion circuit and an analog conversion circuit. The frequency conversion circuit receives an input clock, and generates an analog signal corresponding to a frequency of the input clock based on the frequency of the input clock. The analog conversion circuit is coupled to the frequency conversion circuit, receives the analog signal, and generates a discriminating signal corresponding to the frequency of the input clock based on the analog signal, where the discriminating signal represents a frequency interval of the input clock.

Abstract: Provided are a data transmitting device transmitting data through a delay insensitive data transmitting method and a data transmitting method. The data transmitting device and the data transmitting method use the delay insensitive data transmitting method supporting a 2-phase hand shake protocol. During data transmission, data are encoded into three logic state having no space state through a ternary encoding method. According to the data transmitting device and the data transmitting method, data are stably transmitted to a receiver regardless of the length of a wire, and provides more excellent performance in an aspect of a data transmission rate, compared to a related art 4-phase delay data transmitting method.

Abstract: A high-accuracy clock signal is generated even when the settings of the clock frequency are changed or there is a variation in power supply, temperature, or the like. A frequency-voltage conversion circuit includes a switch portion including switches, electrostatic capacitive elements, and other switches. The electrostatic capacitive elements have different absolute capacitance values, and are provided so as to cover a frequency range intended by a designer. For example, based on 4-bit frequency adjustment control signals, the other switches select the electrostatic capacitive elements having the electrostatic capacitance values thereof each weighted with 2 to perform the switching of a frequency.

Abstract: Embodiments for at least one method and apparatus of a wireless transceiver are disclosed. For one embodiment, the wireless transceiver includes a transmit chain, wherein the transmit chain includes a power amplifier. The wireless transceiver additionally includes a receiver chain that is tunable to receive wireless signals over at least one of multiple channels, wherein the multiple channels are predefined. Further, the wireless transceiver includes a voltage converter. The voltage converter provides a supply voltage to the power amplifier, and operates at a single switching frequency, wherein the single switching frequency and all harmonics of the single switching frequency fall outside of the multiple channels.

Abstract: There is provided a modulation profile generator and spread spectrum clock generator including the modulation profile generator. The modulation profile generator includes an input signal generator that generates an input signal; a function calculator that outputs a function calculation result in the form of a square root graph by using the input signal as an input of a function; and a profile generator that generates a non-linear modulation profile based on the function calculation result. As a result, it is possible to effectively reduce electromagnetic interference.

Abstract: A resistor element is arranged between an input terminal and a node. A switch element is arranged between the node and a ground voltage, and is conducted according to a voltage level of the node. A resistor element is arranged between the nodes. A resistor element is arranged between the node and one side of the input node of an NOR circuit. A capacitor is connected between the nodes. The input node of the NOR circuit is connected to the node through the resistor element and a ground voltage. The input node of an NOR circuit is connected to an output node of the NOR circuit and the ground voltage. The input node of the NOR circuit is connected to the node and the ground voltage.

Abstract: An oscillator and the control method thereof. The oscillator includes an oscillation unit to receive a first current and to generate an oscillating signal according to the first current, a frequency-to-voltage converter to receive the oscillating signal and to generate a converted voltage according to a frequency of the oscillating signal, and a voltage-to-current converter to receive the converted voltage and to generate the first current according to the converted voltage, wherein the first current is modulated from a first value to a second value after the initiation of the oscillation unit.

Abstract: In a method of manufacturing a photoelectric device, a transparent conductive layer is formed on a substrate, and the transparent conductive layer is partially etched using an etching solution including hydrofluoric acid. Thus, a transparent electrode having a concavo-convex pattern on its surface is formed. When the transparent conductive layer is partially etched, a haze of the transparent electrode may be controlled by adjusting an etching time of the transparent conductive layer. Also, since the etching solution is sprayed to the transparent conductive layer to etch the transparent conductive layer, the concavo-convex pattern on the surface of the transparent electrode may be easily formed even though the size of the substrate increases.

Abstract: A signal generating circuit and method are disclosed that do not require a phase-locked-loop and a low frequency temperature-stable oscillator. The method may include generating an oscillating output signal responsive to a feedback signal, where the feedback signal controls a frequency of the oscillating output signal, generating a current output signal having a magnitude corresponding to the frequency of the oscillating output signal, and then comparing the current output signal to a reference signal to generate the feedback signal. The signal generating circuit may include an oscillator circuit responsive to a feedback signal and a frequency-to-current conversion circuit configured to generate a frequency dependent current signal that is compared to a reference current to generate an output signal corresponding to the frequency of the oscillating output signal. A feedback conversion circuit compares the output signal with a reference signal to generate the feedback signal to the oscillator circuit.

Abstract: A multifunction RF circuit on a single semiconductor chip. The multifunction RF circuit includes a power amplifier circuit, a mixer circuit forming an integral part of the power amplifier circuit and a low-pass filter circuit. The power amplifier circuit may include two amplifier circuits.

Abstract: A frequency-to-voltage (F2V) conversion module includes a pulse shaping module that generates a square wave signal based on an oscillator signal, an edge to pulse conversion module that generates a pulse train based on corresponding rising and falling edges of the square wave signal, and an integrator module that generates an output voltage based on the pulse train. The output voltage is based on a frequency of the oscillator signal.

Abstract: A voltage divider for dividing an input voltage includes a fixed resistor, a variable resistor, an input node and an output node. The fixed resistor has a fixed resistance value independent of an operating frequency, and includes at least one resistance device. The variable resistor has a variable resistance value that varies corresponding to a variation of the operating frequency. The input node receives the input voltage, and the output node outputs an output voltage, which includes the input voltage divided based on the fixed resistance value and the variable resistance value.

Abstract: A frequency detection apparatus and method are provided. The frequency detection apparatus includes a frequency conversion circuit and an analog conversion circuit. The frequency conversion circuit receives an input clock, and generates an analog signal corresponding to a frequency of the input clock based on the frequency of the input clock. The analog conversion circuit is coupled to the frequency conversion circuit, receives the analog signal, and generates a discriminating signal corresponding to the frequency of the input clock based on the analog signal, where the discriminating signal represents a frequency interval of the input clock.

Abstract: A time-to-amplitude component having an integrated designed configured to measure a time difference between a start signal and a stop signal includes a first time-to-amplitude converter having a delay chain, a resistor network, a capacitor configured to be chargeable via the resistor network, and a respective driver. The component further includes a control device and a stabilizing device including a control circuit for generating a regulated control voltage. The first time-to-amplitude converter is configured so that the delay elements of the first time-to-amplitude converter are configured to be controlled by the regulated control voltage, a run signal is transmitted through the delay chain, and the capacitor is continuously charged via the resistor network, and the resistor network is electrically separated from the delay chain via the respective drivers so as to terminate a charging of the capacitor, and the analog voltage signal is measurable at an output of the capacitor.

Abstract: A sub-harmonic mixer and a down converter with the sub-harmonic mixer are provided. The sub-harmonic mixer includes a differential amplifying unit, a current buffer unit, and a switching unit. The differential amplifying unit is used to amplify a radio frequency (RF) signal and employs a first resonance circuit to force a leakage signal to flow to a first voltage. The current buffer unit is used to amplify the gain of an output signal of the differential amplifying unit and employs a second resonance circuit to force the leakage signal to flow to a second voltage. Finally, the switching unit switches an output signal of the current buffer unit into a base band signal.

Abstract: A technique to mitigate noise spikes in an electronic circuit device such as an integrated circuit. The clock frequency of a clock signal used by the electronic circuit is controlled such that instantaneously large changes to the clock frequency are avoided by use of a frequency filter that is capable of generating frequency ramps having a linear slope which is used as a feedback signal in a digital phase-locked loop clock circuit in lieu of a discrete, stair-stepped feedback control signal.

Abstract: A voltage divider for dividing an input voltage includes a fixed resistor, a variable resistor, an input node and an output node. The fixed resistor has a fixed resistance value independent of an operating frequency, and includes at least one resistance device. The variable resistor has a variable resistance value that varies corresponding to a variation of the operating frequency. The input node receives the input voltage, and the output node outputs an output voltage, which includes the input voltage divided based on the fixed resistance value and the variable resistance value.

Abstract: A feed-forward path is combined with a feed-back path to produce an output signal representation of an input signal frequency. The feed-forward path adjusts the output signal representation in response to a change in the input signal frequency, and does so in a response time that is independent of the feed-back path. Input frequencies can be represented as voltages, and first and second input frequency ranges which differ from one another can both be represented in the same range of voltages.

Abstract: A system and method for isolating the input and output of a self-powered current loop includes coupling a voltage to frequency converter to the input terminals and connecting the output of the voltage to frequency converter through an optical isolator, either directly or through other circuitry, to the output terminals depending upon the nature of signals which are to be provided from the circuit.

Abstract: An apparatus for generating a pulse at a particular time dictated by an input. The apparatus may comprise an offset voltage generator for generating an offset voltage that is a function of the input, a current generator for generating a current, a ramp voltage generator for generating a ramp voltage having an initial value as a function of the offset voltage and a slope as a function of the current, and a pulse generator for generating a pulse in response to the ramp voltage reaching a threshold voltage. With this configuration, the time the pulse is generated is controlled by the input. This may be used in transceivers to control the time of transmission and the time of reception. Such times may be used to set up communication channels, such as ultra-wide band (UWB) channels, for communicating with other devices.

Abstract: Because there are different voltages at two current output terminals of a current divider, the voltages at the current input terminals of two current switch circuits are not affected mutually even with a large amplitude of local signals. Accordingly, the performance of a quadrature mixer can be enhanced by increasing the amplitude of the local signals. Bias currents are supplied to the two current switch circuits through the current divider from a common DC current source which essentially supplies a bias current to a V/I converter and, therefore, power consumption is reduced.

Abstract: An apparatus and method for automatically offsetting the linear deviation of a V/F converter, the offset adjust pin of which is connected to a fixed resistance, and the frequency output pin of which is connected to a microcontroller unit (MCU) via an opto-isolator, a standard V/F transfer function being pre-stored in the MCU, wherein standard frequencies F1 and F0 (i.e., two coordination points (V1, F1) and (V0, F0)) are output by the V/F converter, when V1 and V0 are input as standard voltages, and the MCU may detect an error status in the V/F converter, when the V/F converter obtains real output frequencies F1? and F0? from real input voltages V1 and V2, and standard coordination points (F1, K1) and (F0, K0) will be corrected to (F1?, K1) and (F0?, K0?), from which a transfer function of offsetting frequency down is obtained, when the MCU processes a frequency down procedure.

Abstract: A self-adjusting clock generator is disclosed. The self-adjusting clock generator comprises a voltage control oscillator for generating a frequency output, a frequency to voltage converter for converting the frequency output into a voltage output, and a comparator for comparing the voltage output with a reference voltage in order to produce a comparison voltage. The produced comparison voltage is provided as feedback to the voltage control oscillator such that the frequency output generated by the voltage control oscillator is adjusted, based on the comparison voltage, to converge into a stable frequency output.

Abstract: A frequency-controllable oscillator, having an oscillation device in which the oscillation frequency is controlled on the basis of a feedback current or voltage; a constant current source circuit; a charge device which charges a capacitor with a constant current from the constant current source circuit on the basis of an oscillation output from the oscillation device; and a control device which generates the current or voltage for control of the oscillation frequency of the oscillation device on the basis of electric charge stored in the capacitor and a predetermined reference value and which includes an integrator formed of an operational amplifier and an integrating capacitor, the Integrator performs integration on the basis of the charged voltage across the capacitor and the predetermined reference value, and the current or voltage for control of the oscillation frequency of the oscillation device is generated on the basis of an integrated output from the integrator.

Abstract: A multichannel receiver for effectively receiving multichannel signals at the same time without any restrictions in the symbol timing and channel interval of modulated signals. A quadrature detector of the multichannel receiver includes first and second multipliers. The first multiplier multiplies a received signal by a real number axis signal generated from a quadrature carrier oscillator. The second multiplier multiplies a received signal by an imaginary number axis signal. The quadrature detector converts a carrier of a center signal of odd signals into a DC component of zero frequency, and converts the center signal into a complex baseband signal, and at the same time converts carrier signals other than the center carrier signal into a complex IF signal symmetrical to the DC component of zero frequency. ADCs (Analog-to-Digital Converters) convert the complex IF signals into complex IF digital signals.

Abstract: A start signal outputting circuit according to the invention has a differential RF/DC convertor part 100 for converting a high frequency power (RF) into a d.c. potential (DC). The RF/DC convertor part 100 is formed by two transistors QRD, QDD working as a diode, and transistors QR1˜R3, QD1˜D3 and resistances RR1˜R3 for forming high resistances at anode sides and cathode sides of these diodes, respectively. A differential amplification part 200 disposed at a later stage of the diode has not only amplifying effect but also low-pass filtering effect together with filtering pars 120, 210 of its previous and later stages. In this case, it is designed so that current flowing through the respective circuits is about 2˜3 ?A. As a result, even if the high frequency power of the specified frequency is weak, for example ?60˜?40 dBm, a start signal outputting circuit 1000 which outputs a d.c. potential of 0.3˜2.4V, is suitable for integration and has a low power consumption can be obtained.