Abstract: A load drive circuit with a current bidirectional detecting function includes: a current bidirectional switch connected between a first wire and a second wire and through which a first forward current flows in a direction from the first wire to the second wire and a first backward current flows in a direction from the second wire to the first wire; a forward current detecting switch connected to the first wire and into which a second forward current correlated to the first forward current flowing through the current bidirectional switch flows; a backward current detecting switch connected to the second wire and into which a second backward current correlated to the first backward current flowing through the current bidirectional switch flows.

Abstract: The invention relates to a driver circuit used to transmit a digital signal from a source device to a destination device. The driver circuit provides a controlled switching time to improve digital signal quality, while reducing electromagnetic interference. In the circuit, a pair of first switches of a first plurality are coupled in parallel between a first current node and respective ones of first and second output terminals. A plurality of pairs of second switches of a second plurality are coupled in parallel between a respective second current node and the first and second output terminals. Timing circuitry applies input signals to the pair of first switches and successive input signals to the pairs of second switches so as to develop a staggered voltage across a load coupled between the first and second output terminals.

Abstract: An architecture for resonant clock distribution networks is proposed. This architecture allows for the energy-efficient operation of a resonant clock distribution network at multiple clock frequencies through the deployment of flip-flops that can be selectively enabled. The proposed architecture is primarily targeted at the design of resonant clock networks with integrated inductors and exhibits no inductor overheads. Such an architecture is generally applicable to semiconductor devices with multiple clock frequencies, and high-performance and low-power clocking requirements such as microprocessors, ASICs, and SOCs. Moreover, it is applicable to the binning of semiconductor devices according to achievable performance levels.

Abstract: To include a switch transistor inserted between a data bus and an input end of a signal receiving circuit and turned off when a potential of the data bus reaches VPERI?NVth, and an assist transistor that drives the input end of the signal receiving circuit to have VPERI. According to the present invention, because the switch transistor and the assist transistor assist a receiving operation performed by the signal receiving circuit, amplitude of a transferred signal can be reduced without reducing a transfer rate. With this configuration, power consumed by charging or discharging of the data bus can be reduced.

Abstract: Malfunction attributable to an induced electromotive force such as a back electromotive force or a regenerative braking force of an inductive load in a load driving device is prevented. When an on-state current flows in an output transistor, a second transistor applies a supply voltage applied to a source of the output transistor to a back gate of the first transistor. On the other hand, when a negative current flows in the output transistor in a direction opposite to that of the on-state current, the second transistor applies a supply voltage applied to a drain of the output transistor to the back gate of the first transistor.

Abstract: An electrical component having a primary winding, a first field-effect transistor, configured as a switch of the primary winding, for switching the primary winding, a quench winding for quenching the inductive load of the primary winding when switching off the primary winding, and a second field-effect transistor, configured as a switch of the quench winding, for switching the quench winding. In the process, the first field-effect transistor is operated in linear operation and the second field-effect transistor is operated in linear operation or in a clock-pulsed operation between the linear operation and a switched-off state during a switching-off process of the quench winding.

Abstract: An output driver circuit can include at least a first driver transistor having a source-drain path coupled between a first power supply node and an output node. A first variable current supply can generate a current having at least one component that is inversely proportional to a power supply voltage. A first driver switch element can be coupled in series with the first variable current supply between a gate of the at least first driver transistor and a second power supply node.

Abstract: An power stage has a differential output stage 2 driven by one or more buffer stages 4. The buffer stages 4 are implemented as high and low side buffers 12,14, each of which is itself a differential buffer implemented using transistors formed in an isolated-well technology such as triple-well CMOS.

Abstract: The present invention discloses a transistor driving module, coupling to a converting controller, to driving a high side transistor and a low side transistor connected in series, wherein one end of the high side transistor is coupled to an input voltage and one end of the low side transistor is grounded. The transistor driving module comprises a high side driving unit, a low side driving unit, a current limiting unit and an anti-short through unit. The high side driving unit generates a high side driving signal to turn the high side transistor on according to a duty cycle signal, and the low side driving unit generates a low side driving signal turn the low side transistor on according to the high side driving signal. The current limiting unit is coupled to the high side transistor and the high side driving unit, and generates a current limiting signal when a current flowing through the high side transistor higher than a current limiting value.

Abstract: An interference-tolerant transmitter is provided. In accordance with various example embodiments, a transmitter circuit includes a control circuit configured to maintain the sum of current as applied to a load from respective high-side and low-side current sources at a target level (e.g., range). In some applications, clamp circuits are used to clamp current to high and low sides of the load respectively in response to changes at the low-side and high-side of the load.

Abstract: A re-driver circuit has pre-driver, intermediate, and output stages. Pre-emphasis on the output is generated by the intermediate stage and injected into an output stage. The intermediate stage is a frequency-tuned amplifier that has an inductive-capacitive L-C tank circuit that is tuned to a desired frequency of the output. The intermediate stage does not directly drive the output stage. Instead, an on-chip coupling transformer couples the L-C tank circuit to the output stage. The coupling transformer has a first inductor that is part of the L-C tank circuit in the intermediate stage, and a second inductor that is part of the output stage. Mutual inductance between the first inductor and the second inductor inductively couple a pre-emphasis voltage onto the output. The magnitude of the pre-emphasis can be changed by adjusting current in the intermediate stage.

Abstract: A resonant clock distribution network architecture is proposed that is capable of single-step operation through the use of selective control in the resonant clock drivers and the deployment of flip-flops that require the clock to remain stable for a sufficiently long time between any two consecutive state updates. Such a network is generally applicable to semiconductor devices with various clock frequencies, and high-performance and low-power clocking requirements such as microprocessors, ASICs, and SOCs.

Abstract: A circuit arrangement comprising a first semiconductor switching element, which has a load path and a drive terminal. A voltage supply circuit, is provided including an inductance connected in series with the load path of the first semiconductor switching element, and a capacitive charge storage arrangement, which is connected in parallel with the inductance and which has a first and a second output terminal for providing a supply voltage.

Abstract: A signal transmitting apparatus that may suppress generation of a noise voltage attributable to a common mode voltage is provided. A transistor P1 is connected between a first terminal of a sending coil and a power supply voltage. A transistor N1 is connected between the first terminal and a ground voltage. A transistor P2 is connected between a second terminal of the sending coil wand the power supply voltage. A transistor N2 is connected between the second terminal and the ground voltage. In a period-PE1, a coil current flowing in a positive direction is generated by turning on the transistors P1 and N2 and turning off the transistors P2 and N1, and then the transistor N1 is turned on in response to turning off the transistor P1. In a period PE2, a coil current flowing in a negative direction is generated by turning off the transistors P1 and N2 and turning on the transistors P2 and N1, and then the transistor N2 is turned on in response to turning off the transistor P2.

Abstract: A half bridge converter includes a transformer with a high side switch coupled between a first input terminal and a primary winding of the transformer. A low side switch is coupled between a second input terminal and the primary winding. A first control circuit is coupled to the first input terminal and the primary winding to control the high side switch in response to a rate of voltage change with respect to time across the high side switch while the high side switch is off. A second control circuit coupled to the primary winding and the second input terminal to control the low side switch in response to a rate of voltage change with respect to time across the low side switch while the low side switch is off.

Abstract: Repeater circuits including an inverting zipper repeater circuit and an inverting gain-enhanced repeater circuit are described.

Abstract: Systems, methods, and apparatus to drive reactive loads are disclosed. An example apparatus to drive a reactive load includes a reactive component in circuit with the reactive load, a first switching element in circuit with the reactive load to selectively hold the reactive load in a first energy state and to selectively allow the reactive load to change from the first energy state to a second energy state, a second switching element in circuit with the reactive load to selectively hold the reactive load in the second energy state and to selectively allow the reactive load to change from the second energy state to the first energy state, and a controller to detect a current in the reactive load, and to control the first and second switching elements to hold the reactive load in the first or the second energy state when the current traverses a threshold.

Abstract: A resonant gate drive circuits for a voltage controlled transistor according to the embodiments are characterized by connecting a resonant inductor and a resistor to a gate of the voltage controlled transistor or a gate of the normally-on voltage controlled transistor or a voltage control terminal of a pseudo normally-off element, in series, and providing the drive circuit with two complementary switching elements connected in series.

Abstract: Methods and apparatus to minimize saturation in a ground fault detection device are disclosed. An example method includes connecting a capacitor simulator to a node of the ground fault detector device to prevent saturation, and monitoring power-line conductors for ground fault conditions with the ground fault detector device. An example apparatus to simulate a saturation capacitance in a ground fault device includes a sense coil induced by power-line conductors, and at least one of an amplifier or a current detector including an input connected to the sense coil and an output connected to a ground fault detector. The example apparatus also includes a saturation capacitor simulator connected to a node of at least one of the amplifier or the current detector to prevent saturation.

Abstract: A switch arrangement comprises a first and a second terminal (1, 2), a first switch (3), a current sensor (10), a first and a second control circuitry (20, 30). The first switch (3) comprises a control terminal (4), a first terminal (5) which is coupled to the first terminal (1) of the switch arrangement and a second terminal (6) which is coupled to the second terminal (2) of the switch arrangement. The current sensor (10) is realized for the measurement of a load current (Iload) flowing through the first switch (3). The first control circuitry (20) is coupled to an output terminal of the current sensor (10) and to the control terminal (4) of the first switch (3). The second control circuitry (30) is coupled to the control terminal (4) of the first switch (3).

Abstract: A circuit for use in a half bridge converter includes a high side switch coupled between a positive input terminal and a first terminal of a primary transformer winding. A low side switch is coupled between a negative input terminal and the first terminal. A first control circuit is coupled to the high side switch to sense a slope of a voltage across the high side switch while the high side switch is off to control the high side switch in response to the sensed slope across the high side switch. A second control circuit is coupled to the low side switch to sense a slope of a voltage across the low side switch while the low side switch is off to control the low side switch in response to the sensed slope of the voltage across the low side switch.

Abstract: A re-driver circuit has pre-driver, intermediate, and output stages. Pre-emphasis on the output is generated by the intermediate stage and injected into an output stage. The intermediate stage is a frequency-tuned amplifier that has an inductive-capacitive L-C tank circuit that is tuned to a desired frequency of the output. The intermediate stage does not directly drive the output stage. Instead, an on-chip coupling transformer couples the L-C tank circuit to the output stage. The coupling transformer has a first inductor that is part of the L-C tank circuit in the intermediate stage, and a second inductor that is part of the output stage. Mutual inductance between the first inductor and the second inductor inductively couple a pre-emphasis voltage onto the output. The magnitude of the pre-emphasis can be changed by adjusting current in the intermediate stage.

Abstract: A technique for a reverse conducting semiconductor device including an IGBT element domain and a diode element domain that utilize body regions having a mutual impurity concentration, that makes it possible to adjust an injection efficiency of holes or electrons to the diode element domain, is provided. When a return current flows in the reverse conducting semiconductor device that uses an NPNP-type IGBT, a second voltage that is higher than a voltage of an emitter electrode is applied to second trench gate electrodes of the diode element domain. N-type inversion layers are formed in the periphery of the second trench gate electrodes, and the electrons flow therethrough via a first body contact region and a drift region which are of the same n-type. The injection efficiency of the electrons to the return current is increased, and the injection efficiency of the holes is decreased.

Abstract: Systems and methods are disclosed to detect current for an output load with an inductor. The system includes a high side power transistor a low side power transistor coupled to the high side power transistor; and a controller coupled to the high and low side power transistors to provide cycle by cycle conduction of the low side power transistor, said controller adaptively turning off the low side power transistor when the high and low side power transistors are off and an inductor current is non-positive. Adaptation of the turn off of the low side transistor is based on the time position of the detection of the non-positive inductor current and serves to improve the power efficiency of the system.

Abstract: A driver chip for driving an inductive load and a module having a driver chip are provided. The driver chip contains a first transistor for coupling a first potential to a first output and a second transistor for coupling a second potential to the first output. A first protection circuit reduces an increased voltage between a control terminal and a load junction terminal of the first transistor. The driver chip has a first state in which the second transistor is turned off and the first transistor can switch a passive inductive load connected to the output. In a second state, the first transistor and the second transistor can switch an external power transistor connected to the first output. A second output is connected to a load junction terminal of the external power transistor. A second protection circuit reduces an increased voltage between the first and second outputs.

Abstract: A solid state relay has independent charge pumps isolating each gate of a full bridge to achieve faster and proper gate turn on. The low side MOSFETs of the bridge are the current sensing device reducing loss and allowing a device controlled by the relay to achieve peak performance. Dynamic braking is achieved by the two low side MOSFETs being fully conducted and applying a load across the DC motor. Addition of a microprocessor to the device provides undervoltage sensing, current vs time readings, motor stall sensing, and motor temperature sensing. Motor temperature is detected by checking impedance of the motor at microsecond pulses to see if the motor is getting hot.

Abstract: Controlling a resonant switching system, which includes a first switch and a second switch in a half-bridge configuration for driving a resonant load. A corresponding control system includes command means for switching on and switching off the switches alternatively according to a working frequency of the switching system. The control system includes detection means for detecting a zeroing of a working current being supplied by the switching system to the resonant load in a temporal observation window; the observation window follows each switching off of at least one of the switches, and has a length equal to a fraction of a to working period of the switching system. Correction means are then provided for modifying the working frequency in response to each detection of the zeroing in the observation window.

Abstract: A data transmission circuit includes a clock driver to obtain a clock signal having a first rate and to drive the clock signal onto one or more transmission lines. The data transmission circuit also includes a timing circuit to obtain the clock signal and to generate a symbol clock having a second rate. The first rate is a multiple of the second rate, wherein the multiple is greater than one. The data transmission circuit further includes a data driver synchronized to the symbol clock. The data driver obtains a data signal and drives the data signal onto the one or more transmission lines at the second rate. The data signal and the clock signal are driven onto the one or more transmission lines simultaneously.

Abstract: An H-bridge circuit formed from two sub-circuits coupled to each other by a load network across a respective load node of each of the sub-circuits. Each sub-circuit of the two sub-circuits comprises a depletion mode upper transistor with a second electrode coupled to a first electrode of a lower transistor. The load node of the sub-circuit is disposed between the second electrode of the upper transistor and the first electrode of a lower transistor. There is a first voltage supply node coupled to a first electrode of the upper transistor and a second voltage supply node is coupled to a second electrode of the lower transistor. An upper driver transistor selectively couples a gate electrode of the upper transistor to an upper drive voltage node, the upper driver transistor having a control electrode coupled to an upper switched voltage supply circuit.

Abstract: An inductive load driving device includes a first switching element, a second switching element, a counter current regeneration circuit, and a circuit element protection circuit. The first switching element is coupled between an output terminal of the power circuit and one end of the inductive load. The second switching element is coupled between the other end of the inductive load and a ground terminal. The counter current regeneration circuit is configured to supply to the output terminal of the power circuit, a counter current output from the other end of the inductive load when the first and second switching elements are in off-state. The circuit element protection circuit is configured to turn on the second switching element when a value of the output voltage of the power circuit becomes equal to or more than a threshold value.

Abstract: According to one embodiment, a voltage output circuit is disclosed. The circuit has: a transistor connected between a first terminal and a second terminal, the transistor having a gate connected to a first node and being switched in accordance with control signal; a first pull-up circuit configured to pull-up the first node voltage when the control signal is first level; a pull-down circuit configured to pull-down the first node voltage when the control signal is second level; a monitor configured to cause a second node voltage to be second level when a difference between the input voltage and the first node voltage is larger than a reference voltage; and a second pull-up circuit configured to pull-up the first node voltage when the control signal is first level and also the second node voltage is second level.

Abstract: A driving circuit of a semiconductor optical amplifier type gate switch constituting a matrix optical switch is provided with an operation amplifier into which a driving signal is input and from which a current corresponding to the driving signal is output, an inductance element provided at an output terminal of the operation amplifier, and a circuit composed of a diode element and a resistor element connected in parallel and provided between the inductance element and the semiconductor optical amplifier.

Abstract: An output stage comprising a current mode line driver, a voltage mode line driver, and a center-tapped transformer for coupling data provided by the line drivers to a transmission line is provided herein. The output stage is configured to operate in a backwards compatible Ethernet communication device. For example, the Ethernet communication device is configured to support 10G Ethernet and legacy Ethernet modes of 10BASE-T, 100BASE-T, and 1000BASE-T. The current mode line driver can be utilized while operating in the 10G Ethernet mode to provide high linearity. The voltage mode line driver can be utilized while operating in legacy mode to conserve power. In order to accommodate the use of two different line drivers, a switch and/or a voltage regulator is used to couple/decouple a dc voltage to a center-tap of the transformer based on which of the two different line drivers is currently active.

Abstract: A gate driver for performing gate shaping on a first transistor of having gate, source, and drain terminals, the first transistor being selected from a switching stage of a power switching circuit having high- and low-side transistors series connected at a switching node for driving a load. The gate driver includes the following steps: upon receipt of an ON pulse pre-charging the gate terminal until gate to source terminal voltage equals Vth, controlling the di/dt(ON) flowing in the first transistor while free wheeling current is flowing in a second transistor of the switching stage, and controlling the dv/dt(ON) of the first transistor while a charge on the gate terminal is present; and upon receipt of an OFF pulse controlling the dv/dt(OFF) of the first transistor until free wheeling current is flowing in the second transistor, and controlling the di/dt(OFF) flowing in the first transistor while the gate to source terminal voltage equals Vth.

Abstract: A first driver device and a first diode are connected in parallel between an output node and a first voltage node. A second driver device and a second diode are connected in parallel between the output node and a second voltage node. When a first switching time comes, a first drive control section switches the first driver device from the off state to the on state after detecting that an output voltage at the output node reaches a predetermined first reference voltage. When a second switching time comes, the first drive control section switches the first driver device from the on state to the off state. A second drive control section switches the second driver device from the on state to the off state when the first switching time comes, and switches the second driver device from the off state to the on state when the second switching time comes.

Abstract: A switching power supply device performs a stable operation with fast response for a semiconductor integrated circuit device. A capacitor is provided between the output side of an inductor and a ground potential. A first power MOSFET supplies an electric current from an input voltage to the input side of the inductor. A second power MOSFET turned on when the first power MOSFET is off allows the input side of the inductor to be of a predetermined potential. A first feedback signal corresponding to an output voltage obtained from the output side of the inductor and a second feedback signal corresponding to an electric current flowed to the first power MOSFET are used to form a PWM signal. The first power MOSFET has plural cells of a vertical type MOS-construction.

Abstract: A technique for simplifying the control of a switch is presented. In one embodiment, a method of controlling a switch as a function of the voltage across the switch is presented. In one embodiment a method of controlling a switch as a function of the slope of the voltage across the switch is present. In one embodiment a switching is switched on for an on time period that is substantially fixed in response to a voltage across the switch while the switch is off. In one embodiment a switch is switched on for an on time period that is substantially fixed in response to the slope of the voltage across the switch while the switch is off.

Abstract: Malfunction attributable to an induced electromotive force such as a back electromotive force or a regenerative braking force of an inductive load in a load driving device is prevented. When an on-state current flows in an output transistor, a second transistor applies a supply voltage applied to a source of the output transistor to a back gate of the first transistor. On the other hand, when a negative current flows in the output transistor in a direction opposite to that of the on-state current, the second transistor applies a supply voltage applied to a drain of the output transistor to the back gate of the first transistor.

Abstract: A driver circuit and integrated circuit implementation of a driver circuit for driving a GaN HFET device is disclosed. The driver circuit includes a resonant drive circuit having an LC circuit with an inductance and a capacitance. The capacitance of the LC circuit includes the gate-source capacitance of the GaN HFET device. The driver circuit further includes a level shifter circuit configured to receive a first signal and to amplify the first signal to a second signal suitable for driving a GaN HFET device. The resonant drive circuit is controlled based at least in part on the second signal such that the resonant drive circuit provides a first voltage to the GaN HFET device to control the GaN HFET device to operate in a conducting state and to provide a second voltage to the GaN HFET device to control the GaN HFET device to operate in a non-conducting state.

Abstract: A transmission driver including a main driving stage and a sub-driving stage is provided. The main driving stage has a main current source, and is adapted for receiving a first differential input data stream and outputting a differential output data stream by using the main current source. The sub-driving stage has two sub-current sources, and is adapted for receiving a second differential input data stream and counteracting/reducing the attenuation or distortion of the differential output data stream caused by a long transmission distance by using the sub-current sources. There is a delay of a specific bit length between the first and the second differential input data streams.

Abstract: As part of a transmitter and receiver system a droop compensator is provided between the channel isolation device and the driver system to compensate for reduced transition densities. The droop compensator is configured to improve power transfer to the channel in response to reductions in transition density without affecting power transfer during periods of high transition density. The droop compensator creates an impedance mismatch between the matching circuit and driver in relation to the line impedance. The droop compensator may comprise passive elements, such as capacitors, inductors, or resistor, or active elements including transistors or power control modules. The droop compensator may be configured to operate with transformer line couplers or capacitor line couplers, and either current drivers or voltage drivers.

Abstract: A receiver and a method for dynamically adjusting sensitivity of the receiver are provided. The receiver includes a detection unit and a receiving unit. The detection unit detects an input signal group, and outputs a detection result. The receiving unit receives the input signal group according to a sensitivity. Wherein, the receiving unit dynamically adjusts the sensitivity used for receiving the input signal group according to the detection result of the detection unit.

Abstract: An integrated circuit may include at least a first replica driver stage coupled between a reference impedance input and a first power supply node and having a first programmable driver impedance set by a first driver configuration value in the same manner as a first output driver section of the integrated circuit. At least a first replica input termination stage may be coupled between the reference impedance input and the first power supply node and having a first programmable termination impedance set by a first termination configuration value in the same manner as a first input termination section of the integrated circuit. An impedance programming circuit may generate at least the first driver configuration value and the first termination configuration value in response to a potential at the reference node.

Abstract: A drive circuit for an IGBT includes an H-bridge circuit using first to fourth switch elements. When a control unit receives a command for changing the IGBT from an on state to an off state, it switches states of the first to fourth switch elements from a first state in which the first and fourth switch elements are in an on state and the second and third switch elements are in an off state to a second state in which the first and fourth switch elements are in the off state and the second and third switch elements are in the on state. This structure of the drive circuit can apply a reverse bias to the IGBT from a single power supply.

Abstract: A method for driving a load includes driving a load to an initial voltage within a voltage window, the voltage window based on an input voltage and an offset voltage, and driving the load to approximately the input voltage.

Abstract: A source driver, which has a first resistor string, a first digital-to-analog converter, and a channel buffer, is provided. The first resistor string has a plurality of resistors connected in series, wherein each of the resistors of the first resistor string provides a corresponding gamma voltage. The first digital-to-analog converter is coupled to the resistors of the first resistor string. The digital-to-analog converter selectively outputs one of gamma voltages provided by the resistors as a first output voltage according to a data code. The channel buffer is coupled to an output terminal of the first digital-to-analog converter to output a second output voltage by shifting a voltage level of the first output voltage.

Abstract: A gate driving circuit for a voltage-driven power semiconductor switching device has (a) the voltage-driven power semiconductor switching device, (b) a driving circuit for supplying a drive signal to the gate electrode of the switching device, and (c) an inductance between the emitter control terminal or source control terminal of the switching device and the emitter main terminal or source main terminal of a semiconductor module. A voltage produced across the inductance is detected. The gate-driving voltage or gate drive resistance is made variable based on the detected value.

Abstract: A gate driver for a power MOSFET in, for example, a DC-DC converter switches the MOSFET between a fully-on condition and a low-current condition instead of switching the MOSFET between fully-on and fully-off conditions. The amount of charge that must be transferred to charge and discharge the gate of the MOSFET is thereby reduced, and the efficiency of the MOSFET is improved. A trimming process is used to adjust the magnitude of the voltage supplied by the gate driver to the gate of the power MOSFET in the low-current condition.

Abstract: A circuit is provided to reduce power loss on switching. A pair of auxiliary switching devices is switched on before a pair of switching devices. The switching devices are switched on after a corresponding capacitor to the auxiliary switching devices is discharged to zero. Thus, the power loss of the switching devices is reduced.

Abstract: The present invention discloses a capacitive high-side switch driver for a power converter. The capacitive high-side switch driver according to the present invention includes an inverter and two alternately conducting totem-pole buffers with complementary duty cycles. The duty cycles alternate in response to an input signal. The capacitive high-side switch driver further includes a low-side transistor and a high-side transistor. Once the low-side transistor is turned on, a bootstrap capacitor is charged to create a floating voltage via a charge-pump diode to supply power for the high-side switch driver. To supply additional power for the high-side switch driver, differential signals are produced to further charge the bootstrap capacitor via a bridge rectifier. The capacitive high-side switch driver utilizes a programmable load to provide variable impedance. Furthermore, an under-voltage protector supervises the supply voltage to ensure a reliable gate driving voltage.