With Rectifying Element Patents (Class 327/128)
  • Patent number: 10594299
    Abstract: The present disclosure provides an analog counter circuit for use in a minimal-sized circuitry. The analog counter circuit of the present disclosure can provide much higher resolution versus power consumption and layout area as compared to conventional digital counters. The analog counter circuit of the present disclosure can also provide much better bias supply management, step accuracy, multi-element step uniformity and lower supply spiking as compared to conventional analog counter architectures. The compact size of the disclosed counter circuit allows better integration of arrayed elements, such as, an array of image sensing pixels or an array of artificial neurons.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: March 17, 2020
    Assignee: SENSEEKER ENGINEERING, INC.
    Inventors: Kenton Veeder, Aaron Bluestone, Christoph von Jutrzenka Trzebiatowski, Nishant Dhawan
  • Patent number: 8604836
    Abstract: A detector circuit, has a first diode, to an anode of which an AC signal is input and to which a constant voltage is supplied, a second diode, to an anode of which the constant voltage is supplied, and a difference current generation circuit, which generates the difference current between a first current flowing in the first diode and a second current flowing in the second diode.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: December 10, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Hiroyuki Nakamoto
  • Patent number: 8604837
    Abstract: A detector circuit, has a first diode, to an anode of which an AC signal is input and to which a constant voltage is supplied, a second diode, to an anode of which the constant voltage is supplied, and a difference current generation circuit, which generates the difference current between a first current flowing in the first diode and a second current flowing in the second diode.
    Type: Grant
    Filed: June 17, 2013
    Date of Patent: December 10, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Hiroyuki Nakamoto