Abstract: A clock generation circuit for generating a plurality of output clocks includes: a differential circuit for receiving a single input clock signal and outputting two differential clock signals, and a DC signal; a first polyphase filter for generating four clock signals from the differential clock signals which are a quadrature phase apart from each other; a plurality of setting buffers for setting a same DC point for the four clock signals and generating four resultant clock signals; coupled polyphase filters for generating four more clock signals which are a quadrature apart from each other, and outputting the resultant eight clock signals; a phase mixer, for generating eight output clock signals 45 degrees apart from each other; and a plurality of restoration buffers for setting a DC point for each of the eight clock signals and generating eight output clock signals all riding on a same DC point.

Abstract: A resonant power converter has a main switch, a resonant tank coupled across the main switch, and a signal processing circuit coupled to the main switch and the resonant tank. The signal processing circuit generates a driving signal for driving the main switch ON and OFF at a switching frequency. The resonant tank includes circuit components designed to have a resonant frequency that is tuned to a designed switching frequency of the main switch. The signal processing circuit includes a zero voltage switching (ZVS) circuit, a signal generator, a detection circuit, and a latch oscillator. The signal processing circuit is configured to adjust the switching frequency of the driving signal to be tuned to the actual resonant frequency of a resonant tank under very high switching frequency conditions, 1 MHz and greater, thereby accounting for the influence of parasitics at very high switching frequencies and achieving resonance of the circuit.

Abstract: An indoor geolocation system for determining a location in three-dimensional space includes a plurality of base stations and a mobile device movable about an indoor environment in three dimensions. The mobile device detects electromagnetic signals in the indoor environment emitted by devices other than the base stations, and generates a signal profile based on the signals. The mobile device transmits the signal profile to one or more of the base stations, which forward the signal profile to a remote server. The system determines a location of the in three-dimensional space of the mobile device by comparing the signal profile to data regarding signal profiles at a plurality of locations in the indoor environment. The data regarding signal profiles in the indoor environment may have been captured by a detection device other than the mobile device at a time prior to the detection of the electromagnetic signals by the mobile device.

Abstract: A temperature compensated crystal oscillator implements temperature compensation by generating and applying a temperature compensation signal via a function having a plateau region and a higher slope region, where a horizontal position of the higher slope region, a slope value in the higher slope region, and a function value change magnitude over the higher slope region are adjustable.

Abstract: A voltage controlled oscillator implements optimising its effective frequency versus voltage transfer function by generating and applying a frequency control signal via a function having a plateau region and a higher slope region, where a horizontal position of the higher slope region, a slope value in the higher slope region, and a function value change magnitude over the higher slope region are adjustable.

Abstract: A converter circuit is used to selectively convert an analog input voltage into a digital output signal or a digital input signal into an analog output voltage as a function of a mode signal. The converter circuit includes a control circuit configured to generate a start-of-conversion signal. A ramp generator is configured to, when the mode signal indicates an analog-to-digital conversion, generate a timer stop signal after a time interval that is determined as a function of the value of the analog input voltage, thereby implementing an analog-to-time conversion. When the mode signal indicates a digital-to-analog conversion, ramp generator is configured to vary the ramp signal until a ramp stop signal is set and, in response to the ramp stop signal, determine the analog output voltage as a function of the ramp signal, thereby implementing a time-to-analog conversion.

Abstract: A beamforming receiver 100 for receiving multiple radio signals and generating multiple output beam signals is disclosed. The beamforming receiver (100) comprises multiple beam parameter inputs (130) to receive multiple beam parameters and an element array (110) comprising a plurality of elements (120). The beamforming receiver 100 further comprises a loading unit 140 coupled to each element 120 in the element array 110. The beamforming receiver 100 further comprises a reference clock generating and splitting circuit 150 to generate and distribute reference clock signals for each element 120.

Abstract: A number of field effect transistor circuits include voltage controlled attenuators or voltage controlled processing circuits. Example circuits include modulators, lower distortion variable voltage controlled resistors, sine wave to triangle wave converters, and or servo controlled biasing circuits.

Abstract: A Fai 2 converter includes an isolated Fai 2 inverter coupled to a resonant rectifier with either clamped diodes or clamped self-driven synchronous rectifiers. The Fai 2 inverter converts an input DC signal to a high-frequency AC signal. The resonant rectifier with either clamped diodes or clamped self-driven synchronous rectifiers rectifies the high-frequency AC signal to a DC signal while clamping the voltage across the clamped diodes or clamped self-driven synchronous rectifiers to the output voltage. Clamping the voltage in this manner minimizes the voltage stress and enables the use of low voltage stress components (diodes or synchronous rectifiers) with low conduction voltage drop.

Abstract: A resonance inverter includes a first coil provided between an input terminal and a switch element, a first capacitor provided between the drain and the source of the switch element, a second capacitor serially connected between the drain and the source of the switch element, and a second coil. A drain-source voltage of a switch element can be effectively lowered, by setting a serial resonance frequency based on the second coil and the second capacitor to a value higher than twice of a driving frequency, and lower than 2.75 times thereof.

Abstract: A power-supply-side coil receives an alternating current from an AC power source to produce a magnetic flux. A power-supply-side capacitor is connected in parallel with the power-supply-side coil. A power-supply-side filter circuit includes a reactor and a capacitor, which are connected in series between the AC power source and the power-supply-side coil. A power-receiving-side coil is interlinked with a magnetic flux produced by the power-supply-side coil to produce an alternating current. The power-supply-side filter circuit, the power-supply-side capacitor, and the power-supply-side form a circuit having an impedance having a frequency characteristic, in which a frequency of a minimum point formed on a high-frequency side relative to a maximum point is greater than a frequency of a fundamental wave of an alternating current supplied from the AC power source and is less than a frequency of a third order wave of the fundamental wave.

Abstract: A sine pulse width modulation controller includes an edge detection unit for receiving a feedback input signal from the external electrical device to generate an edge signal, a register unit for storing and outputting a parameter signal, an angle increasing unit for receiving the edge signal and the parameter signal, determining cycles of pulse width modulation and generating an angle signal, a sine calculation unit for receiving the angle signal and performing a recursive algorithm based on the angle signal to implement the recursive algorithm so as to generate a sine calculation value, a multiplication unit for receiving the sine calculation value which is then further multiplied by the amplitude signal from the register unit to generate a pulse width signal, and a sine output unit receiving the pulse width signal to generate driving signals for driving the external electrical device to generate a sine terminal voltage.

Abstract: A conductivity sensor is described in which electrodes are held in a desired position within a housing of the sensor by a number of slots accurately positioned within the housing. In one embodiment the slots are integrally formed within the housing. Once the electrodes have been inserted into the slots a thermoset resin is poured into the housing and cured. A through bore is then drilled through the housing, the electrodes and the cured resin to form a flow conduit through the sensor. A dual frequency excitation technique is also described that allows a measurement to be obtained of a polarisation resistance of the electrodes. In one embodiment this measurement is stored and used to correct subsequent conductivity measurements.

Abstract: A waveform generator for providing an analog output signal to a target device includes a look-up-table (LUT) that stores a plurality of binary address values and a digital-to-analog converter (DAC) that generates the analog output signal. The waveform generator receives an input trigger signal from the target device when the target device is ready to receive the analog output signal. The waveform generator generates a synchronized input trigger signal and aligns the analog output signal with the synchronized input trigger signal by reloading the LUT with a binary address value of zero.

Abstract: Apparatus and methods for quadrature clock signal generation are provided. In certain implementations, an apparatus includes an invertible sine shaping filter configured to receive an in-phase clock signal, a quadrature-phase clock signal, and an inversion control signal. The invertible sine-shaping filter is further configured to filter the in-phase and quadrature-phase clock signals to generate sinusoidal in-phase and quadrature-phase clock signals. The invertible sine-shaping filter is further configured to selectively invert one or both of the in-phase and quadrature-phase clock signals based on an inversion control signal. The apparatus further includes a phase interpolator configured to generate an interpolated clock signal based on a weighted sum of the selectively inverted sinusoidal in-phase clock signal and the quadrature-phase sinusoidal clock signal. The in-phase clock signal and the quadrature-phase clock signal have a quadrature-phase relationship.

Abstract: High accuracy sin-cos wave and frequency generators, and related systems and methods. In non-limiting embodiments disclosed herein, the sin-cos wave generators can provide highly accurate sin-cos values for sin-cos wave generation with low hardware costs and small lookup table requirements. The embodiments disclosed herein may include a circuit to conduct an arithmetic approximation of a sin-cos curve based on a phase input. The circuit may be in communication with a point lookup table and a correction lookup table. The tables may receive the phase input and match the phase input to main sin-cos endpoints associated with the phase, and to a correction value for the phase. These values which are selected based on the phase input, may be communicated to a converter circuit where the arithmetic functions are applied to the values resulting in a sin-cos curve value.

Abstract: An electrical waveform generating circuit has a programmable current source-driver. A digital switched current source is coupled to the programmable current source-driver and controlled by waveforms stored in the programmable current source-driver. A plurality of MOSFETs is coupled to the programmable current source driver. A first coupled inductor is connected to the plurality of high voltage MOSFETs. A transducer is coupled to the first coupled inductor.

Abstract: A generator for use with an electrosurgical device is provided. The generator has a gain stage electrically disposed between a first voltage rail and a second voltage rail, wherein the gain stage includes an input and an output. A voltage source operably coupled to the gain stage input and configured to provide an input signal thereto responsive to a drive control signal is also provided. The generator also has one or more sensors configured to sense an operational parameter of the amplifier and to provide a sensor signal corresponding thereto and a controller adapted to receive the sensor signal(s) and in response thereto provide a drive control signal to the voltage source.

Abstract: An electrical waveform generating circuit has a programmable current source-driver. A digital switched current source is coupled to the programmable current source-driver and controlled by waveforms stored in the programmable current source-driver. A plurality of MOSFETs is coupled to the programmable current source driver. A first coupled inductor is connected to the plurality of high voltage MOSFETs. A transducer is coupled to the first coupled inductor.

Abstract: A waveform generator has a waveform generation circuit storing waveform data for an analog waveform signals having dead time periods without the need for storing data on the dead time. A sequencer having a sequence memory stores sequence data that controls the sequencing of one or more signal components and associated dead times of the analog waveform signal. The timing of the dead time is controlled by a sampling clock and a wait time counter. The generation of the signal components is controlled by the sampling clock controlling the generation of addresses for a waveform memory storing digital data of the sampling components. The waveform memory digital data is converted to an analog waveform signal.

Abstract: High accuracy sin-cos wave and frequency generators, and related systems and methods. In non-limiting embodiments disclosed herein, the sin-cos wave generators can provide highly accurate sin-cos values for sin-cos wave generation with low hardware costs and small lookup table requirements. The embodiments disclosed herein may include a circuit to conduct an arithmetic approximation of a sin-cos curve based on a phase input. The circuit may be in communication with a point lookup table and a correction lookup table. The tables may receive the phase input and match the phase input to main sin-cos endpoints associated with the phase, and to a correction value for the phase. These values which are selected based on the phase input, may be communicated to a converter circuit where the arithmetic functions are applied to the values resulting in a sin-cos curve value.

Abstract: A bias potential generating circuit includes a clock supply circuit that generates a clock signal having a predetermined frequency; a rising sine wave generating circuit that generates a rising wave form signal having a wave form of a rising portion of a sine wave; a ?? conversion circuit that generates a pulse width modulation signal by pulse width modulating the rising wave form signal; a first resistor, one end connected to a reference potential input terminal of an operational amplifier; a second resistor, one end connected to the first resistor and to the reference potential input terminal of the operational amplifier, and the other end being grounded; and a switch connected to a power supply and to the other end of the first resistor, the switch being turned ON and OFF by the pulse width modulation signal.

Abstract: An a.c. signal generator is provided with a first circuit (B1) capable of generating alternations of a first a.c. signal (S1) between a first potential (V+) formed by a first voltage source and a second potential (V?). A second circuit (B2) is capable of generating alternations of a second a.c. signal (S2), phase-shifted relative to the first signal (S1), between the first potential (V+) formed by the first voltage source and the second potential (V?). Such a generator can be used, for example, in a flight control calculator of an aircraft.

Abstract: A signal transmission device for transmitting a signal along a transmission path including a sinusoidal-signal transmitting unit configured to generate a sinusoidal signal that has a period the same as a period of a square-wave digital signal whose voltage level changes in correspondence with a logical value and that has a phase which differs based on change in the logical value of the square-wave digital signal, and configured to transmit the sinusoidal signal. The signal transmission device includes a sinusoidal-signal receiving unit configured to receive the sinusoidal signal, and configured to reproduce the square-wave digital signal from the sinusoidal signal based on change in the phase of the sinusoidal signal.

Abstract: The delay circuit, such as a clock circuit, of an integrated circuit operates with tolerance of variation in temperature. For example, the delay circuit has a temperature dependent current generator that has an adjustable temperature coefficient, such that a range of temperature coefficients is selectable at a particular current output. Also, the clock circuit of an integrated circuit operates with multiple versions of a current that controls a discharging rate and/or a charging rate between reference signals of timing circuitry.

Abstract: An apparatus for generating sine/cosine values of an input phase is disclosed. The apparatus includes a phase projector, an LUT-arithmetic unit, a temp sine/cosine generator and a sine/cosine value generator. The phase projector maps the input phase angle into an octant phase and determines an octant index indicating which octant the input phase angle actually locates and a flag indicating whether or not the input phase happens to be pi/4, 3*pi/4, 5*pi/4 or 7*pi/4. The LUT-arithmetic unit receives the octant phase for provision of its corresponding sine/cosine values. The temp sine/cosine generator receives the corresponding sine/cosine values of the octant phase for provision of temp sine/cosine values based on the flag. The sine/cosine value generator selectively swaps and inverts the temp sine/cosine values as the sine/cosine values of the input phase based on a swap index derived from the octant index.

Abstract: A signal waveform generating circuit includes a first part storing waveform data of a signal to be generated, a second part storing additional data for adjusting the waveform data, and a third part adjusting the waveform data read from the first part by the additional data read from the second part.

Abstract: An apparatus includes a capacitor, a current generating circuit communicatively coupled to the capacitor, and a current pulse timing circuit communicatively coupled to the current source circuit. The current timing pulse circuit is configured to time durations of a first plurality of current pulses from the current generating circuit for charging the capacitor and a second plurality of current pulses for discharging the capacitor, and step the durations of the current pulses between a minimum duty cycle and a maximum duty cycle. A cycle of providing the first plurality of current pulses and providing the second plurality of current pulses results in generation of a subsonic pseudo-sinusoidal pulse signal at the capacitor.

Abstract: A nonlinear filter includes: a determination unit that determines, based on I and Q signals inputted into the determination unit, whether or not to perform pulse insertion; a rotation detector that detects a rotation direction of the I and Q signals on an IQ plane with respect to the origin of the IQ plane; a pulse generator that generates, when the determination unit determines to perform the pulse insertion, a pulse of which at least one of the direction and the magnitude is determined in accordance with at least the detected rotation direction; and an adder that inserts the pulse into the I and Q signals and outputs resultant I and Q signals.

Abstract: A multi-port reconfigurable battery has at least one bank of statically joined series connected battery cells, each including a positive and negative pole connected through switches to respective output connections on at least one port. Processor controlled switches reconfigure the cells to provide power for electrical loads on one or more ports and simultaneously provide charging on one or more other ports. An alternative configuration divides groups of series connected cells into separate battery banks that permit other configurations. Ports are configurable to share one electrically common connection with other ports providing a simplified configuration (multi-tap reconfigurable battery). Applications include selectable motor speed control and battery regeneration schemes matched to motor output, and single or multiphase AC power output at selectable frequencies for use as an Uninterruptible Power Supply. The battery is also described as a power source for a forced-air induction system (e.g.

Abstract: A technique includes generating an angle modulated square wave signal and progressively filtering the angle modulated square wave signal in a transmitter using a plurality of low pass filters to produce a modulated sinusoidal signal to drive an antenna. The technique includes programming the transmitter to tune a corner frequency of the filtering to a frequency within a range of frequencies selectable using the programming, based on a carrier frequency associated with the modulated sinusoidal signal.

Abstract: A sinusoidal waveform generation circuit is configured to continuously control a voltage applied to a gate of a MOSFET to change an output current in the form of a sinusoidal wave by utilizing, as an electric characteristic specific to the MOSFET, a characteristic between a voltage applied to a gate of a MOSFET and an output current. The waveform of the sinusoidal wave generated by the sinusoidal waveform generation circuit is not a combination of a plurality of linear lines but is continuous and smooth. As a result, noises generated by the sinusoidal waveform generation circuit can be reduced.

Abstract: A vertical transistor includes a gate isolating layer flanking a stack of a source layer, a resilient active unit and a drain layer, and a gate layer formed on the gate isolating layer. The active unit includes an active layer formed between first and second barrier layers each having a thickness ranging from 4 nm to 40 nm. When an input voltage including a DC component and a ripple component is applied to the source layer, the active unit periodically vibrates as a result of the ripple component of the input voltage such that an induced AC current is generated based on a control voltage applied to the gate layer to flow to the drain layer. The induced AC current flowing to the drain layer serves as an AC output generated by the vertical transistor based on the input voltage. A method of enabling a vertical transistor to generate an AC output is also disclosed.

Abstract: A circuit is provided with a plurality current cells. The current cells each comprise a main current source and an auxiliary current source coupled in parallel. The main current source supplies a main current to a current output of the current cell, and the auxiliary current source supplies an auxiliary current to the current output of the current cell. The main current sources are weighted according to a first predefined waveform, and the auxiliary current sources are weighted according to a second predefined waveform which is different from the first predefined waveform.

Abstract: A vertical transistor includes a gate isolating layer flanking a stack of a source layer, a resilient active unit and a drain layer, and a gate layer formed on the gate isolating layer. The active unit includes an active layer formed between first and second barrier layers each having a thickness ranging from 4 nm to 40 nm. When an input voltage including a DC component and a ripple component is applied to the source layer, the active unit periodically vibrates as a result of the ripple component of the input voltage such that an induced AC current is generated based on a control voltage applied to the gate layer to flow to the drain layer. The induced AC current flowing to the drain layer serves as an AC output generated by the vertical transistor based on the input voltage. A method of enabling a vertical transistor to generate an AC output is also disclosed.

Abstract: The present invention provides a bias potential generating circuit including: a clock supply circuit that generates a clock signal having a predetermined frequency; a rising sine wave generating circuit that generates a rising wave form signal having a wave form of a rising portion of a sine wave; a ?? conversion circuit that generates a pulse width modulation signal by pulse width modulating the rising wave form signal; a first resistor, one end connected to a reference potential input terminal of an operational amplifier; a second resistor, one end connected to the first resistor and to the reference potential input terminal of the operational amplifier, and the other end being grounded; and a switch connected to a power supply and to the other end of the first resistor, the switch being turned ON and OFF by the pulse width modulation signal.

Abstract: A method for compensating NCO jitter by changing a step value used to increment an accumulator in the NCO to make up for inaccuracies, or jitters. In one approach, a remainder in the accumulator may be monitored and a compensated clock close to the current edge of an ideal clock may be generated. In another approach, a compensated clock close to the next edge of the ideal clock may be generated after the current edge of the ideal clock is missed. The step value may be stored in a memory, which may be a register. A jitter compensator may include a comparator for monitoring the remainder in the accumulator or a detector for detecting whether an ideal clock has been missed. The jitter compensator may also change the step value to a step value for a faster clock to compensate jitter.

Abstract: The present invention relates to a method and system that emulates a desired waveform by producing a time profile of the desired waveform, which is characterized by a plurality of sample values, and generating a plurality of RF waveforms, each RF waveform of the plurality of RF waveforms having a polarity and scaled energy based on a corresponding one of the plurality of sample values, to produce an aggregate RF energy having spectral characteristics that approximate the spectral characteristics of the desired waveform.

Abstract: A sinusoidal waveform generation circuit is configured to continuously control a voltage applied to a gate of a MOSFET to change an output current in the form of a sinusoidal wave by utilizing, as an electric characteristic specific to the MOSFET, a characteristic between a voltage applied to a gate of a MOSFET and an output current. The waveform of the sinusoidal wave generated by the sinusoidal waveform generation circuit is not a combination of a plurality of linear lines but is continuous and smooth. As a result, noises generated by the sinusoidal waveform generation circuit can be reduced.

Abstract: A square wave to pseudo-sinusoidal clock conversion circuit comprises first and second stages. The first stage includes a cross-coupled differential pairs input gain stage having positive and negative input sides. Responsive to a differential square wave clock input, the first stage provides a first pass balanced differential clock with pull-up and pull-down symmetry. The second stage comprises positive and negative output side push-pull with low pass filter circuits, wherein the positive and negative output side push-pull with low pass filter circuits are responsive to the first pass balanced differential clock from the first stage for producing an output pseudo-sinusoidal clock that comprises a nearly sinusoidal output with slew rate controlled and clock waveform pull-up and pull-down symmetry for each of a respective one of the positive and negative output sides.

Abstract: An apparatus for generating sine/cosine values of an input phase is disclosed. The apparatus includes a phase projector, an LUT-arithmetic unit, a temp sine/cosine generator and a sine/cosine value generator. The phase projector maps the input phase angle into an octant phase and determines an octant index indicating which octant the input phase angle actually locates and a flag indicating whether or not the input phase happens to be pi/4, 3*pi/4, 5*pi/4 or 7*pi/4. The LUT-arithmetic unit receives the octant phase for provision of its corresponding sine/cosine values. The temp sine/cosine generator receives the corresponding sine/cosine values of the octant phase for provision of temp sine/cosine values based on the flag. The sine/cosine value generator selectively swaps and inverts the temp sine/cosine values as the sine/cosine values of the input phase based on a swap index derived from the octant index.

Abstract: Phase-to-sinusoid conversion and method for direct digital synthesis are described. At least one quadrant of values for a sinusoidal signal are real-to-finite bit resolution mapped to provide preconditioned values which are on average shifted down by half of a LSB position. The at least one quadrant of preconditioned values are stored in a lookup table. MSBs of a phase-accumulated signal are used as an address for accessing from the lookup table a sinusoid value. At least a logic 1 is added as an LSB to an interim output associated with the sinusoid value to provide an adjusted sinusoid value having a bit width greater than that of the sinusoid value to provide a digitally synthesized sinusoidal value.

Abstract: A square wave to pseudo-sinusoidal clock conversion circuit comprises first and second stages. The first stage includes a cross-coupled differential pairs input gain stage having positive and negative input sides. Responsive to a differential square wave clock input, the first stage provides a first pass balanced differential clock with pull-up and pull-down symmetry. The second stage comprises positive and negative output side push-pull with low pass filter circuits, wherein the positive and negative output side push-pull with low pass filter circuits are responsive to the first pass balanced differential clock from the first stage for producing an output pseudo-sinusoidal clock that comprises a nearly sinusoidal output with slew rate controlled and clock waveform pull-up and pull-down symmetry for each of a respective one of the positive and negative output sides.

Abstract: Disclosed are a switch controller, a switch control method, and a converter based thereon. The switch controller generates an input sensing voltage corresponding to the input voltage of the converter, and compares the input sensing voltage with a predetermined first reference value. The switch controller generates a zero cross detection signal with a first level or a second level depending upon the comparison result, and generates a reference clock signal varying in frequency in accordance with one cycle of the zero cross detection signal. The switch controller generates digital signals by using the reference clock signal and the zero cross detection signal. The digital signals synchronize with the zero cross detection signal, and increase in accordance with the reference clock signal during a half of one cycle of the zero cross detection signal, while decreasing in accordance with the reference clock signal during the other half cycle of the zero cross detection signal.

Abstract: An apparatus, system, and method are disclosed for phase shifting and amplitude control. A two-phase local oscillator generates an in-phase sinusoidal signal of a fixed frequency and a quadrature sinusoidal signal of the fixed frequency having a ninety degree phase shift from the in-phase sinusoidal signal. A signal generator receives the in-phase sinusoidal signal and the quadrature sinusoidal signal and generates a controllable sinusoidal signal of the fixed frequency. The controllable sinusoidal signal has a variable amplitude and a shiftable phase. A mixer varies the amplitude and shifts the phase of an input signal by mixing the input signal with the controllable sinusoidal signal to generate an output signal. The input signal and the output signal carry phase and amplitude information required for phased array signal processing. Either a receiver or a transmitter may be implemented using the present invention.

Abstract: A signal waveform generating circuit includes a first part storing waveform data of a signal to be generated, a second part storing additional data for adjusting the waveform data, and a third part adjusting the waveform data read from the first part by the additional data read from the second part.

Abstract: The invention is directed to a solid-state replacement for a variable transformer. The circuit arrangement presented is not placed in series with the load. It can change output voltage quickly, and is able to deliver more current to the load than is drawn from the source while stepping down because the circuit is not placed in series with a load. The output voltage from the driver circuit is a low-frequency sine wave that is “chopped” by a high frequency carrier, yet the end result after the transformer or LC filter is a very clean sine wave. The circuit arrangement is lightweight and inexpensive to fabricate.

Abstract: A direct digital synthesis (DDS) hybrid phase-lock loop for low-jitter synchronization provides a mechanism for generating a low-jitter clock from a timing reference that has a high jitter level. A DDS circuit provides a clock output and has an input for receiving a rational number. The rational number represents a ratio between the frequency of the clock output and the frequency of another stable clock provided to the circuit. In one implementation, a phase output of the DDS circuit is compared to a phase determined from an incoming timing reference and in another implementation, the low-jitter clock output is utilized to generate a phase number via a counter that is clocked by the clock output and captured by the timing reference.

Abstract: This disclosure relates to semiconductor device having a trapezoid shaped resistive strip with a plurality of legs coupled along one strip edge to produce an analog sine wave.

Abstract: A current source is provided according to the present invention. The current source includes N current sources configured in a parallel arrangement, wherein N is at least two. Each of the N current sources includes a respective control input. The current source also includes M delay elements. An mth one of the M delay elements includes an input in communication with an m?1th one of the M delay elements. M is equal to N?1, and an output of the mth one of the M delay elements is arranged in communication with the control input of an m+1th one of the N current sources.