Abstract: The noise response in a passive mixer circuit is improved by discharging the switching transistors in the mixer circuit in an appropriate time slot prior to activation. In addition to improving the noise response, tilt in conversion gains and linearity can be reduced. A passive mixer circuit includes bypass switches arranged in proximity to the switching transistors that make up the mixer core. These bypass switches, which are activated in intervals just prior to the active intervals of their neighboring switching transistors, discharge to ground accumulated charges on the switching transistors or on reactive components around switches.

Abstract: An ASK modulator includes a baseband unit which obtains a sequence comprising at least one amplitude value and adds an additional value to each of the at least one amplitude value to generate a modified sequence; a digital-to-analog converter coupled to the baseband unit, the digital-to-analog converter converts the modified sequence to generate a first signal, the additional value is determined based on a half scale of the digital-analog converter; and a mixer which receives the first signal and a second signal and generate a modulated signal by mixing the first signal with the second signal.

Abstract: A unidirectional sampling mixer utilizes a stepped phase modulation to shift the frequency of an RF input signal supplied to an RF input switch. An ordered set of phase shift values to be applied to the RF input signal and a set of times each element of which corresponds to a time at which a phase shift value is be applied to the RF signal are determined. For each phase shift value, a controller controls the RF input switch to select an input of a phase shifting device and controls an RF output switch to select an output of the phasing shifting device. The input and the output of the phase shifting device are selected to apply the phase shift value at its corresponding time to the RF input signal. A frequency shifted signal is supplied to an RF output port from an output of the RF output switch.

Abstract: A frequency mixer circuit includes a mixer, a load stage, and again stage. The load stage cooperates with the mixer to generate a differential output voltage signal with a mixed frequency according to a differential local oscillator voltage signal and a differential input voltage signal. The gain stage has a transconductance, and a magnitude of the differential current signal and the transconductance have a positive relationship therebetween, so as to result in a positive relationship between the transconductance and a conversion gain which is a ratio of magnitude of the differential output voltage signal to magnitude of the differential input voltage signal.

Abstract: A mixer comprising a Gilbert cell configured to receive a baseband signal and a local oscillator signal, wherein the Gilbert cell comprises a baseband transistor and a local oscillator transistor, and a biasing circuit configured to generate a bias voltage that is inversely related to temperature and coupled to the local oscillator transistor.

Abstract: A return-type current-reuse mixer having a transconductance/amplification stage, a mixing stage, and a high-pass and a low-pass filter network. The transconductance/amplification stage has a current-reuse CMOS topology wherein an input frequency signal is converted into a frequency current, low-frequency components are removed from the frequency current by the high-pass filter network, the frequency current is fed into the mixing stage, modulation occurs in the mixing stage, and then an intermediate-frequency signal is generated and output. Once high-frequency components are removed from the intermediate-frequency signal by the low-pass filter network, the intermediate-frequency signal is sent again for input into the transconductance/amplification stage, then amplified in the transconductance/amplification stage and output. The mixer transconductance/amplification stage employs a current-reuse technique.

Abstract: A mixer comprising a Gilbert cell configured to receive a baseband signal and a local oscillator signal, wherein the Gilbert cell comprises a baseband transistor and a local oscillator transistor, and a biasing circuit configured to generate a bias voltage that is inversely related to temperature and coupled to the local oscillator transistor.

Abstract: In one embodiment, the present invention includes a mixer having various stages, including a transconductance stage with a differential transistor pair, a bias circuit, and a feedback circuit. The transistor pair can include a first transistor having a first terminal to receive a first input radio frequency (RF) voltage and to output a first RF current via a second terminal of the first transistor, and a second transistor having a first terminal to receive a second input RF voltage and to output a second RF current via a second terminal of the second transistor. In turn, the bias circuit is coupled to the second terminals of the transistors to provide a bias current to these transistors. The feedback circuit is in turn coupled to the second terminals of the transistors to generate a feedback signal corresponding to a common mode voltage at the second terminals of the transistors.

Abstract: An adjustable gain amplifier system having cleanly adjustable and stable linearized gain is provided for amplifying an input signal. The system generally comprises a main amplifier and a linearized transconductance amplifier coupled thereto, which generates an amplified current signal in response to the input signal according to a variably defined transconductance factor. The linearized transconductance amplifier includes a linearized transconductance portion and a translinear current amplifier portion coupled thereto. The linearized transconductance portion generates an intermediate current signal based upon a voltage of the input signal, and forms an unswitched resistor-based conduction path for that intermediate current signal. The translinear current amplifier portion forms a translinear loop section for amplifying the intermediate current signal to generate the amplified current signal.

Abstract: Improved master latch for high-speed slicer providing enhanced input signal sensitivity. A pre-charging circuit injects charge into the sources of the differential pair of a latch that samples the input signal during odd clock cycles. This reduces the gate-to-source voltage of the sampling pair, making them less sensitive to data bits latched by a second parallel master latch in odd clock cycles. The injected charge dissipates before the sampling pair is needed to fully sample the input signal in even clock cycles. The pre-charging circuit includes a current mirror, a current source and a transistor that couples the current source to the current mirror during odd clock cycles. A shunt peaked amplifier with excess peaking boosts the high-frequency content of a differential input signal relative to its low-frequency content. Capacitors cross-couple the gates and drains of the differential sampling pair.

Abstract: The present disclosure relates to variable-gain low noise amplifiers and RF receivers. An exemplary method for processing a RF signal provides a low noise amplifier with main and auxiliary amplifier modules. When a selection indicates the low noise amplifier operating in a high-gain mode, the main and auxiliary amplifier modules are coupled in parallel. When the selection indicates the low noise amplifier operating in a low-gain mode, the main and auxiliary amplifier modules are cross coupled. When a selection indicates the low noise amplifier operating in a moderate-gain mode, the auxiliary amplifier modules are disconnected from the main amplifier module.

Abstract: Multiplier circuitry includes first multiplier circuit including a first transistor having an emitter coupled to a first conductor, a base coupled to a second conductor, and a collector coupled to a third conductor, a second transistor having an emitter coupled to the first conductor, a base coupled to a fourth conductor, and a collector coupled to a fifth conductor, a third transistor having an emitter coupled to the second conductor and a base and collector coupled to a supply voltage, and a fourth transistor having an emitter coupled to the fourth conductor and a base and collector coupled to the supply voltage. Chopper includes a first switch to provide a chopped differential signal between the second and fourth conductors and a second switch for un-chopping a first differential output signal produced between the third and fifth conductors to provide an un-chopped differential output signal between the third and fifth conductors.

Abstract: A transmission device for two electric pulse measurement signals includes a first measurement signal input, a second measurement signal input, a differential measurement signal output and a signal converter. The first measurement signal input serves for receiving a first single-ended measurement signal, the second measurement signal input for receiving a second single-ended measurement signal, wherein the signal converter is implemented, when receiving a first one of the single-ended measurement signals, to convert either the first single-ended measurement signal or the second single-ended measurement signal into a combined differential measurement signal and provide the same at the differential measurement signal output. Here, the differential measurement signal includes a first differential portion which may be allocated to the first single-ended measurement signal and a second differential portion which may be allocated to the second single-ended measurement signal.

Abstract: A frequency quadrupler comprises a balanced topology which increases broadband odd harmonic suppression. The frequency quadrupler is constructed in a cascode configuration which is a two-stage amplifier composed of a transconductance amplifier followed by a current buffer. The cascode is constructed with common emitter (CE) and common base (CB) stages which further improves the multiplier frequency response. The cascode configuration enables a notch filter to be placed between the common emitter and common base stages to reduce 2nd harmonic generation and thereby increase 4th harmonic output power, generation efficiency and conversion gain. To cancel 4th harmonic components at the input that may destructively interfere with the output signal, capacitors are placed at the input of the common emitter stage, which in conjunction with the parasitic base wire inductance, form a notch filter to short the 4th harmonic.

Abstract: A method and system for bandwidth enhancement using hybrid inductors are disclosed and may include a complementary metal oxide semiconductor (CMOS) transceiver providing an electrical impedance that increases with frequency via hybrid inductors comprising a transistor, a capacitor, an inductor, and a resistor. A first terminal of the hybrid inductors may comprise a first terminal of the transistor. A second terminal of the transistor may be coupled to a first terminal of the resistor and a first terminal of the capacitor. A second terminal of the resistor may comprise a second terminal of the hybrid inductors. A third terminal of the transistor may be coupled to a first terminal of an inductor, and a second terminal of the inductor may be coupled to a second terminal of the capacitor. The hybrid inductors may be configured by varying transconductance, resistance, and/or capacitance and may be utilized as an amplifier load.

Abstract: According to some embodiments, an up-conversion mixer includes a mixer cell having an output node arranged to provide an output. An input stage is coupled to the mixer cell and arranged to receive an input signal. The mixer cell is configured to generate the output with an up-converted frequency compared to an input frequency of the input signal. The input stage is configured to reduce a third order harmonic term of the output so that an output power plot of the third order harmonic term with respect to an input power has a notch with a local minimum.

Abstract: Frequency conversion circuitry has an input node for receiving an input signal at a first frequency and an output node for producing an output signal at a second frequency different from the first frequency. A mixer circuit is responsive to the input signal for producing a signal at the second frequency. A step down impedance transformation circuit is coupled between the input node and an input of the mixer circuit for providing input impedance of the mixer circuit lower than impedance at the input node. An amplifier circuit is coupled between an output of the mixer circuit and the output node for amplifying the signal at the second frequency produced at the output of the mixer circuit. The mixer circuit is configured for providing input impedance of the output amplifier lower than the impedance at the input node.

Abstract: An embodiment of a system and method provides a carbon nanotube transistor (CNT) mixer with a low local oscillator power requirement and no inter-modulation products. Specifically, an embodiment of the system and method provides two kinds of device current-voltage (I-V) characteristics on the same integrated circuit: exponential and linear. The CNT I-V characteristics support both the ideal exponential control characteristic (determined by physics constants) and the ideal linear control characteristic (also determined by physics constants), resulting in an ideal multiplier. In other words, the CNT mixer is mathematically equivalent to an ideal multiplier. Such an ideal multiplier can be used as a mixer with low local oscillator power requirement and virtually no inter-modulation products.

Abstract: A method for providing an interpolated output signal includes, in at least one aspect, receiving a plurality of phase signals applying each phase signal of the plurality of phase signals to switching elements of a first set of switching elements receiving a plurality of select signals, applying an asserted select signal to a first switching element of a second set of switching elements to provide a connection between a first switching element of the first set of switching elements and a first output terminal, and applying the asserted select signal to a second switching element of the second set of switching elements to provide a connection between a second switching element of the first set of switching elements and a second output terminal.

Abstract: A Gilbert mixer (200) comprising four switching transistors (Q3, Q4, Q5, Q6), two intermediate frequency transistors (Q1, Q2), and one or more DC decoupling components (202). The one or more DC decoupling components (202) are coupled between the switching transistors (Q3, Q4, Q5, Q6) and the intermediate frequency transistors (Q1, Q2) in order to DC decouple the switching transistors (Q3, Q4, Q5, Q6) from the intermediate frequency transistors (Q1, Q2).

Abstract: In one embodiment of the invention, a method for convolution of signals is disclosed including generating four phased half duty cycle clocks each being out of phase by a multiple of ninety degrees from the others; coupling the four phased half duty cycle clocks into a four phase half duty cycle mixer; and switching switches in the four phase half duty cycle mixer in response to the four phased half duty cycle clocks to convolve a differential input signal with the four phased half duty cycle clocks to concurrently generate a differential in-phase output signal and a differential quadrature-phase output signal on a dual differential output port.

Abstract: A mixer may include a linearization circuit. The linearization circuit may include and operation amplifier, a first pass device, a second pass device, a first feedback resistor, and a second feedback resistor. Each of the first pass device and the second pass device may have a gate terminal, a first non-gate terminal, and a second non-gate terminal and coupled to its gate terminal to an output terminal of the operational amplifier and configured to be coupled at its first non-gate terminal to a high potential source. Each of the first feedback resistor and the second feedback resistor may have a first terminal and a second terminal, the first terminal coupled to the positive input terminal of the operational amplifier and the second terminal coupled to the second non-gate terminal of an associated pass device and the positive polarity of the differential baseband output.

Abstract: A down-conversion module for a heterodyne receiver comprises a first mixer circuit, a second mixer circuit and an interconnection. The first mixer circuit includes first and second differential control terminals and is arranged to produce a first down-converted differential voltage signal at a first down-converted frequency as a function of a first RF differential input signal applied to the first differential control terminals and of a first RF differential reference frequency signal applied to the second differential control terminals.

Abstract: An ASK modulator includes a baseband unit which obtains a sequence comprising at least one amplitude value and adds an additional value to each of the at least one amplitude value to generate a modified sequence; a digital-to-analog converter coupled to the baseband unit, the digital-to-analog converter converts the modified sequence to generate a first signal, the additional value is determined based on a half scale of the digital-analog converter; and a mixer which receives the first signal and a second signal and generate a modulated signal by mixing the first signal with the second signal.

Abstract: A circuit includes a multiplier circuit including a mixer configured to multiply a first differential input signal and a second differential input signal. The mixer includes a plurality of transistors including control terminals. The control terminals of the plurality of transistors receive a bias signal and the first differential input signal. A bias circuit is configured to generate the bias signal. The bias signal generated by the bias circuit is based on a voltage threshold of one of the plurality of transistors and a product of constant reference current and a bias resistance.

Abstract: An electronic circuit comprises an input stage and a driver stage. The input stage comprises first, second, third and fourth inputs, and is configured to generate a first intermediate signal which is the sum or the weighted sum of the first and third input signals, and a second intermediate signal which is the sum or the weighted sum of the second and fourth input signals. The driver stage comprises an output, is configured to generate an output signal present at the output, and is configured to directly compare the first and second intermediate signals such that the output signal indicates which of the two intermediate signals is larger.

Abstract: A mixer circuit includes: a mixer circuit including a first transistor pair to output a first differential input signal and a second transistor pair to output a second differential input signal by inversing the first differential signal; a local signal supply circuit to supply a pair of local signals to gates of the first transistor pair and the second transistor pair; an operational amplifier including an input pair coupled to an output pair of the mixer circuit and an output pair coupled to the input pair via feedback resistors, the operational amplifier to amplify the first differential input signal and output a differential output signal; a common mode feedback circuit to control a center voltage of the differential output signal so that the center voltage maintains a common voltage; and a common voltage generator circuit to generate the common voltage according to an amplitude of the local signal.

Abstract: A circuit including a first transistor group and a second transistor group. The transistor groups are connected such that they are arranged to be fed with at least one input signal, and such that they are arranged to output at least two currents. At least two transistors are arranged to be biased in such a way that desired signal paths are obtained in the circuit, such that a desired output current ratio is obtained.

Abstract: A sampling circuit and a receiver with which filter characteristics compatible with the reception of wideband signals can be realized with a high degree of freedom in the setting of the filter characteristics. More specifically, the sampling circuit is capable of removing adjacent interfering wave signals while keeping in-band deviation small. The sampling circuit is equipped with a discrete-time analog processing circuit group, wherein multiple discrete-time analog processing circuits are connected in parallel, a synthesizer that synthesizes the output signals from each of the circuit systems and outputs same, and a digital control unit that outputs control signals. Each of the discrete-time analog processing circuits is configured to include multiple rotate capacitor units, which each includes a main rotate capacitor and a sub-rotate capacitor, and only the main rotate capacitors share electric charge with a buffer capacitor included in the synthesizer.

Abstract: A control apparatus for a gradient amplifier includes a differentiation unit. The differentiation unit forms a differentiation signal by differential processing from a current desired value signal of the gradient amplifier. At least one electrical low pass filter unit is connected in series with the differentiation unit, and/or at least one electrical high pass filter unit is connected in parallel with the differentiation unit.

Abstract: Techniques for designing a highly differential single-ended-to-differential converter for use in, e.g., communications receivers. In an exemplary embodiment, an auxiliary current path including cascomp transistors is coupled to a main current path including input transistors and cascode transistors. The transistors are biased such that inter-modulation products generated by the auxiliary current path cancel out inter-modulation products generated by the main current path. In another exemplary embodiment, current source transistors for the main current path are adaptively biased depending on the level of the input signal received. In an exemplary embodiment, the techniques may be applied to designing a converter for interfacing a single-ended low-noise amplifier (LNA) output voltage with a differential mixer input in a communications receiver.

Abstract: A harmonic rejection mixer includes a differential in-phase signal path and a differential quadrature signal path, a shared differential transconductor for generating a shared transconductor output signal from a mixer input signal, a first selective mixing circuit disposed in the differential quadrature signal path and coupled to the shared differential transconductor, and a second selective mixing circuit disposed in the differential in-phase signal path and coupled to the shared differential transconductor, the first selective mixing circuit is controlled by a first selective control signal and the second selective mixing circuit is controlled by a second selective control signal to selectively supply the shared transconductor output signal to the differential quadrature signal path and the differential in-phase signal path, respectively.

Abstract: A combination mixer arrangement comprising a first mixer and a second mixer coupled in parallel between first and second input ports and an output port. The mixers are arranged to be driven simultaneously by an input signal provided at the second input port. They are de-coupled, so a bias voltage applied at the first input port provides dc bias simultaneously for the mixers to enable gain expansion of the first mixer responsive to an increase in said input signal and thereby an improved linearity for the combination mixer arrangement.

Abstract: An embodiment of a system and method provides a carbon nanotube transistor (CNT) mixer with a low local oscillator power requirement and no inter-modulation products. Specifically, an embodiment of the system and method provides two kinds of device current-voltage (I-V) characteristics on the same integrated circuit: exponential and linear. The CNT I-V characteristics support both the ideal exponential control characteristic (determined by physics constants) and the ideal linear control characteristic (also determined by physics constants), resulting in an ideal multiplier. In other words, the CNT mixer is mathematically equivalent to an ideal multiplier. Such an ideal multiplier can be used as a mixer with low local oscillator power requirement and virtually no inter-modulation products.

Abstract: A method and system for managing Digital to Time Conversion (DTC) is provided. The method comprises receiving a first Radio Frequency (RF) signal and a second RF signal. The second RF signal is a phase-shifted first RF signal. The method further comprises converting the first RF signal to a first Intermediate Frequency (IF) signal and the second RF signal to a second IF signal. Further, a time delay between the first IF signal and the second IF signal is estimated based on a time difference measurement technique. The second RF signal is processed based on the estimated time delay to compensate for a delay error associated with the second RF signal.

Abstract: In one form, a power converter for a power detector or the like includes first and third transistors of a first conductivity type, and second and fourth transistors of a second conductivity type. A control electrode of the first transistor receives a first bias voltage plus a positive component of a differential input signal. The second transistor is coupled in series with the first transistor and has a control electrode receiving a second bias voltage plus a negative component of the differential input signal. The third transistor is biased using the first bias voltage plus the negative component. The fourth transistor is coupled in series with the third transistor and is biased using the second bias voltage plus the positive component. A common interconnection point of the first and third transistors forms an output node.

Abstract: In one embodiment, a local oscillator (LO) is configured to generate an LO signal. A transmission line receives the LO signal from the local oscillator and transmits the LO signal. A first set of taps and a second set of taps tap the transmission line to receive the LO signal. A plurality of transceiver blocks are configured to receive and transmit a plurality of phase-shifted radio frequency signals. Each transceiver block is coupled to a first tap and a second tap. Each LO signal received for a transceiver block is received with a different phase. However, the same reference phase may be calculated from a first LO signal received from the first tap and a second LO signal received from a second tap. Each transceiver block receives the reference LO signal having the reference phase determined from the first LO signal and the second LO signal.

Abstract: A transconductor circuit used in a mixer for canceling second-order inter-modulation distortion includes a first transistor and a second transistor, of which the base (gate) ends coupled to a first input end and a second input end, for receiving a differential input signal; and a negative feedback circuit, of which the input end coupled to the emitter (source) ends of the first transistor and the second transistor, of which the out end coupled to the base (gate) ends of the first transistor and the second transistor, for adjusting the voltage of the base (gate) of the first transistor and the second transistor according to the difference between a reference voltage and the detected voltage of the emitter (source) of the first transistor and the second transistor.

Abstract: Driver circuits and methods related thereto for driving high power and/or high frequency devices are described. The driver circuits comprise transistor stacks and capacitors coupled with the transistor stacks. Voltages across the capacitors depend on state (on or off) of each transistor in the transistor stacks. These voltages in turn determine output voltages generated by the driver circuits.

Abstract: An HDMI cable carries high speed encoded data which are transmitted differentially over data channels, along with a clock. High-frequency loss and differential skew within a differential signal may be compensated by analog circuits embedded in the cable. These embedded circuits are tuned at production for best performance by observing the quality of the recovered analog signal. The embedded circuits are powered by a combination of power sources, both carried within the cable, and harvested from the high-speed signals themselves.

Abstract: A method and system for bandwidth enhancement using hybrid inductors are disclosed and may include providing an electrical impedance that increases with frequency via hybrid inductors comprising a transistor, a capacitor, an inductor, and a resistor. A first terminal of the hybrid inductors may comprise a first terminal of the transistor. A second terminal of the transistor may be coupled to a first terminal of the resistor and a first terminal of the capacitor. A second terminal of the resistor may comprise a second terminal of the hybrid inductors. A third terminal of the transistor may be coupled to a first terminal of an inductor, and a second terminal of the inductor may be coupled to a second terminal of the capacitor. The hybrid inductors may be configured by varying transconductance, resistance, and/or capacitance and may be utilized as an amplifier load.

Abstract: A modulator drive circuit provides a modulator drive signal, representative of a data waveform, to modulate an optical signal for transport across a network infrastructure. The modulator drive circuit includes a broadband Bias-T circuit insensitive to the frequency range of the data waveform. The Bias-T circuit provides for an adjustable bias level to maintain proper operation of a modulator used to modulate the optical signal. One or more modulator drive circuits may be provided on a single substrate.

Abstract: Described herein are techniques for providing a mixer circuit having a mixer core. The mixer circuit includes a variable current block that is arranged to feed the mixer core with an amplified input signal.

Abstract: An HDMI cable carries high speed encoded data which are transmitted differentially over data channels, along with a clock. High-frequency loss and differential skew within a differential signal may be compensated by analog circuits embedded in the cable. These embedded circuits are tuned at production for best performance by observing the quality of the recovered analog signal. The embedded circuits are powered by a combination of power sources, both carried within the cable, and harvested from the high-speed signals themselves. Methods are provided for deskewing, equalizing, and boosting the differential signals in the embedded circuits that are mounted on a PCB.

Abstract: An apparatus comprising a low noise mixer comprising a transconductance amplifier configured to receive a differential voltage and to generate a differential current signal, a passive mixer directly connected to an output of the transconductance amplifier, and a transimpedance amplifier coupled to the passive mixer, wherein the transimpedance amplifier is configured to receive a current signal and convert the current signal to a voltage signal.

Abstract: Multiple input and/or gain stage Gilbert cell mixer designs are disclosed. The designs allow one input to be turned on at a time, and are suitable, for example, for use in receiver and transmitter applications. In addition, the designs allow for the inputs of the multi-input Gilbert cell mixer to be connected together, thereby allowing for switching of gain states within the Gilbert cell mixer. The mixer design may include, for example, a Gilbert cell mixer stage, and a plurality of input/gain stages. Each input/gain stage has its output connected to the input of the mixer stage, and is configured for receiving an input signal and applying a gain factor to that input signal to provide a signal for mixing with the LO. Each input/gain stage is configured with stage select circuitry for enabling or disabling that stage, so that only one input/gain stage is active at a time.

Abstract: A phase interpolator is provided that, in one implementation, includes first and second interpolator modules, each having an output in communication with an output node. The first interpolator includes an input to receive a first plurality of input phase signals, and a selector to select one or more of the first plurality of input phase signals for interpolation at the output node of the phase interpolator. The second interpolator module includes an input to receive a second plurality of input phase signals, and a selector to select one or more of the second plurality of input phase signals for interpolation at the output node of the phase interpolator. Each of the selected ones of the first plurality of input signals and each of the selected ones of the second plurality of input signals are included in an interpolated output signal.

Abstract: A RF transmitter is operable to transmit a signal at a frequency specified by the Bluetooth protocol. A passive upconversion mixer, which comprises a pair of MOSFET switches, is utilized inside the RF transmitter. The passive upconversion mixer is operable to receive analog local oscillator (LO) signals to be utilized for controlling operation of each of the pair of MOSFET switches to transmit signals with maximum gain. A MOS threshold voltage VTH and a DC component of a received baseband signal, VBB—DC, are determined for each of the pair of MOSFET switches. The determined VTH and the determined VBB—DC of the received baseband signal are combined such as VTH+VBB—DC and compared with a DC component of the received LO signals, VLO—DC. The VLO—DC is set equal to VTH+VBB—DC, accordingly, to provide maximum gain from the passive upconversion mixer for signal transmission.

Abstract: In a mixer circuit, addition of analog signals by capacitive coupling is used and square-law characteristics of the drain current of a MOS transistor operating in a saturated region are used. With this configuration, the voltage and power of the mixer circuit can be reduced.

Abstract: A system and method for signal mixing using high-order harmonics of a local oscillation (LO) signal. In a radio frequency (RF) system, the input RF signal is converted to a lower frequency signal such as an intermediate frequency (IF) signal or a baseband signal for further processing. A voltage controlled oscillator (VCO) is often used to generate a VCO signal which is then divided down to provide the needed LO signals for down conversion. The present invention discloses a system and method for generating a composite harmonic signal based on a linear combination of divided down LO signals with specific phase shifts. Consequently a VCO signal with lower frequency can be used to conserve power. The composite harmonic signal is mixed with the input RF signal to generate a series of mixed signal including one associated with a high-order harmonic of the divided down LO signal.