Abstract: A mixer circuit arrangement for frequency-translating a voltage input signal by an amount dependent on the frequency of a local oscillator signal to provide an output signal. The arrangement comprises an input stage 33 and a mixer stage 32, the input stage 33 being arranged to convert the voltage input signal into differential current signals and the mixer stage 32 being arranged to mix the differential current signals with the local oscillator signal to provide the output signal. Means 34,35 is provided for injecting a compensation current into the input stage 33 so as to balance the differential current signals provided to the mixer stage 32.

Abstract: A frequency converter includes a transistor pair having a first transistor and a second transistor respectively having collector terminals commonly connected to each other and emitter terminals commonly connected to each other, the commonly-connected collector terminals of the transistor pair being connected to a power supply terminal by way of a first resistor, a third transistor having a collector terminal connected to the power supply terminal by way of a second resistor and an emitter terminal connected to the commonly-connected emitter terminals of the transistor pair, a third resistor having an end connected to the commonly-connected emitter terminals of the transistor pair, and another end grounded by way of a constant current source, and an output terminal connected to the commonly-connected collector terminals of the transistor pair.

Abstract: A transconductor circuit includes a first input device M1 and a second input device M2 each having a control terminal coupled to a radio frequency input signal, and a bias setting device MB having a control terminal coupled to the radio frequency input signal and an output coupled to the control terminal of each of said M1 and M2. MB is partitioned into two equal sized bias setting devices MB1 and MB2. In the preferred embodiment MB1 and MB2 are coupled to the control terminals of M1 and M2 for establishing a bias voltage at the control terminals of M1 and M2. The circuit is shown to substantially cancel second-order intermodulation distortion and to enhance a second order intercept point.

Abstract: An RF communications system includes a transmit node for transmitting an RF information signal and a receive node for receiving the transmitted RF information signal. The receive node includes a passive mixer coupled to an amplifier for producing an IF or baseband differential mixer output signal as a function of a LO drive signal. The passive mixer having a first plurality of transistors of a first polarity type arranged in a ring configuration and a second plurality of transistors of a second polarity type, wherein each of second plurality of transistors is coupled to one of the first plurality of transistors.

Abstract: The mixer circuit includes a differential rf input driver; a differential local oscillator input circuit coupled to the differential rf input driver; a non-linear load coupled to the differential local oscillator input circuit wherein the non-linear load compensates for non-linearity of the differential rf input driver. The non-linear load has a V-I (voltage-current) transfer function the inverse of the input driver. This improves the mixer linearity without sacrificing the Gain or Noise Figure.

Abstract: An RF communications system includes a transmit node for transmitting an RF information signal and a receive node for receiving the transmitted RF information signal. The receive node includes a passive mixer coupled to an amplifier for producing an IF or baseband differential mixer output signal as a function of a LO drive signal. The passive mixer having a first plurality of transistors of a first polarity type arranged in a ring configuration and a second plurality of transistors of a second polarity type, wherein each of second plurality of transistors is coupled to one of the first plurality of transistors.

Abstract: A folded common cascode circuit with symmetric parallel signal paths from the differential inputs to a single ended output provides a low skew, low jitter, low power, high speed differential amplifier. The signal paths on either side of the differential amplifier are made equal with equal loads along each path. Pairs of complementary NMOS and PMOS transistor pairs with parallel complementary biasing current mirroring stacks on the cascode circuitry have all their gates connected together. The layout maintains symmetrical parallel signal paths and symmetrical amplification and impedance loading from differential input to output. Output inverters provide a higher drive capability.

Abstract: An amplifier circuit comprises a differential amplifier configured by a differential pair of transistors, a common emitter amplifier connected in parallel to the differential amplifier and configured by a pair of common-emitter configuration transistors, input and output terminals which are common to the differential amplifier and the common emitter amplifier, and a bias controller connected to the differential amplifier and the common emitter amplifier and configured to control a bias of at least one of the differential amplifier and the common emitter amplifier.

Abstract: A multiplier arrangement (MUXER) is adapted to generate from analog phase information and from high-frequency local oscillator signals, components of a high-frequency phase vector (PV), and to synthesise said high-frequency phase vector (PV) from said components within a summing means is further adapted to provide said high-frequency phase vector (PV) as a vector which is making an excursion alongside the contours of a square within the complex plane during a first category of predetermined transitions of a phase signal (?) on which said analog phase information is dependent. A signal modulator including such a multiplier arrangement as well as a transmitter are described as well.

Abstract: An apparatus and method for an improved chopping mixer (100) having a bipolar mixer stage (140) for mixing signals (lp, In, LOp, LOn) received thereby; an output chopping stage (160); and an AC coupling stage (150) for coupling the mixed signal to the output chopping stage. The signal prior to the chopping output stage is centered at the chopping clock frequency rather than DC. AC coupling allows removal of common mode signal in a desired frequency range. Also, the second order component present on each single ended output will also be DC blocked by the AC coupling capacitors, resulting in improved second order IP2 performance.

Abstract: In a master block, the exponential conversion characteristic is determined on the basis of a common mode reference voltage and a reference voltage. In a slave block, the exponential conversion characteristic determined with the master block is used to create a control voltage and a gain control signal on the basis of a common mode reference voltage and a reference voltage. For example, a gain of the variable gain amplifier is controlled by using this gain control signal.

Abstract: The present invention provides a differential amplifier that improves balance and signal linearity. The inventive amplifier includes first and second differential converters. The first differential converter includes a first grounded emitter amplifier and a first grounded base amplifier. The second differential converter includes a second grounded emitter amplifier and a second grounded base amplifier. A first output signal of the differential amplifier is generated by coupling a first differential output signal of the first grounded emitter amplifier and a first differential output signal of the second grounded base amplifier. A second output signal of the differential amplifier is generated by coupling a second differential output signal of the first grounded base amplifier and a second differential output signal of the second grounded emitter amplifier.

Abstract: Apparatus, methods and articles of manufacture are shown for modifying electromagnetic waves. Through using various wave characteristics such as amplitude to regulate a current source, a current is output that may be used in any number of ways, such as driving an antenna or other load.

Abstract: A circuit configuration for mixing a differential desired signal with a differential local oscillator signal includes two difference amplifiers which are controllable on the input side by the desired signal and cross-coupled on the output side. Currents flowing through the difference amplifiers are switched by the components of the local oscillator signal in alternation. The circuit makes a lower supply voltage possible, given the presence of only two transistor levels.

Abstract: A mixer circuit used in a radio receiver for mixing two frequencies and providing an intermediate frequency which is the difference of the two frequencies. Excellent image rejection is provided by decreasing an amplitude error and a phase error of an output IF signal in differential form.

Abstract: A mixer circuit is composed of a differential amplifier circuit and a DBM circuit. The differential amplifier circuit has a first bipolar transistor, a second bipolar transistor, a first resistor provided between the respective bases of the first and second bipolar transistors, and a capacitor provided between the base of the second bipolar transistor and the ground. Since the first resistor and the capacitor are provided such that the circuit undergoes RC oscillation in response to the third harmonic of an input signal, the third and higher-order harmonics can be reduced.

Abstract: Circuits and methods that improve linearity with use of cancellation of at least a portion, and preferably, substantially all of, at least one significant harmonic from the output of a primary circuit, e.g., the 3rd harmonic, using the output of a substantially functionally identical auxiliary circuit.

Abstract: A radio frequency front-end receiver includes a single stage low noise amplifier connected with a resistor array and a capacitor array, and a Gilbert-type mixer connected with a PMOS transconductance stage, an inductor and a serially connected current source. The resistor array enables the adjustment of the power gain of the low noise amplifier. The capacitor array tunes the low noise amplifier so that the maximum power gain is at the desired operating frequency. The PMOS transconductance stage reduces the power consumption of the mixer. The inductor increases the impedance and the current source improves the common-mode rejection of the mixer.

Abstract: A mixer has a first transistor and a second transistor which constitute a balanced oscillation circuit with their respective emitters connected with each other; a third transistor whose emitter is connected with the emitter of the first transistor; and a fourth transistor whose emitter is connected with the emitter of the second transistor. A first signal is inputted between a base of the third transistor and a base of the fourth transistor in a balanced way; and the third transistor and the fourth transistor mix an oscillation signal with the first signal and a second signal is outputted from the third transistor and the fourth transistor in a balanced way.

Abstract: A mixer circuit according to the present invention includes a first differential transistor pair of two transistors, a second differential transistor pair of two transistors, an impedance element connected to the first differential transistor pair, an impedance element connected to the second differential transistor pair, an inductor connected to nodes A, B, a current source connected to node A, a current source connected to node B, and a capacitor. A mixer circuit with high conversion gain and small distortion can be obtained.

Abstract: An input buffer circuit includes a first differential circuit, a second differential circuit, a pull-up circuit, and a pull-down circuit. An input voltage and a reference voltage are provided to the first and second differential circuits. The first differential circuit detects rising edges of the input voltage and causes the pull-up circuit to quickly drive an output voltage to logic high. The second differential circuit detects falling edges of the input voltage and causes the pull-down circuit to quickly drive the output voltage to logic low.

Abstract: A FET square multiplier is disclosed that transforms an input signal into two currents I1 and I2, the difference of which is proportional to the square of the input signal. A first and a second FET are connected at their drains and are source-coupled to the source of a third FET whose transconductance is twice the transconductance of the first and the second FET. The common source node is biased by a constant current source. The FETs are operated in the saturation region to exploit the square dependency of the drain current on the difference of the gate-source voltage and the treshold voltage of an FET.

Abstract: An exponentially variable gain mixer circuit includes an oscillating circuit generating an alternating differential signal. A correction circuit is connected to the oscillating circuit and includes a first amplifier and a differential amplifier. The first amplifier receives an external gain variation command and generates a differential output signal that includes a control voltage and a bias voltage. The differential amplifier receives the alternating differential signal and generates a differential modulation signal. A variable gain mixer receives an input differential signal and generates an amplified differential signal as a function of the differential modulation signal and the control voltage.

Abstract: Digitally-controlled, variable-gain mixers and amplifiers are provided which couple transconductance cells to receive respective tap signals from a fixed attenuator that receives a first input signal. A gain interpolator provides first and second control currents with amplitudes that correspond to a segment of a control word and a multiplexer responds to another control-word segment by routing the control currents to a selected pair of adjacent transconductance cells. In response, the transconductance cells provide amplifier current signals which can also be routed to a transistor switch that mixes them with a second input signal to generate a mixer output signal whose amplitude corresponds to the control word.

Abstract: The present invention relates to circuits having differential structure which uses complementary devices for processing single-ended signal. The single-ended differential circuit in accordance with the present invention, comprises first and second complementary devices having first, second, and third terminals, respectively, wherein current flowing from the second terminal to the third terminal has its quantity and direction being varying in dependant on the voltage driven to the first terminal, wherein the currents flowing through the first and second complementary devices vary in opposite relationship.

Abstract: A mixer of a communication system. The communication system has an antenna, low noise amplifier, a mixer, a local oscillator and an intermediate frequency filter. The mixer has a mixer circuit, a gain amplified circuit, a voltage auto-tracking circuit and a direct current voltage generating circuit. The direct current voltage generating circuit can reduce the output power of the local oscillator, extend the lifetime of the battery used in the mobile communication system, and reduce the distortion of harmonic wave of the local oscillator to reduce the noise figure of the mixer. Using the voltage auto tracking circuit and the gain amplified circuit, the linearity of the mixer is enhanced, and the conversion gain of the mixer is adjusted by varying the load resistors.

Abstract: A gain-controlled amplifier comprises two signal output stages arranged in parallel to drive an output load in series. A maximum-gain stage provides a maximum of signal gain and the other minimum-gain stage fixes the minimum overall amplifier signal gain. Gain-control input signals differentially applied to the two such stages balance the contributions of the respective gain stages delivered to the common output load. In one aspect, a third shunting transistor is used across the minimum-gain stage. In another version, the output load is a tapped resistor and the respective maximum and minimum gain stages drive different taps.

Abstract: An RF communications system includes a transmit node for transmitting an RF information signal and a receive node for receiving the transmitted RF information signal. The receive node includes a passive mixer coupled to an amplifier for producing an IF or baseband differential mixer output signal as a function of a LO drive signal. The passive mixer having a first plurality of transistors of a first polarity type arranged in a ring configuration and a second plurality of transistors of a second polarity type, wherein each of second plurality of transistors is coupled to one of said first plurality of transistors.

Abstract: Double balanced mixers having transistor pairs are affected by area mismatches between the transistors. The area mismatches can be represented as a ratio between the mixer core transistors that is directly related to voltage. Thus, an input voltage into one of the mixer core transistors in a transistor pair can compensate for the area mismatch. The compensation is achieved by a voltage track and hold feedback loop to one of the mixer core transistors.

Abstract: A pseudo-cubic function generator circuit comprises a CMOS inverter which is applied with a detected voltage of a sensor and supplied with a power supply voltage, and a voltage divider circuit for dividing the power supply voltage, wherein an output terminal of the CMOS inverter is connected to a voltage division point of the voltage divider circuit to generate an output voltage from the voltage division point. The pseudo-cubic function generator circuit can directly generate a large voltage change in a simple circuit configuration with a reduced noise component, and facilitates a setting of each parameter for specifying a cubic function curve. The parameter is set, for example, by scaling substantial gate areas of a P-MOS FET and an N-MOS FET which constitutes the CMOS inverter.

Abstract: A Complementary CMOS differential amplifier has automatic operating point adjustment (self-biasing) and the properties of a rail-to-rail amplifier. The CMOS differential amplifier uses folded cascodes and is considerably faster in operation than previous CMOS differential amplifiers, since it comprises a circuit element that ensures that, during the operation of the CMOS differential amplifier, all MOS FETs of the cascodes operate in their saturation range (that is not in their resistive range). The CMOS differential amplifier may be used in an input stage, a signal distribution circuit and a clock pulse distribution circuit.

Abstract: A differential amplifying apparatus includes first and second differential pair circuits having opposite conductivity, first and second current sources, first and second current mirror circuits, and a first voltage amplifying circuit. The first current source is connected between the first differential pair circuit and a first power source terminal, biasing the first differential pair circuit. The second current source is connected between the second differential pair circuit and a second power source terminal, biasing the second differential pair circuit. The first current mirror circuit is connected between a corresponding output terminal of the second differential pair circuit and the first power source terminal. The second current mirror circuit is connected between a corresponding output terminal of the second differential pair circuit and the first power source terminal. The first voltage amplifying circuit amplifies voltages from the first differential pair circuit and outputs amplified voltages.

Abstract: In a master block, the exponential conversion characteristic is determined on the basis of a common mode reference voltage and a reference voltage. In a slave block, the exponential conversion characteristic determined with the master block is used to create a control voltage and a gain control signal on the basis of a common mode reference voltage and a reference voltage. For example, a gain of the variable gain amplifier is controlled by using this gain control signal.

Abstract: A variable gain low noise amplifier is disclosed that offers flat gain versus frequency throughout the entire cable and broadcast television signal spectrum. The circuit uses multiple stages and buffering techniques to cancel the primary source of high frequency gain degradation. The invention also uses variable capacitor networks which track with gain control to control peaking within the circuit so as to have consistent gain control with frequency and gain. A further aspect of the invention is in the use of capacitors within the circuit to act as simple band-pass filters to roll off segments of the spectrum away from the channel of interest, thus reducing system-level distortion in a receiver.

Abstract: Quadrature modulators include a quadrature splitter and a pair of Gilbert Multiplier Cells coupled to the quadrature splitter, each of which is biased in Class-B. The quiescent current bias in the Gilbert Multiplier Cells may be substantially zero. Each of the Gilbert Multiplier Cells may include a pair of cross-coupled, emitter-coupled transistor pairs transistor pairs and a driver circuit that is coupled to at least one of the emitter-coupled transistor pairs and that is biased in Class-B. The driver circuit may include at least one current mirror circuit that is coupled to at least one of the emitter-coupled transistor pairs. The driver circuit also may include at least one current source that selectively applies current to at least one of the emitter-coupled transistor pairs, more specifically by selectively applying current to the at least one current mirror circuit.

Abstract: An amplifier circuit comprises a differential amplifier configured by a differential pair of transistors, a common emitter amplifier connected in parallel to the differential amplifier and configured by a pair of common-emitter configuration transistors, input and output terminals which are common to the differential amplifier and the common emitter amplifier, and a bias controller connected to the differential amplifier and the common emitter amplifier and configured to control a bias of at least one of the differential amplifier and the common emitter amplifier.

Abstract: An integrated receiver with channel selection and image rejection is substantially implemented on a single CMOS integrated circuit. A receiver front end provides programable attenuation and a programable gain low noise amplifier. LC filters integrated onto the substrate in conjunction with image reject mixers provide image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. Active filters utilize multi track spiral inductors with shields to increase circuit Q. Frequency planning provides additional image rejection. Local oscillator signal generation methods on chip reduce distortion. A PLL generates needed out of band LO signals. Direct synthesis generates in band LO signals. PLL VCOs are centered automatically. A differential crystal oscillator provides a frequency reference. Differential signal transmission throughout the receiver is used. ESD protection is provided by a pad ring and ESD clamping structure.

Abstract: A mixer circuit includes a local frequency multiplication unit including a pair of transistors having bases receiving local oscillation waves inverted in phase. A reference transistor is differentially connected with the pair of transistors. The pair of transistors and the reference transistor have their emitters connected to a collector of a modulated wave input transistor having a base receiving a modulated wave signal and an emitter connected to a constant current source, and have their collectors connected to a load. The commonly connected collectors of the pair of transistors and the collector of the reference transistor output modulation signals inverted in phase. The sum of currents flowing through the pair of transistors and the reference transistor equals the constant current of the constant current source flowing through the modulated wave input transistor, and the mixer circuit has a gain.

Abstract: NL0200232ier-mixer device comprising: an amplifier structure having at least one amplifier input and at least one amplifier output, while at least one of the amplifier outputs is looped back via a feedback to at least one of the amplifier inputs. The amplifier structure comprises a mixer structure. The mixer structure comprises at least one switch having a switch input communicatively connected with the radio input, and a switch output communicatively connected with the mixer output, which switch input and switch output in a conducting state of the switch are electrically connected with each other and in a non-conducting state of the switch are electrically substantially not connected with each other and which switch in use is switched from the conducting state to the non-conducting state and vice versa with the local oscillator signal.

Abstract: Phase shifting network (110) predistorts the input to non-linear amplifier (114) to counteract AM-PM distortion. The input signal is sampled at (116) and its amplitude is detected at (118). The amplitude signal is then used to index a lookup table (122) which contains corresponding data for controlling the phase shifting network (110). The input signal may be digital and the phase shifting process may be implemented in the digital domain.

Abstract: A fully differential amplifier slew rate boosting scheme for use with an amplifier having a closed-loop gain very near unity or less has the first plates of the compensation capacitors 50 and 52 conventionally coupled to internal high impedance gain nodes 40 and 42, but has the other plates of the compensation capacitors 50 and 52 unconventionally driven with the input signal IN+ and IN−. The voltages appearing across the compensation capacitors 50 and 52 in response to changes in the input signal is significantly less than that achieved using conventional compensation architectures where the other plates of the compensation capacitors are coupled to ground. Since little current is now required to charge the compensation capacitors 50 and 52, the input stage tail current no longer limits the slew rate.

Abstract: A variable gain amplifier includes an input stage that receives an input signal and converts the input signal into a corresponding intermediate signal. An output stage provides an output signal based on the intermediate signal and a gain control signal, with feedback signal being provided to the input stage as a function of the gain control signal, so that the intermediate signal varies as a function of the input signal and the feedback signal. The linearity performance of the VGA is substantially constant at the output over the useful input range of signal amplitudes.

Abstract: A switching mode N-order circuit comprises a first unit, a second unit and a comparator. The first unit includes an operational amplifier integral circuit to integrate a first voltage. The second unit has one or more stages of subunits in cascade each including an operational amplifier integral circuit to integrate a second voltage stage by stage. Each of the operational amplifier integral circuits is equipped with a switch to be controlled by the comparator to be discharged. The output of the N-order circuit is derived from the output of the second unit.

Abstract: A mixer circuit is composed of a differential amplifier circuit and a DBM circuit. The differential amplifier circuit has a first bipolar transistor, a second bipolar transistor, a first resistor provided between the respective bases of the first and second bipolar transistors, and a capacitor provided between the base of the second bipolar transistor and the ground. Since the first resistor and the capacitor are provided such that the circuit undergoes RC oscillation in response to the third harmonic of an input signal, the third and higher-order harmonics can be reduced.

Abstract: A power amplifier clipping circuit prevents sudden output changes when clipped from excessive input voltage, and includes an input voltage divider, two bias transistors connected to a positive voltage source, a third bias transistor connected to the first bias transistor and a first differential amplifier, a first current source connected to the third bias transistor and a negative voltage source and the first differential amplifier, fourth and fifth bias transistors connected to a negative voltage source and a second differential amplifier, a sixth bias transistor connected to the fourth bias transistor and the second differential amplifier, a second current source connected to the sixth bias transistor and a positive voltage source, a first output voltage controller connected between the negative voltage source and an output with a serial input resistor, and a second output voltage controller connected between the positive voltage source and the output and power amplifier.

Abstract: A frequency doubler includes a first Gilbert cell, a second Gilbert cell coupled to the first Gilbert cell, a frequency generator configured to apply a first sinusoidal wave to the first Gilbert cell, and a phase shifter applying a sinusoidal wave shifted from the first sinusoidal wave to the second Gilbert cell. A method of doubling frequency without using a feedback loop includes providing a first Gilbert cell, providing a second Gilbert cell coupled to the first Gilbert cell, applying a first sinusoidal wave to the first Gilbert cell, and applying a sinusoidal wave shifted from the first sinusoidal wave to the second Gilbert cell.

Abstract: A pole and zero circuit for changing the position of a pole, or a zero, of an amplifier including a capacitor to change the position of the pole or zero for the amplifier, a first current path for the capacitor, a variable impedance device in the first current path to connect the capacitor to the amplifier, and a current source to control the impedance of the variable impedance device.

Abstract: By a gain control circuit which has: a first differential input circuit comprising a differential pair of transistors Tr1 and Tr3 in which transistors Tr2 and Tr4 connected to diodes are inserted; a second differential input circuit comprising a pair of the transistor Tr3 and a transistor Tr5; and a current source circuit comprising a transistor Tr6 and an emitter resistor R3, and to which first to third individual control input signals VCLS1 to VCLS3 each having a predetermined inclination and an offset value, obtained by shifting the level of a control input signal VCNT are supplied, gain control signals VAGC having a linear characteristic, a monotone increase characteristic of which curve opens upwards, and a monotone increase characteristic of which curve opens sharply upwards are supplied in accordance with a monotone increase region of which curve opens upwards, a linear region, and a monotone increase region of which curve opens downwards, respectively, of a differential pair of transistors Tr11 and Tr

Abstract: A high bandwidth emitter-coupled logic (ECL) circuit is provided. The ECL circuit comprises an emitter-follower circuit with first and second transistors having collectors connected to a first power supply (Vcc), and emitters operatively connected to a second power supply (Vee2) approximately 1.5 volts less than the first power supply. The transistors receive differential input signals from an interfacing CML circuit. In some aspects, the first power supply is 3.3 volts and the second power supply is 1.8 volts. The CML circuit has an input to receive an input signal, a logic function having a level of series gated logic, first and second differential output signals responsive to the input signal and logic function, and is powered by the first power supply and a third power supply (Vee3) that is approximately equal to Vcc−(0.4+(level of series gated logic)(0.9 volts)).

Abstract: An image reject mixer for a low power battery operated radio telephone application. First and second doubly balance mixer circuits are connected to receive a differential radio frequency signal. Each of the doubly balance mixer circuits receives a local oscillator signal and a complimentary quadrature local oscillator signal. A first and second differential current produced by the first and second doubly balance mixture are combined in a quadrature combining circuit. The quadrature combining circuit adds an additional 90° of phase shift between the pairs of signals produced by each doubly balance mixture, so that the mixture output signals are added in a phase quadrature relationship thereby canceling unwanted spur and image components contained in the respective mixer output circuits.