Abstract: A system and method for frequency hopping precalibrates a subset of a plurality of channels, storing the channels' associated curves in a computer readable medium. Before hopping to a new channel, decision making circuitry can access the precalibrated curves. If the destination channel has an associated curve, then the system can use the values from that curve when hopping to a new channel. If the destination channel does not have an associated precalibrated curve, then the system can identify a closely situated channel with a precalibrated curve and use an offset value to settle at the destination channel. According to another aspect of the present invention, the offsets can be updated. According to a further aspect of the invention, the updated can be done dynamically.

Abstract: A high-speed current-mode clock driver includes feedback circuitry to maintain the voltage swing of a biasing node within a defined range. The current-mode clock driver includes a PMOS and an NMOS transistor receiving an oscillating signal at their gate terminals. The drain terminals of the PMOS and NMOS transistors are respectively coupled to input terminals of first and second variable conductivity circuits whose output terminals are coupled to a common node. A control circuit increases the conductivities of the first and second variable conductivity circuits in response to decreases in voltage swing of the common node, and decreases the conductivities of the first and second variable conductivity circuits in response to increases in voltage swing of the common node. The first and second variable conductivity circuits are optionally PMOS and NMOS transistors respectively.

Abstract: An integrated circuit and method are provided for controlling variation in the voltage output from on-chip voltage generation circuitry. The integrated circuit comprises voltage generation circuitry configured to operate from a supplied input voltage and to generate at an output node an on-chip voltage supply different to the supplied input voltage. A circuit block is then arranged to receive the on-chip voltage supply generated by the voltage generation circuitry, during operation of the circuit block the circuit block presenting a varying load on the output node. Oscillation circuitry is also coupled to the output node to provide an additional load on the output node, and is configured to produce an oscillation signal whose frequency varies as the value of the on-chip voltage supply varies. Control circuitry is configured to be responsive to a trigger condition to adjust the additional load provided on the output node by the oscillation circuitry.

Abstract: A current driving circuit may include a reference voltage input terminal; a resistor connection terminal; an output terminal via which the light emitting element is connected; a reference voltage generating unit; a transistor arranged such that one terminal thereof is connected to the resistor connection terminal; and an operational amplifier including first and second non-inverting input terminals and a single inverting input terminal, and arranged such that the output terminal thereof is connected to a control terminal of the transistor, the internal reference voltage is input to the first non-inverting input terminal, the external reference voltage is input to the second non-inverting input terminal, and the inverting input terminal thereof is connected to the resistor connection terminal. When the external resistor is connected between the resistor connection terminal and a ground terminal, a driving current is output via the output terminal.

Abstract: A internal voltage generator includes a plurality of voltage level detection units, each configured to detect a voltage level of a corresponding internal voltage terminal, based on a predetermined target voltage level assigned to the corresponding internal voltage terminal, and generate a detection signal, a common internal voltage generation unit configured to generate an internal voltage through a pumping operation in response to the detection signal outputted from the voltage level detection units, and a path multiplexing unit configured to selectively output the internal voltage to one of the internal voltage terminals.

Abstract: To provide an internal power supply circuit that supplies a power supply voltage to an internal circuit of a semiconductor device via an internal power supply wiring, the internal power supply circuit includes a plurality of power supply units connected in common to the internal power supply wiring and an internal-power-supply control circuit that selects either activation or deactivation with regard to at least a part of the power supply units.

Abstract: To provide an internal power supply circuit that supplies a power supply voltage to an internal circuit of a semiconductor device via an internal power supply wiring, the internal power supply circuit includes a plurality of power supply units connected in common to the internal power supply wiring and an internal-power-supply control circuit that selects either activation or deactivation with regard to at least a part of the power supply units.

Abstract: To provide an internal power supply circuit that supplies a power supply voltage to an internal circuit of a semiconductor device via an internal power supply wiring, the internal power supply circuit includes a plurality of power supply units connected in common to the internal power supply wiring and an internal-power-supply control circuit that selects either activation or deactivation with regard to at least a part of the power supply units.

Abstract: A control circuit includes a triangular wave generating circuit, a temperature sensing circuit, a first comparator, and a switching circuit. The triangular wave generating circuit outputs a triangular wave signal. The temperature sensing circuit senses a temperature surrounding a fan and outputs a temperature signal. A non-inverting terminal of the first comparator is connected to the triangular wave generating circuit. An inverting terminal of the first comparator is connected to the temperature sensing circuit. The first comparator compares the triangular wave signal with the temperature signal to output a control signal. The switching circuit is connected between a power supply and the fan. The switching circuit turns on or off according to the control signal.

Abstract: An oscillation circuit, and a semiconductor device incorporating same, include: an oscillation unit with a plurality of inverters and configured to perform signal transmission between first and second nodes of the inverters such that each of the inverters performs an oscillation operation to generate clock signals having different phases when a control signal is activated, and latch a clock signal of the second node and cut off the signal transmission between the first and second nodes to stop the oscillation operations of the inverters when the control signal is deactivated; and a control unit to activate the control signal when an oscillation enable signal is activated, and deactivate the control signal using one of a clock signal output from an inverter connected to the second node and clock signals of which the phases lag that of a clock signal of the first node, when the oscillation enable signal is deactivated.

Abstract: The present invention includes systems, methods and apparatus for continuously, independently and in some cases remotely monitoring the operation of a current interrupter used to test a cathodic protection system, or the cathodic protection system itself, for verification of proper operation. Embodiments of the invention include electronic devices that may be temporarily attached to a current interrupter that is being used to test a cathodic protection system, or directly to the cathodic protection system itself. Embodiments of the invention monitor the activity of an interrupter by sampling the output (voltage and time) to identify the cycle(s) of the interrupter. The invention provides truly independent verification since it does not need to know in advance the sequence or cycle times of the current interrupter being monitored. The information obtained by the invention is output so that it may be provided to a user, displayed, downloaded or stored for future reference.

Abstract: A switching power supply device performs a stable operation with fast response for a semiconductor integrated circuit device. A capacitor is provided between the output side of an inductor and a ground potential. A first power MOSFET supplies an electric current from an input voltage to the input side of the inductor. A second power MOSFET turned on when the first power MOSFET is off allows the input side of the inductor to be of a predetermined potential. A first feedback signal corresponding to an output voltage obtained from the output side of the inductor and a second feedback signal corresponding to an electric current flowed to the first power MOSFET are used to form a PWM signal. The first power MOSFET has plural cells of a vertical type MOS-construction.

Abstract: An integrated circuit is used to monitor and process parametric variations, such as temperature and voltage variations. An integrated circuit may include a temperature-sensitive oscillator circuit and a temperature-insensitive oscillator circuit, and frequency difference between the two sources may be monitored. In some embodiments, a parametric-insensitive reference oscillator is used as a reference to measure frequency performance of a second oscillator wherein the second oscillator performance is parametric-sensitive. The measured frequency performance is then compared to a tamper threshold and the result of the comparison is indicative of tampering.

Abstract: An internal voltage generating circuit includes an oscillation unit configured to generate an oscillation signal, and to change a period of the oscillation signal according to whether is in a burn-in test mode; and a negative voltage pumping unit configured to generate a negative voltage in response to the oscillation signal.

Abstract: A magneto-electric-induction conversion system of a wireless input device includes an emitter and a receiver. A plurality of serially-connected resonant circuits, arranged side by side, makes resonance, so transmission energy is enhanced. An electromagnetic wave is transmitted via an inductive antenna, then received and converted by predetermined parallel-connected resonant circuits into an available power source, so that the energy is effectively delivered.

Abstract: A back-bias voltage generating circuit controls the back-bias voltage in a predetermined range by detecting the back-bias voltage in case the back-bias voltage level decreases below a predetermined target level. The circuit includes first and second detecting units outputting respective detection signals, which detect a voltage level of the terminal based on respective higher first and lower second target levels. An oscillator generates an oscillation signal that oscillates at a predetermined frequency, in response to a detection signal of the first voltage detecting unit. A charge pumping unit drives the terminal by performing charge pumping in response to the oscillation signal. A voltage level control unit controls the voltage level of the terminal in response to the detection signals, whereby the terminal's voltage level is lower than the first target level and higher than the second target level.

Abstract: An internal voltage generator capable of reducing the variation width in the level of an internal voltage VPP, by performing charge pumping only a predetermined number of times in a period where an oscillator driving signal is at a logic HIGH level, and then stopping the charge pumping operation. The oscillator controller generates an oscillation control signal for stopping an oscillation operation of a ring oscillator by using an output signal of a level detector and an output signal of the ring oscillator. The ring oscillator does not generate an oscillation signal at a predetermined time point where an output signal of the level detector is at a HIGH level in response to the oscillation control signal. The charge pump circuit generates an internal voltage by performing a charge pumping operation only predetermined times in response to the oscillation signal, and then stopping the charge pumping operation.

Abstract: A voltage control oscillator, outputting a clocking signal with a specific frequency according to an input voltage level, has a constant current source, a voltage/current converter, a current mirror and an oscillating circuit. The constant current source provides a predetermined reference current. The voltage/current converter is coupled to the constant current source, for determining a first current flowing through the voltage/current converter according to the input voltage. The current mirror has a first current terminal coupled to the constant current source, for determining a third current flowing through a second current terminal according to the second current flowing through the first current terminal, wherein the second current is the reference current subtracted by the first current. The oscillating circuit is coupled to the second current terminal of the current mirror, for determining a frequency of the clocking signal according to the third current.

Abstract: A voltage-controlled current source and a frequency scanner using the same are provided. The voltage-controlled current source includes an impedance circuit, an amplifier, a transistor, and a current mirror. A first terminal of the impedance circuit is coupled to a common voltage. A first terminal of the amplifier is coupled to a second terminal of the impedance circuit, and a second terminal of the amplifier receives a control voltage. A gate of the transistor is coupled to an output terminal of the amplifier, and a first source/drain of the transistor is coupled to the other terminal of the impedance circuit. The current mirror is coupled to a second drain/source of the transistor, and includes a current output terminal, wherein a current output by the current output terminal is proportional to the current flowing through the transistor.

Abstract: A semiconductor memory device includes a first pump clock generator configured to generate a first pump clock signal based on a power supply voltage. The device also includes a first charge pump configured to generate a first pump output voltage in response to the first pump clock signal. The device also includes a second pump clock generator configured to generate a second pump clock signal based on the first pump output voltage. The device also includes a second charge pump configured to generate a second pump output voltage in response to the second pump clock signal. The device also includes a switching unit configured to selectively connect the first charge pump to the second charge pump.

Abstract: The present invention relates to a satellite signal transmitter, and in particular, to a satellite signal transmitter with a dual-input DC power control switch.

Abstract: A replenish circuit for a semiconductor memory device, including a bias current generating unit adapted to generate a bias current, a frequency controllable oscillator adapted to receive the bias current and to provide an oscillating output, and a pulse generator adapted to receive the oscillating output and to generate first and second pulses as a function of the oscillating output, the second pulse being embedded in the first pulse, the first pulse causing the bias current generating unit to be connected to a power supply, and the second pulse being fed to sample-and-hold circuitry adapted to sample the bias current and hold the value thereof during the first pulse.

Abstract: Methods are described that involve characterizing an oscillator's jitter or phase noise over a plurality of the oscillator's effective number of delay stages. The oscillator comprises a series of delay stages. Each one of the effective number of delay stages, if selected for the oscillator, describes a respective permissible range of inverter drive strengths that may be used within each delay stage of the oscillator to achieve a respective jitter or phase noise characteristic.

Abstract: A system and method are disclosed which utilize an on-chip oscillator to provide the appropriate clock frequency for components of the chip to manage power consumption by the chip. More specifically, in a preferred embodiment of the present invention, an on-chip oscillator is utilized to provide the clock frequency for the chip's core circuitry, and such oscillator can dynamically adjust such clock frequency to manage the chip's power consumption. Thus, such on-chip oscillator generates the processor clock instead of the usual synchronous, externally controlled clock generator. A preferred embodiment of the present invention utilizes a voltage controlled frequency oscillator to control the chip's clock frequency in order to dynamically manage power consumption by the chip. Such oscillator is preferably operable to adjust its output frequency based on the voltage supplied to such oscillator to effectively manage the chip's power consumption.

Abstract: A low frequency oscillator is described. The low frequency oscillator has a bias circuit including a metal-oxide semiconductor (MOS) resistor. A biased ring oscillator is coupled to the bias circuit. The biased ring oscillator includes multiple current limiting transistors.

Abstract: A multi-driving apparatus by a multi-level detection which pluralizes a voltage detection level in order to effectively operate voltage generators in the voltage generation circuit, minimizes a level fluctuation, reduces noise influenced on a total operation of the apparatus, increases a reliability of the apparatus, and reduces the power-consumption.

Abstract: A reference voltage generating device and method enables dissipation current to be reduced at the time of normal operation. An oscillator outputs a voltage of a low level intermittently during a prescribed time interval. An operational amplifier operates only when an output voltage of the oscillator is a low level. When the output voltage of the oscillator is a high level, a reference voltage “VREF” becomes a floating state so that a level is maintained by compensating the capacity of a capacitor C1. The reference voltage “VREF,” whose electric charge leaks due to a leak at the junction of a transistor, is maintained while operating the operational amplifier during a time interval T in a time period 10 T.

Abstract: A delayed start oscillator includes an oscillator enable signal having first and second states thereof for selectively enabling and disabling the oscillator respectively. An oscillator output signal has first and second levels thereof responsive to the first state of the oscillator enable signal for providing an oscillator output signal. A timing circuit is coupled to a supply voltage line for providing a timing signal output indicative of a selected delayed start duration and a plurality of series connected inverting stages are coupled to receive the oscillator output signal and the timing signal. The oscillator output signal remains at a first level for the delayed start duration in response to the timing signal and subsequently transitions between the first and second levels at an operational frequency determined by the plurality of inverting stages until the oscillator enable signal transitions to the second state thereof.

Abstract: A method and apparatus for distributing clock signals in an integrated circuit is disclosed. In a preferred embodiment, the power grid of the integrated circuit is used to distribute a periodic timing signal, in addition to the power supply voltage, to local areas of the integrated circuit, the local areas having circuitry for extracting a local clock signal from the periodic timing signal. Instead of simply carrying a DC power supply signal, the power grid is provided with a waveform constituting the sum of the DC power supply signal and the periodic signal, and the power grid then supplies all areas of the integrated circuit with this waveform. Local circuits then tap the power grid as needed to extract the periodic signal, from which local clock signals are then generated. In another preferred embodiment, a periodic timing signal is provided in the form of electromagnetic radiation to local areas of the integrated circuit by means of an optical or radio frequency transmitter.

Abstract: A circuit including a network of capacitors and switching transistors having two modes of functioning. The first mode isolates all the capacitors and simultaneously charges them to the level of the supply voltage. The second mode connects all these capacitors in series between the supply voltage Vdd and an output node of the network in order to instantaneously increase the voltage level of this output node to a voltage level that is greater than the supply voltage Vdd. The capacitors are all connected in series by transistors that are placed between them and controlled by a signal that has a peak voltage that is greater than the voltage to be switched to the output node of the network.

Abstract: An electrically erasable and programmable read only memory device is equipped with a supply voltage switching circuit responsive to a write enable signal for selectively supplying a write-in voltage and a read-out voltage through a power distribution line to a row address decoder unit, and the supply voltage switching circuit includes a series of first and second p-channel enhancement type field effect transistors having respective gate electrodes coupled to the write-in voltage line and the power distribution line, a third p-channel enhancement type field effect transistor having a gate electrode coupled to the power distribution line and a controlling sub-circuit responsive to the write enable signal so as to supply first and second control signals of the ground level and a third control signal of the potential level equal to the power distribution line to the first and second p-channel enhancement type field effect transistors and the third p-channel enhancement type field effect transistor when the write

Abstract: A voltage generator for use in a semiconductor memory device suitable for use as a backbias voltage generator, as an internal high voltage generator, or as an internal power voltage generator. The present invention includes: a rectifier for producing a dc voltage power by rectifying clock signals; an oscillator including an odd number of invertors connected in series, and with the output of the last invertor fed back to the first invertor so as to oscillate clock pulses; and one or more bypass circuit connected so as for the output of the first invertor to bypass one or more intermediate invertors, and connected and disconnected by a control switch.