With Transformer Patents (Class 327/86)
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Patent number: 8299819Abstract: The present invention relates to a simple and small-sized circuit configuration (10) for significantly reducing resettling time of a peak or zero current comparator. This circuit configuration (10) provides the comparator input stage with an alternative current path at the comparator input submitted to a large voltage variation able to disturb the DC-settings. This circuit configuration (10) comprises a pair of small transistors (P3, P4) coupled to a differential pair of transistors (N1, N2) of the comparator input stage and having a polarity different from said pair of transistors (P3, P4). The gates of the transistors P3 and P4 share a common terminal connected to said comparator input. The currents and voltages across the comparator are always maintained close to the normal DC-setting values during the voltage transition phase. This circuit configuration (10) can be used in any current comparator for detecting a peak or a zero current, in particular, in DC-DC converters based on a switched operating mode.Type: GrantFiled: April 28, 2006Date of Patent: October 30, 2012Assignee: ST-Ericsson SAInventor: Remco Brinkman
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Publication number: 20120112795Abstract: A switching mode power supply with improved peak current control is disclosed. A varying reference signal is adopted to limit the peak current in the energy storage component. The varying reference signal is an exponential function of a time period when a power switch is ON, wherein the power switch is coupled to the energy storage component. The varying reference signal may be generated by a circuit comprising a RC circuit and one or several voltage sources.Type: ApplicationFiled: November 3, 2011Publication date: May 10, 2012Inventors: Siran Wang, Yuancheng Ren, Junming Zhang, En Li
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Patent number: 8023572Abstract: A communication interface employing a differential circuit and method of use is disclosed. In one form, a circuit operable to communicate signals via a communication bus can include a differential signaling circuit operable to be coupled to a communication bus. The differential signaling circuit can include a first current carrying element and a second current carrying element. The circuit can also include a shunt circuit including a first transformer. The first transformer can include a primary transformer element and a secondary transformer element. The first transformer can be operably associated with the communication bus.Type: GrantFiled: November 29, 2006Date of Patent: September 20, 2011Assignee: Dell Products, LPInventor: Jeffrey C. Hailey
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Patent number: 6314481Abstract: A system and method for constructing a resistance integrated coupler adapted to be coupled between a data bus and a terminal device. The system and method includes the steps of calculating a desired resistance of a set of data-bus windings, wherein the desired resistance is substantially (1.5×Zo), wherein Zo is a selected data bus cable nominal characteristic impedance; winding the set of data-bus windings to form a first part of the resistance integrated coupler using a specified amount of high resistance wire, the specified amount of high resistance wire having a total resistance substantially equal to the calculated desired resistance; and winding a set of terminal device windings to form a second part of the resistance integrated coupler. The resistance integrated coupler is constructed substantially in accordance with the guidelines of MIL-STD-1553B.Type: GrantFiled: January 19, 1999Date of Patent: November 6, 2001Assignee: Phoenix Logistics, Inc.Inventor: Gene L. Fehlhaber
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Patent number: 5982204Abstract: An information-discriminating circuit has a biasing device that superposes bias voltage on an input signal, and a comparator that discriminates information by comparing an output signal from the biasing device with a threshold value. The difference between the bias voltage and the threshold value is continuously adjusted such that a noise margin is varied according to the amplitude of the input signal.Type: GrantFiled: December 12, 1997Date of Patent: November 9, 1999Assignee: Yamaha CorporationInventors: Akihiko Toda, Masao Noro
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Patent number: 5629645Abstract: A transmission-line-voltage control circuit for controlling a level of a transmission line is disclosed. A signal of a first level indicating a logic high and a signal of a second level indicating a logic low are supplied to the transmission line. The transmission-line voltage control circuit includes a circuit connected to the transmission line. This circuit reduces, after the signal of the first level is supplied to the transmission line, the level of the transmission line to a third level which indicates the logic high and is less than the first level. And also the circuit increases, after the signal of the second level is supplied to the transmission line, the level of the transmission line to a fourth level which indicates the logic low and is higher than the second level.Type: GrantFiled: March 14, 1995Date of Patent: May 13, 1997Assignee: Fujitsu LimitedInventors: Yoshinori Okajima, Kazuyuki Kanazashi
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Patent number: 5604454Abstract: An integrated circuit (20) includes multiple output buffers (30, 50, 70) which switch substantially simultaneously. The output buffers (30, 50, 70) are connected together via a common node (25). Before any one of the output buffers (30, 50, 70) actively drives its corresponding output node to an appropriate logic state, a coupling circuit (42) in the output buffer (30) evaluates whether the new logic state matches the old logic state. If the coupling circuit (42) determines that the logic states are different, then it couples the output node to the common node (25). With each output buffer in the group of multiple output buffers (30, 50, 70) functioning similarly, energy is conserved by using the charge stored in the low-going nodes to charge up the high-going nodes.Type: GrantFiled: September 29, 1995Date of Patent: February 18, 1997Assignee: Motorola Inc.Inventors: Jeffrey E. Maguire, Meng-Bing Yu
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Patent number: 5554948Abstract: An adaptive threshold circuit for use with a magnetic type of sensor that has a pick-up coil. The pick-up coil has an alternating voltage induced therein when a slot or tooth formed in a wheel rotates past the sensor. The circuit produces a square wave pulse voltage during positive half-cycles of the voltage generated in the pick-up coil. The circuit includes a digital to analog converter the input of which is connected to a selectable pulse counter. The pulse counter has a decrement function that allows for the count to be varied so as to accommodate sudden wheel decelerations. According to one embodiment, the counter may down count to reduce the count number. In accordance with a second embodiment, the counter may shift out one bit to perform a divide-by-two operation on the count number.Type: GrantFiled: May 31, 1994Date of Patent: September 10, 1996Assignee: Delco Electronics CorporationInventors: Mark C. Hansen, Walter K. Kosiak