Abstract: According to one embodiment, a semiconductor device includes a first switch element including a first end to which a first voltage is applied, and a second end and a gate electrically coupled to a first node, a second switch element including a first end to which a second voltage is applied, and a second end and a gate electrically coupled to the first node, a third switch element including a first end to which the second voltage is applied, a second end electrically coupled to a second node, and a gate coupled to the first node, a fourth switch element including a gate coupled to the second node, and a first terminal electrically coupled to a first end of the fourth switch element and outputting a signal based on a voltage of the second node.

Abstract: A circuit device includes an HS driver that is a USB HS-mode transmission circuit and a disconnection detection circuit that performs disconnection detection of USB. The disconnection detection circuit includes a holding circuit that measures and holds first voltage level information that is voltage level information of one signal out of a DP signal and a DM signal of the USB when the HS driver is transmitting a host chirp, a determination voltage generation circuit that generates a first determination voltage based on the first voltage level information, and a detection circuit that performs disconnection detection of the USB based on the first determination voltage and outputs a disconnection detection signal.

Abstract: A process is provided to trim PCRAM cells to have consistent programming curves. Initial programming curves of PCRAM cells are measured. A target programming curve is set up for the PCRAM cells. Each PCRAM cell is then modulated individually to meet the target programming curve.

Abstract: A comparator circuit includes: a comparator comprising: a first input terminal receiving an input voltage; a second input terminal receiving a reference voltage; an output terminal outputting an output signal according to a result of a comparison between the input voltage and the reference voltage; and a power supply terminal receiving an operating voltage; and a mode controller applying a first operating voltage and a first reference voltage to the second input terminal and the power supply terminal of the comparator for a predetermined delay time in response to a supply of power being initiated from a power supply, and applying a second operating voltage and a second reference voltage to the second input terminal and the power supply terminal of the comparator in response to the delay time elapsing, wherein the first operating voltage is higher than a ground voltage and is lower than the second operating voltage.

Abstract: According to an aspect, an auto-zero amplifier includes a main amplifier, a secondary amplifier connected to the main amplifier, a plurality of switching including a first switch and a second switch, and a leakage control circuit.

Abstract: An undervoltage detection circuit includes a voltage divider, a voltage-to-current (V-to-I) converter and a current comparator. The voltage divider divides a supply voltage to generate a divided voltage. The V-to-I converter converts the divided voltage into a first current based on a first V-to-I transfer function, and converts the divided voltage into a second current based on a second V-to-I transfer function different from the first V-to-I transfer function. The current comparator compares the first and second currents to generate a comparison signal that indicates whether the supply voltage is sufficiently large.

Abstract: A signal output circuit includes: a driver circuit including a variable current source and configured to output a multilevel signal; a replica circuit having a circuit configuration equivalent to the driver circuit; and a control circuit configured to control a characteristic of the driver circuit, based on an output signal of the replica circuit, wherein the replica circuit includes: a first replica circuit part configured to output first output signals having signal levels of a first subset of a plurality of signal levels corresponding to the multilevel signal; and a second replica circuit part configured to output second output signals having signal levels of a second subset of the plurality of signal levels, and the control circuit is configured to control a characteristic of the variable current source, based the first output signals and the second output signals.

Abstract: A difference amplifier can be used for providing an amplified representation of a sensed current through a load device. A separate signal path can be used to provide fast fault detection, without requiring use of the difference amplifier. For example, a voltage scaling circuit can be used to scale a differential input signal indicative of the load current. The scaled representation can then be compared against a specified threshold corresponding to a fault current value. In this manner, a high-speed low-voltage comparator can be used to provide detection of a fault current that otherwise exceeds an input range of the difference amplifier, where the difference amplifier is used separately for precision current monitoring. As an illustrative example, such a scheme can provide fault detection even when an input of the difference amplifier is saturated.

Abstract: As described, a device may include detection circuitry to detect a deck of a memory array. The deck may include a conductive identifier coupled between a logic high voltage node and the detection circuitry a control circuit coupled to the detection circuit. The control circuit may perform operations including transmitting a test enable signal to the detection circuitry. The detection circuitry may generate a valid signal indicative of an existence of the conductive identifier of the deck in response to the test enable signal. The operations may also include the control circuit receiving the valid signal from the detection circuitry and adjusting a memory operation associated with the memory array based at least in part on the valid signal.

Abstract: Methods and apparatus for implementing a current-mirror based level shifter circuit are provided. The current-mirror based level shifter circuit includes a current-mirror circuit, a feedback control circuit, a power down circuit and a plurality of inverter circuits. The apparatus is configured to provide a wide voltage shifting range using the current-mirror based level shifter circuit. The apparatus comprising a feedback loop with two diode connected transistors may provide a constant drivability to the node that drives the output, when a current-mirror circuit is turned-off.

Abstract: A method of managing backup power for wireless vehicle communication is provided. The method includes determining whether a vehicle is turned on or off and when the vehicle is turned off, determining whether a wireless communication unit in the vehicle is in a sleep mode. When the wireless communication controller is in the sleep mode, the wireless communication controller is converted into a standby mode, and power-switching control is performed based on a standby time according to the standby mode.

Abstract: The present disclosure relates to a signal detection method and component, as well as a display device. The display device includes a timing controller and a source driver. The source driver receives a test code stream from the timing controller, which is obtained through encoding of an initial code stream by the timing controller, the initial code stream representing a test signal. The source driver decodes the test code stream. When the decoded code stream is different from the initial code stream, configuration information of the source driver is acquired. The configuration information is transmitted to the timing controller, and is adjusted according to reference information of the timing controller when it does not match with the reference information. The source driver receives adjusted configuration information transmitted by the timing controller, and then receives a subsequently transmitted signal according to the adjusted configuration information.

Abstract: A method for stabilizing bandgap voltage includes the steps of: providing a first layout pattern designated with a first voltage; reducing a critical dimension of the first layout pattern for generating a second layout pattern corresponding to a second voltage; matching the second voltage with a target voltage; and then outputting the second layout pattern to a mask. Preferably, the first layout pattern and the second layout pattern include polysilicon resistor patterns.

Abstract: Temporal history of voltage supply level enveloping high-speed transient events is provided by circuitry on the same chip or in the same multi-chip module as the processor cores. In some embodiments supply voltage to the processor cores is compared to predetermined or programmable thresholds, and the result of the comparisons are stored for use by a host processor.

Abstract: A sense amplifier for a flash memory is disclosed which includes a pre-charging circuit, a first capacitor, a first inverter, and a first transmission gate connected in parallel with the first inverter, the pre-charging circuit is connectable to a reference voltage node, and is able to pre-charge a word line, of the flash memory, via the reference voltage node, a potential of the reference voltage node remains unchanged after the pre-charging is completed; a potential of the reference voltage node is adjustable according to a state of the flash memory until an output voltage of the first inverter changes; the first capacitor has a first end connected to the reference voltage node, a second end connected to an input of the first inverter and a first end of the first transmission gate; an output of the first inverter is connected to a second end of the first transmission gate.

Abstract: A current sample-and-hold circuit and a sensor, are provided. The current sample-and-hold circuit is used for offsetting a background photocurrent of a photodiode, and includes a capacitor and a first transconductance amplifier which has adjustable transconductance and outputs a sampled current to the photodiode to offset the background photocurrent of the photodiode. One end of the capacitor is connected with a power supply, the other end of the capacitor is connected with one end of the first transconductance amplifier; and the other end of the first transconductance amplifier is connected with the photodiode to output the sampled current to the photodiode. When the background photocurrent of the photodiode is increased, a change of a voltage of the capacitor within a large range can be avoided by increasing the transconductance of the first transconductance amplifier, so that the current sample-and-hold circuit can offset a larger background photocurrent.

Abstract: A comparator includes a differential pair circuit comprising NMOS transistors, the differential pair circuit configured to output a signal corresponding to a difference between first and second input signals supplied thereto, and an input circuit configured to raise a voltage level of the first input signal supplied to the differential pair circuit when the voltage of the first input signal is less than a predetermined threshold value.

Abstract: Semiconductor circuits are provided for emulating neuron firing process using a positive feedback transistor having first and second gate electrodes in the longitudinal direction of a channel region. The first gate electrode is connected to a gate electrode of a first p-channel MOSFET to be an input terminal and the second gate electrode is connected to a drain to be applied with a supply voltage. Thus electrons and holes can accumulate separately in a channel region (i.e., a body) under each of the gate electrodes by applying input signals to the input terminal and drastically reduce the wasted power consumption in the non-fired neurons because the current is turned on and off only at a moment that corresponds to a firing of the neuron. Thus, the semiconductor circuits can be driven by low power and have the same level of endurance as a general MOSFET.

Abstract: A timer for creating a stable on time. The timer may have a reference voltage source, and an input voltage source. The voltage sources providing voltage that can be applied to a various circuit components such as capacitors, inductors, resistors, diodes, transistors, or other components. The reference voltage source may also be modified by a set of transistors coupled as a diode before being seen by an input of a timer comparator. The reference and input voltage source signals, which may be modified by circuit components, are compared by the timer comparator and then output as a timer control signal. The timer control signal may control a voltage converter, or the switches of a voltage converter.

Abstract: A current sensor includes a current sensing resistor, a first transistor, a second transistor, a bias voltage generating circuit, and a current mirror. The first terminal of the first transistor is coupled to the first terminal of the current sensing resistor. The first terminal of the second transistor is coupled to the second terminal of the current sensing resistor. The bias voltage generating circuit supplies a first bias voltage to the control terminal of the first transistor and a second bias voltage to the control terminal of the second transistor. The first bias voltage and the second bias voltage are dependent on the voltage of the first input terminal or the voltage of the second input terminal. The two current terminals of the current mirror are coupled to the second terminals of the second transistor and the first transistor, respectively.

Abstract: According to an embodiment of the present invention, an apparatus for detecting a fingerprint is provided, which includes a plurality of sensor pads receiving a response signal from a finger applied to a driving signal, a sensing circuit outputting a sensing signal based on the response signal, and a sensing signal adjusting unit sampling the sensing signal outputted from the sensing circuit maintaining the sensing signal, and adjusting an average voltage level of the sensing signal based on a reference voltage.

Abstract: An apparatus includes an integrated circuit (IC). The IC includes a current source, to sink or source an output current, in response to a control signal, and a switch-capacitor resistor coupled to the current source. The apparatus further includes a controller coupled to derive the control signal from a voltage across the switch-capacitor resistor, the controller further to provide a switch control signal to the switch-capacitor resistor.

Abstract: An object is to reduce power consumption of an analog-digital converter circuit. An analog potential obtained in a sensor or the like is held in a sample-and-hold circuit including a transistor with an extremely low off-state current. In the sample-and-hold circuit, the analog potential is held in a node which is able to hold a charge by turning off the transistor. Then, power supply to a buffer circuit or the like included in the sample-and-hold circuit is stopped to reduce power consumption. In a structure where a potential is held in each node, power consumption can be further reduced when a transistor with an extremely low off-state current is connected to a node holding a potential of a comparator, a successive approximation register, a digital-analog converter circuit, or the like, and power supply to these circuits is stopped.

Abstract: A drive circuit coupled to a switching device for controlling operations of a load, which includes: a drive element configured to be coupled to the switching device; a control circuit for shutting down and turning on the drive element to control the switching device to operate and stop the load, the control circuit including a control switch having a first terminal coupled to the drive element and a second terminal to receive a control signal for controlling the drive element operation. The control switch is turned on by a first control signal, shutting down the drive element and the switching device to stop operating the load. The control switch is turned off by a second control signal, turning on the drive element and controlling the switching device to operate the load normally.

Abstract: In one embodiment, a method comprises generating, by a control unit, a first drive signal and a second drive signal. The method further includes emitting, by a touch sensor, a first electric field that extends in a plurality of directions in response to reception of the first drive signal. The method also includes attenuating, by a conductive shield, a portion of the first electric field that extends from the touch sensor towards the conductive shield by generating a second electric field in response to reception of the second drive signal.

Abstract: A bidirectional transceiver includes a media transmitter, a media receiver, a network transmitter, and a network receiver. Each of these components includes an interface to a respective differential wire pair of a cable. By coupling a pair of such transceivers, a media stream and network connectivity can be sent over the cable in either or both directions. Using an opportunistic scheduling method, each media stream can contain audio, video, and control information in uncompressed form. Power can be transferred over the cable so that a media device containing one transceiver can be powered by a media device containing the other transceiver.

Abstract: An inductor current-sensing circuit for measuring a current in an inductor includes (a) a first RC network coupled between a first terminal of the inductor and a reference voltage source; and (b) a second RC network coupled between a second terminal of the inductor and the reference voltage source. The first RC network and the second RC network each have a time constant substantially equal to the ratio between the inductance and the DC resistance of the inductor. The inductor which current is being measured may be a primary inductor of a four-switch buck boost converter receiving an input voltage and providing an output voltage.

Abstract: A semiconductor device is capable of detecting a power supply voltage abnormality without degrading the performance of internal circuits. The semiconductor device includes a plurality of power supply inspection circuits and a result storage register. The power supply inspection circuits detect a power supply voltage abnormality in each pad that couples an internal wiring disposed in the semiconductor device to another part disposed outside of the semiconductor device. The result storage register stores inspection results indicated by result signals output from the power supply inspection circuits.

Abstract: a lighting fixture includes a power input configured to be coupled to a power source, a power output configured to be coupled to an external load and a lighting device, such as a light emitting diode (LED) device, coupled to the power input and configured to provide illumination. The lighting fixture further includes a protection circuit coupled between the power input and the power output and configured to detect a condition of a power source coupled to the power input and to control power transmission between the power input and the power output responsive to the detected condition. The power output may be configured to support daisy-chain connection of the lighting fixture to at least one other lighting fixture, and the protection circuit may be configured to control power transmission to the at least one other lighting fixture responsive to the detected condition.

Abstract: The power supply device includes a power switch, a rectification diode which rectifies a supplied current in accordance with a switching operation of the power switch to generate an output current, and a switch control circuit which averages a detected sensing voltage corresponding to a sensing voltage which follows a current which flows through the power switch to generate an output current estimating voltage corresponding to the output current.

Abstract: An in-rush current controller to turn-on a semiconductor output switch is described. The output switch is arranged in series with an output capacitor. The switch comprises a switch control port for controlling an output current and an output voltage. The controller comprises an amplifier to source or sink a switch control current to or from the switch control port, wherein the switch control current is dependent on an amplifier control current at an amplifier control port. The controller comprises a reference current source to provide a reference current at the amplifier control port, subject to a control signal indicating that the output switch is to be turned on. Furthermore, the controller comprises a feedback capacitor to provide a feedback current at the amplifier control port in dependence of a variation of the output voltage.

Abstract: A comparator includes a first input stage coupled to a first signal input and a first reference input, wherein the first input stage is coupled between a first node and a second node. A second input stage is coupled to a second signal input and a second reference input, wherein the second input stage is coupled between a third node and the second node. An output stage generates at least one output signal in response to the first and second input signals. First switching circuitry is coupled between the first node and the output stage. The first switching circuitry is for coupling the first node to a fourth node in response to a reset signal. Second switching circuitry is coupled between the third node and the output stage. The second switching circuitry is for coupling the third node to a fifth node in response to the reset signal.

Abstract: Provided is a receiver for human body communication, the receiver including a comparator, a clock and data recovery circuit, and resistors or passive elements having a resistance property in power supply and ground connection units of other digital operation components and a power supply and ground connection unit of a printed circuit board (PCB) to remove or suppress a digital noise reflowed into a human body in the receiver and to raise reception performance by amplifying, with a high gain, a very small transmission signal transmitted through the human body causing a very high loss.

Abstract: A battery management system for a high-voltage battery that has a switching device with controllable switching elements for establishing and disconnecting an electrical connection between the poles of the high-voltage battery and the connection points for a consumer network, and a device for insulation monitoring. The poles and connection points are each switched to a reference potential for insulation measurement via a voltage divider. The battery management system may have a device for checking the switching status of the controllable switching elements by means of measuring devices for determining the electrical voltage. The measuring devices are arranged so that they measure the voltage between the output of the respective voltage divider and the reference potential. The device for checking the switching status of the controllable switching elements has a device for comparing the measured voltage values of the two measuring devices.

Abstract: A monitor circuit includes a reference voltage generating unit that generates first and second reference voltages, a first amplifier unit that amplifies a differential voltage between the first reference voltage and the second reference voltage, a second amplifier unit that amplifies a differential voltage between an internal power supply voltage being supplied to a functional block provided in the semiconductor integrated circuit and the first reference voltage, and a comparator unit that compares an amplification result of the first amplifier unit with an amplification result of the second amplifier unit and outputs a comparison result as a measurement result.

Abstract: A load device is coupled to an electronic device. The load device include a load, an input interface, an output interface, a detecting module, and a switch module. The detecting module can determine if a parameter of an input power from the input interface is greater than a predefined parameter. The switch module is connected to the input interface, the load and the output interface. The switch module being configured to switch off the input power to the load and the output interface when the parameter of the input power from the electronic device is not greater than the predefined parameter.

Abstract: A circuit including a first switch receiving an input reference voltage, a second switch receiving an input testing voltage, the first switch and the second switch are electrically connected in parallel. The circuit further includes a first capacitor electrically connected in series with the first switch and the second switch. The circuit further includes a feedback stage comprising a feedback inverter electrically connected in parallel with a feedback switch, where the feedback stage is electrically connected in series with the first capacitor. The circuit further includes a first inverter electrically connected in series to the feedback stage, and a third switch electrically connected in series with the first inverter. The circuit further includes a second inverter electrically connected in parallel to a third inverter, the second inverter and the third inverter are electrically connected in series to the third switch, and the third inverter outputs a first output signal.

Abstract: Embodiments relate to fault detection comparator circuitry and methods that can operate in conjunction with a power-on-reset (POR) scheme to put a chip into a reliable power-down mode upon fault detection to avoid disrupting the communication bus link such that other connected chips and the host can continue to operate. Power-on of the affected chip can then be carried out when the connection with that chip is restored.

Abstract: A system including control logic, a voltage reference, a sense amplifier, and a voltage supply circuit is presented. The sense amplifier may be configured to detect a current state of the voltage supply circuit output compared to the reference voltage. The voltage supply circuit may be configured to capture and preserve the current state to be used as a previous state. The voltage regulator may be configured to compare the current state to one or more previous states and adjust the voltage regulator output based on the comparison. Control logic may be configured to enable the voltage reference output in response to a signal. Control logic may be configured to enable the sense amplifier at a time after the voltage reference is stable. Control logic may be configured to disable the voltage reference output in response to the sense amplifier generating an output.

Abstract: A high-swing voltage mode driver is provided that is operably coupled to a Serializer/Deserializer (SerDes) chip. The high-swing voltage mode driver can operate at a speed of 16 gigabits per second. The high-swing voltage mode driver comprises a thirteenth transistor that is configured to stabilize a voltage at a fifth node, where an output signal that is a negative differential signal exists. The high-swing voltage mode driver comprises a sixteenth transistor that is configured to stabilize a voltage at a sixth node, where an output signal that is a positive differential signal exists.

Abstract: Circuitry for generating a compliance voltage (V+) for the current sources and/or sinks in an implantable stimulator device in disclosed. The circuitry assesses whether V+ is optimal for a given pulse, and if not, adjusts V+ for the next pulse. The circuitry uses amplifiers to measure the voltage drop across active PDACs (current sources) and NDAC (current sinks) at an appropriate time during the pulse. The measured voltages are assessed to determine whether they are high or low relative to optimal values. If low, a V+ regulator is controlled to increase V+ for the next pulse; if not, the V+ regulator is controlled to decrease V+ for the next pulse. Through this approach, gradual changes that may be occurring in the implant environment can be accounted for, with V+ adjusted on a pulse-by-pulse basis to keep the voltage drops at or near optimal levels for efficient DAC operation.

Abstract: Methods, devices, and systems that may help improve the dynamic range of a signal receiver. The method includes (i) causing a signal emitter to emit a signal during a first period of time; (ii) receiving, at the signal receiver, a reflected signal during a second period of time, where the received reflected signal corresponds to the emitted signal, and where the second period of time begins after a beginning of the first period of time; and (iii) increasing a signal gain that is applied to the received reflected signal during a third period of time, where the third period of time begins not earlier than a beginning of the second period of time.

Abstract: An in-situ unplug detector circuit detects when a cable is disconnected or unplugged. Detection does not have to wait for normal signaling to pause, such at the end of a frame or timeout. Instead, detection occurs during normal signaling. When the cable is disconnected, the transmitter no longer drives the load at the far end of the cable, and thus can drive the near end to a higher high voltage and to a lower low voltage. The increased voltage swing is detected by a detector at the near end that amplifies the transmitter output to the cable. A fast detector has a higher bandwidth and faster response time than a slow detector, and generates a fast detect signal that crosses over a slow detect signal. When the cable is disconnected, the fast detect signal again crosses over the slow detect signal, and decision logic activates an unplug signal.

Abstract: Some embodiments relate to a level detector, comprising a current mirror including first and second current legs to carry first and second signals, respectively. The first current leg includes a first variable resistor and the second current leg includes a second variable resistor. During a calibration mode, a switching element provides a predetermined reference voltage across first and second control terminals of the first and second variable resistors, respectively. During a non-calibration mode, the switching element decouples the predetermined reference voltage from the first and second control terminals, and provides a signal across the first and second control terminals. Other embodiments are also disclosed.

Abstract: An electronic device may have a housing in which components such as a display are mounted. A strain gauge may be mounted on a layer of the display such as a cover layer or may be mounted on a portion of the housing or other support structure. The layer of material on which the strain gauge is mounted may be configured to flex in response to pressure applied by a finger of a user. The strain gauge may serve as a button for the electronic device or may form part of other input circuitry. A differential amplifier and analog-to-digital converter circuit may be used to gather and process strain gauge signals. The strain gauge may be formed form variable resistor structures that make up part of a bridge circuit that is coupled to the differential amplifier. The bridge circuit may be configured to reduce the impact of capacitively coupled noise.

Abstract: A low-voltage, self-biased, high-speed comparator receives and compares an analog input signal to a reference signal and generates a binary output signal whose value indicates whether the input signal is greater than or less than the reference signal. The comparator includes a current mirror, a voltage divider for establishing a midpoint voltage for generating a current reference for the current mirror, and a compensation circuit for stabilizing the comparator by preventing oscillations.

Abstract: A circuit may sense the differential voltage across two nodes that each have a non-zero common mode voltage. The circuit may have a positive input impedance that is imposed across the nodes. An impedance compensation circuit may generate a compensation current that is delivered to the nodes that substantially cancels the loading effect of the positive input impedance. The impedance compensation circuit may generate a negative input impedance that is imposed across the two nodes that is substantially the same as the positive input impedance. The impedance compensation circuit may instead be configured to deliver the compensation current to the nodes.

Abstract: Provided is a measurement circuit that measures a signal under measurement input thereto, comprising a level comparing section that outputs a logic value according to a comparison result between a signal level of the signal under measurement and a set threshold level; a logic comparing section that acquires the logic value output by the level comparing section at a comparison timing input thereto; and a timing adjusting section that adjusts relative phases of a signal output by the level comparing section and the comparison timing, based on the expected value pattern of the signal under measurement and the threshold level.

Abstract: Embodiments of the present invention relate generally to detector circuits. Embodiments provide a low-power, accurate reference-free threshold detector. In particular, embodiments reduce leakage current at low input levels and prevent shoot through current for higher than nominal low input levels. Further, embodiments require no bandgap or accurate reference, and as a result eliminate the need for a constantly ON bandgap or accurate reference circuit. As such, embodiments have significantly reduced power consumption compared to conventional circuits. In addition, embodiments detect correctly low and high input levels that are separated narrowly and that may have wide ranges. Embodiments can be extended to any particular design choice of low and high input levels and corresponding output levels.

Abstract: A radio frequency (RF) receiver includes a digital tuning engine; I-path and Q-path analog filters, tuned by the digital tuning engine; and a digital compensation circuit. The digital tuning engine executes a RC (resistor-capacitor) time constant calibration to adjust respective cut-off frequencies of the I-path analog filter and the Q-path analog filter. The digital tuning engine executes a filter mismatch calibration to match the I-path analog filter and the Q-path analog filter. The digital tuning engine executes a filter residual mismatch calibration to match an I-path response from the I-path analog filter to the digital compensation circuit and a Q-path response from the Q-path analog filter to the digital compensation circuit.