Modulator-demodulator-type Amplifier Patents (Class 330/10)
  • Patent number: 9484874
    Abstract: An amplifier system is disclosed, configured to apply a signal component separator algorithm such that the first phase modulated signal and the second phase modulated signal are allowed to take on several continuous amplitude levels in order to achieve a maximum efficiency at each desired output signal power level, without restricting the input signal power fed to the power amplifiers to a constant level, wherein for each desired output signal power level, the digital signal component separator assigns an amplitude and phases of input signals that result in a maximum instantaneous power efficiency at the amplified output signal combined with an unmatched/non-isolating combiner (e.g. Chireix combiner).
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: November 1, 2016
    Assignee: Nokia Solutions and Networks Oy
    Inventors: Zeid Abou-Chahine, Tilman Felgentreff
  • Patent number: 9479127
    Abstract: A power amplification apparatus generates a code for controlling the number of class D power amplifiers that are in operation among a plurality of class D power amplifiers, changes the duty ratio of a carrier wave signal in accordance with output voltage, and amplifies a transmission signal. A code for decreasing the number of class D power amplifiers in operation is generated when the duty ratio of the carrier wave signal is increased, while a code for increasing the number of class D power amplifiers in operation is generated when the duty ratio of the carrier wave signal is decreased.
    Type: Grant
    Filed: February 19, 2015
    Date of Patent: October 25, 2016
    Assignee: PANASONIC CORPORATION
    Inventors: Masahiro Kumagawa, Hisashi Adachi
  • Patent number: 9479129
    Abstract: An audio amplifier is disclosed. The audio amplifier for driving an electroacoustic transducer includes an H bridge circuit including a 1D-class amplifier connected to a (+) electrode terminal and a 2D-class amplifier connected to a (?) electrode terminal of the electroacoustic transducer; a pulse width modulator configured to receive an audio signal, generate a first and second pulse signal for each driving the 1D-class and the 2D-class amplifier, and adjust a phase difference between the first and the second pulse signal; a first driver driving the 1D-class amplifier depending on the first pulse signal; a second driver driving the 2D-class amplifier depending on the second pulse signal; a level detector detecting a level of the audio signal; a phase adjuster configured to set a phase difference between the first pulse signal and the second pulse signal of the pulse width modulator based on a detection result from the level detector.
    Type: Grant
    Filed: May 5, 2015
    Date of Patent: October 25, 2016
    Assignee: ROHM CO., LTD.
    Inventor: Takeshi Onodera
  • Patent number: 9479118
    Abstract: Power supply circuitry, which includes a parallel amplifier and a parallel amplifier power supply, is disclosed. The power supply circuitry operates in either an average power tracking mode or an envelope tracking mode. The parallel amplifier power supply provides a parallel amplifier power supply signal. The parallel amplifier regulates an envelope power supply voltage based on an envelope power supply control signal using the parallel amplifier power supply signal, which provides power for amplification. During the envelope tracking mode, the envelope power supply voltage at least partially tracks an envelope of an RF transmit signal and the parallel amplifier power supply signal at least partially tracks the envelope power supply control signal. During the average power tracking mode, the envelope power supply voltage does not track the envelope of the RF transmit signal.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: October 25, 2016
    Assignee: RF Micro Devices, Inc.
    Inventors: Nadim Khlat, Baker Scott, Michael R. Kay
  • Patent number: 9475284
    Abstract: A liquid discharging apparatus includes a modulation portion that generates a modulation signal obtained by pulse-modulating a source signal; an amplifier that includes a first transistor and a second transistor operating based on the modulation signal; an operation control portion that controls operations of the amplifier; a low-pass filter that generates a driving signal by demodulating an amplification modulation signal generated based on operations of the first transistor and the second transistor; and a piezoelectric element that is displaced by applying the driving signal. The operation control portion performs a stopping process that stops an operation of the amplifier by allowing the first transistor to be in a non-conductive state in which a current does not flow through the first transistor and the second transistor to be in a conductive state in which the current flows through the second transistor.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: October 25, 2016
    Assignee: Seiko Epson Corporation
    Inventor: Takafumi Sano
  • Patent number: 9479202
    Abstract: Embodiments related to burst mode amplifying are described and depicted.
    Type: Grant
    Filed: February 19, 2008
    Date of Patent: October 25, 2016
    Assignee: Infineon Technologies AG
    Inventors: Koen Mertens, Thomas Poetscher
  • Patent number: 9473851
    Abstract: In one embodiment, a method for speaker operation comprises sensing an input common mode signal of a driver, wherein the driver drives a speaker, and adjusting the input common mode signal of the driver based on a difference between the sensed input common mode signal and a reference signal. The method also comprises sensing a current of a coil of the speaker, and control an output volume of the speaker based at least in part on the sensed current.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: October 18, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Sherif Galal, Xinwang Zhang
  • Patent number: 9473086
    Abstract: A voltage-switched class-S amplifier circuit includes an output stage configured to receive at least one control signal and operative to generate an output signal as a function of the at least one control signal. The amplifier circuit further includes a driver circuit coupled with the output stage. The driver circuit is configured to receive an input bit stream signal and is operative to generate the control signal as a function of the input bit stream signal in such a manner that a common mode component is eliminated from the control signal.
    Type: Grant
    Filed: January 18, 2013
    Date of Patent: October 18, 2016
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Donald R. Laturell, Said E. Abdelli, Peter Kiss, James F. MacDonald, Ross S. Wilson
  • Patent number: 9467510
    Abstract: A messaging model and node induction methods and corresponding devices and systems are disclosed herein that are effective to enable an inductor node to induct an inductee node into a distributed computing system and to enable the inducted node to carry out predetermined tasks.
    Type: Grant
    Filed: January 22, 2016
    Date of Patent: October 11, 2016
    Assignee: WANdisco, Inc.
    Inventors: Yeturu Aahlad, Michael Parkin, Naeem Akhtar
  • Patent number: 9461589
    Abstract: Disclosed is an amplifier circuit having an output stage that includes an H-bridge circuit. The H-bridge circuit includes sense resistors on one side of the circuit. A current detection circuit can produce an output indicative of current flow through a load based on voltages across the sense resistors.
    Type: Grant
    Filed: September 3, 2014
    Date of Patent: October 4, 2016
    Assignee: QUALCOMM INCORPORATED
    Inventors: Jingxue Lu, Ankit Srivastava, Haibo Fei
  • Patent number: 9455565
    Abstract: A protection circuit or electronic circuit breaker protects and supplies power to a device load. The protection circuit includes a current mirror, a reference load that models the device load, and a comparator circuit that outputs a signal indicating that a fault has been detected in the device load during turn on. The current mirror provides an amount of current in proportion to the current supplied to the device load. The same proportion is used to calculate the capacitance and resistance of the reference load. Accordingly, if the device load has no fault, the reference voltage remains proportional to the output voltage to the device load. However, if the device load has a fault, the reference voltage will increase faster than the output voltage such that the comparator will generate a fault signal that turns off a transistor pass element that was supplying current to the device load.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: September 27, 2016
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Jamaica L. Barnette, Raymond M. Clemo
  • Patent number: 9451561
    Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
    Type: Grant
    Filed: December 5, 2012
    Date of Patent: September 20, 2016
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kiichiro Takenaka, Takayuki Tsutsui, Taizo Yamawaki, Shun Imai
  • Patent number: 9450539
    Abstract: A parallel amplifier and an offset capacitance voltage control loop are disclosed. The parallel amplifier has a parallel amplifier output, which is coupled to an envelope tracking power supply output via an offset capacitive element. The offset capacitive element has an offset capacitive voltage. The offset capacitance voltage control loop regulates the offset capacitive voltage, which is adjustable on a communications slot-to-communications slot basis.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: September 20, 2016
    Assignee: RF Micro Devices, Inc.
    Inventors: Nadim Khlat, Michael R. Kay, Manbir Singh Nag
  • Patent number: 9448580
    Abstract: A clock signal generating method includes receiving a duty code that represents a duty of a clock signal, and a period code that represents a period of a clock signal, and normalizing the duty code to the period code to output a normalized duty code. The clock signal generating method further includes controlling a rising timing of a clock signal in response to the period code, and controlling a falling timing of the clock signal in response to the normalized duty code to generate a timing-controlled clock signal.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: September 20, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je Kook Kim, Sang Yong Park, Chan Woo Park, Young Hoon Lee, Byeong Ha Park
  • Patent number: 9444409
    Abstract: An amplification device includes at least two amplifiers. The amplification device further includes: a switching unit that switches an amplification mode to one of a first amplification mode and a second amplification mode based on power of a signal before or after amplification by the amplifiers; a separating unit that separates an input signal to two signals having a constant amplitude and different phases from each other when switched to the first amplification mode by the switching unit; a modulation unit that modulates an input signal into a signal having a constant amplitude when switched to the second amplification mode by the switching unit; an amplification unit that amplifies the two signals obtained by the separating unit or two signals obtained by the modulation unit by using the amplifiers; and a combining unit that combines the two signals amplified by the amplifiers.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: September 13, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Alexander Nikolaevich Lozhkin
  • Patent number: 9444407
    Abstract: Power supply circuitry, which includes a parallel amplifier and a parallel amplifier power supply, is disclosed. The power supply circuitry operates in either an average power tracking mode or an envelope tracking mode. The parallel amplifier power supply provides a parallel amplifier power supply signal. The parallel amplifier regulates an envelope power supply voltage based on an envelope power supply control signal using the parallel amplifier power supply signal, which provides power for amplification. During the envelope tracking mode, the envelope power supply voltage at least partially tracks an envelope of an RF transmit signal and the parallel amplifier power supply signal at least partially tracks the envelope power supply control signal. During the average power tracking mode, the envelope power supply voltage does not track the envelope of the RF transmit signal.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: September 13, 2016
    Assignee: RF Micro Devices, Inc.
    Inventors: Nadim Khlat, Baker Scott, Michael R. Kay
  • Patent number: 9444501
    Abstract: Radio frequency (RF) transmitters and methods of their operation are disclosed. An exemplary RF transmitter includes an RF power amplifier (RFPA), a dynamic power supply (DPS), and a baseband processing unit. The baseband processing unit generates an amplitude modulation (AM) signal that the DPS follows to generate a DPS voltage VDD(t). The DPS voltage VDD(t) serves as a power supply for an output stage of the RFPA. Under most operating conditions the output stage is configured to operate in a compressed mode (C-mode), but is reconfigured to operate in a product mode (or “P-mode) during times low-magnitude events in the AM signal are conveyed to the DPS and become present in the DPS voltage VDD(t) produced by the DPS. Operating the output stage in P-mode overcomes the inability of C-mode operation to reproduce low-magnitude events contained in the AM signal at the RF output of the RFPA.
    Type: Grant
    Filed: June 14, 2016
    Date of Patent: September 13, 2016
    Assignee: Eridan Communications, Inc.
    Inventors: Douglas A. Kirkpatrick, Earl W. McCune, Jr.
  • Patent number: 9445371
    Abstract: Apparatus and methods for wideband envelope tracking systems are disclosed herein. In certain implementations, an envelope tracker includes a DC-to-DC converter, a current digital-to-analog converter (DAC), an error amplifier, a feedback circuit, and an AC combiner. The current DAC receives a digital envelope signal, and uses the digital envelope signal to generate an envelope current. The feedback circuit is connected between an output and an inverting input of the error amplifier, and the envelope current is provided to the error amplifier's inverting input. Additionally, the AC combiner generates a power amplifier supply voltage by combining an output of the DC-to-DC converter and an output of the error amplifier.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: September 13, 2016
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Sabah Khesbak, Florinel G. Balteanu, Hardik Bhupendra Modi
  • Patent number: 9444439
    Abstract: A circuit for generating a series of pulses in response to a first signal, the circuit comprising: a lossy integrator which receives a second signal as its input; and a comparator which: receives the output of the lossy integrator at one of its inputs; and receives the first signal at the other of its inputs. This circuit can be incorporated into, for example, audio-frequency amplifiers and regulated power supplies.
    Type: Grant
    Filed: April 30, 2013
    Date of Patent: September 13, 2016
    Assignee: Indice Semiconductor Inc.
    Inventor: James Hamond
  • Patent number: 9438172
    Abstract: Digital envelope tracking with multilevel supply voltages is performed for wide-bandwidth signals. A digital control component generates a digital control code that facilitates switching of resistor values of one or more resistors coupled between a power amplifier and a supply voltage of plurality of supply voltages. A driver component supplies an envelope voltage of the plurality of supply voltages for the power amplifier as a function of the digital control code.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: September 6, 2016
    Assignee: Intel IP Corporation
    Inventor: Emanuel Cohen
  • Patent number: 9438182
    Abstract: A digital class D amplifier (10) is disclosed, comprising a pulse width modulator (PW Mod) comprising: a digital loop filter (Loop F) adapted to receive an input signal (x[n]) and a feedback signal (fb[n]), the digital loop filter (Loop_F) being adapted to process at a clock frequency (f_s) said input and feedback signals for providing as output a filtered digital signal (w[n]); a PWM conversion module (PW_CM) having an input (24) for receiving the filtered digital signal (w[n]) and having a first output (25) connected to the digital loop filter (Loop F), the PWM conversion module being adapted for processing the filtered digital signal (w[n]) and providing at said first output (25) the feedback signal (fb[n]).
    Type: Grant
    Filed: October 30, 2012
    Date of Patent: September 6, 2016
    Assignee: ST-Ericsson SA
    Inventors: Carlo Crippa, Rossella Bassoli
  • Patent number: 9431974
    Abstract: A switch mode power supply converter and a feedback delay compensation circuit are disclosed. The switch mode power supply converter has a switching voltage output and provides a switching voltage at the switching voltage output, such that a target voltage for a power amplifier supply voltage at a power amplifier supply output is based on the switching voltage. Further, the switching voltage is based on an early indication of a change of the target voltage. The feedback delay compensation circuit provides the early indication of the change of the target voltage.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: August 30, 2016
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Michael R. Kay, Philippe Gorisse
  • Patent number: 9431973
    Abstract: The present application relates to a pulse-width modulation generator for generating a pulse-width modulated signal, the PWM generator comprising: a PWM modulator; and a loop filter, wherein the loop filter is configured to receive an input signal and to output a filtered signal to the PWM modulator, and the PWM modulator is configured to receive the filtered signal from the loop filter and to output a pulse-width modulated signal, the PWM generator further comprising: a feedback loop coupling an output of the PWM modulator to an input of the loop filter, wherein the feedback loop includes a comb filter.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: August 30, 2016
    Assignee: QUALCOMM TECHNOLOGIES INTERNATIONAL, LTD.
    Inventor: David Chappaz
  • Patent number: 9432784
    Abstract: A method and an apparatus for estimating an interchannel delay of a sound signal are, related to the communication field and capable of realizing a stable sound field in a crosstalk. The method includes calculating an error between an actual interchannel phase difference and a predicted interchannel phase difference of a sound signal. The predicted interchannel phase difference is predicted according to a predetermined interchannel delay of the sound signal. The method also includes determining whether the sound signal is a sound signal in a crosstalk according to the error. The method further includes, if the sound signal is a sound signal in the crosstalk, setting an interchannel delay corresponding to the sound signal to a fixed value. The apparatus is configured to perform the method.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: August 30, 2016
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Wenhai Wu, Lei Miao, Yue Lang, Zexin Liu
  • Patent number: 9425755
    Abstract: A differential class-D amplifier module having common-mode swing limiter circuit is disclosed. The differential class-D amplifier module may include differential class-D amplifier configured to generate differential pulse width modulated (PWM) output signals based on differential input signals and at least a portion of the differential PWM output signals that are fed back to the differential class-D amplifier. The common-mode swing limiter circuit may attenuate one or more common-mode signal components associated with the PWM output signals that may be fed back to input terminals of the differential class-D amplifier.
    Type: Grant
    Filed: July 29, 2015
    Date of Patent: August 23, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Jingxue Lu, Chenling Huang
  • Patent number: 9419572
    Abstract: The present invention discloses an audio device having haptic compensation function capable of compensating a haptic effect according to a power measuring result and an audio signal. An embodiment of the audio device comprises: an audio signal generating circuit operable to generate an audio signal; a power measuring circuit operable to measure a remaining electric quantity of a power source and thereby generate a power measuring result; and a haptic compensating circuit, coupled to the audio signal generating circuit and the power measuring circuit, operable to adjust a gain of the audio signal or the derived signal thereof according to the power measuring result and thereby output a haptic compensation signal which is used to compensate the haptic effect.
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: August 16, 2016
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Sheng-Nan Chiu, Chih-Jung Yu, Cheng-Pin Chang
  • Patent number: 9413312
    Abstract: Presented are circuits and methods for providing real-time short-circuit detection, capable of detecting a short-circuit prior to occurrence of an over-limit current event. Such a circuit can be used to provide real-time short-circuit detection for a switched-mode system for a switched-mode system having a pre-driver and a power stage, and includes a reference block for generating a reference voltage according to drive signals provided by the pre-driver, and a comparator, which may be a synchronized comparator. The comparator is configured to compare the reference voltage to a switching node voltage generated in a power stage of the switched-mode system, and to produce an output enabling detection of the short-circuit in the switched-mode system.
    Type: Grant
    Filed: November 23, 2011
    Date of Patent: August 9, 2016
    Assignee: BROADCOM CORPORATION
    Inventors: Xicheng Jiang, Jianlong Chen, Sasi Kumar Arunachalam
  • Patent number: 9413296
    Abstract: An apparatus includes a first amplifier that includes a transistor that is coupled to an input terminal of the first amplifier. The transistor is biased to operate in a first mode based on a first operating point. The apparatus also includes a second amplifier coupled in parallel with the first amplifier. The second amplifier includes a second transistor coupled to an input terminal of the second amplifier. The second transistor is biased to operate in a second mode based on a second operating point that is temperature-dependent.
    Type: Grant
    Filed: May 9, 2014
    Date of Patent: August 9, 2016
    Assignee: Qualcomm Incorporated
    Inventor: Chao Lu
  • Patent number: 9411045
    Abstract: A gain control circuit includes: a voltage generation circuit that generates first voltage that is linearly changed over time; a voltage square circuit that outputs second voltage that is obtained by squaring the first voltage generated by the voltage generation circuit; a resistance circuit that has a resistance characteristic by which a resistance value is squared-changed over time depending on the second voltage output from the voltage square circuit; and a gain adjustment circuit in which gain is squared-changed over time depending on the resistance value of the resistance circuit.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: August 9, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Masato Yoshioka
  • Patent number: 9413352
    Abstract: The disclosure describes a method for controlling a voltage that is applied to a voltage controlled circuit element. In one example, the method includes controlling, by a semiconductor light source, a resistance value of a photoresistor coupled to a voltage controlled circuit element. The method includes applying, by a gate driver and via the photoresistor, a voltage to the voltage controlled circuit element. The method further includes controlling the voltage applied to the voltage controlled circuit element in order to control a current through the voltage controlled circuit element. In some examples, controlling the voltage applied to the voltage controlled circuit element may be accomplished by controlling the resistance value of the photoresistor in order to control a voltage drop across the photoresistor. Circuits that implement the method are also described.
    Type: Grant
    Filed: November 4, 2014
    Date of Patent: August 9, 2016
    Assignee: Infineon Technologies Austria AG
    Inventor: Hock Poh Lim
  • Patent number: 9407209
    Abstract: The present disclosure relates to a circuit that includes an input port for applying a sinusoidal input signal, and a first buffering means for converting the sinusoidal input signal into a square wave signal. A DC level of the square wave signal may be defined by an adjustable threshold voltage level. The circuit also includes an output port for outputting the square wave signal to a power amplifier. Further, the circuit includes a feedback loop having a low pass filtering means arranged for filtering the square wave signal and comparing means arranged for comparing a DC level of a filtered signal received from the low pass filtering means with a pre-set reference level. The reference level may be selected for cancelling a given harmonic component. The comparing means is further arranged for outputting to the first buffering means a correction signal for adjusting the threshold voltage level of the first buffering means.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: August 2, 2016
    Assignee: Stichting IMEC Nederland
    Inventor: Ao Ba
  • Patent number: 9401678
    Abstract: A switch mode power supply converter, a parallel amplifier, and a parallel amplifier output impedance compensation circuit are disclosed. The switch mode power supply converter provides a switching voltage and generates an estimated switching voltage output, which is indicative of the switching voltage. The parallel amplifier generates a power amplifier supply voltage at a power amplifier supply output based on a combination of a VRAMP signal and a high frequency ripple compensation signal. The parallel amplifier output impedance compensation circuit provides the high frequency ripple compensation signal based on a difference between the VRAMP signal and the estimated switching voltage output.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: July 26, 2016
    Assignee: RF Micro Devices, Inc.
    Inventors: Michael R. Kay, Nadim Khlat
  • Patent number: 9400726
    Abstract: A method of monitoring power usage includes 1) accessing power usage data for power distribution unit infeeds of a plurality of power distribution units; 2) accessing stored circuit descriptions describing interconnections of the power distribution unit infeeds to a number of power feed circuits; 3) transforming the plurality of power distribution units into a power usage monitor for monitoring power usage of the power feed circuits by aggregating at least some of the power usage data based on the interconnections of the power distribution unit infeeds to the number of power feed circuits; and 4) outputting representations of the aggregated power usage data.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: July 26, 2016
    Assignee: Server Technology, Inc.
    Inventors: Calvin Nicholson, Michael Gordon
  • Patent number: 9397648
    Abstract: A first charge module includes a first resistor and a first capacitor. A second charge module includes a second resistor and a second capacitor. A voltage comparison module includes a comparator connected to compare voltages present on the first and second capacitors. The comparator is connected to output a signal having a first state when the voltage on the first capacitor is less than the voltage on the second capacitor, and output a signal having a second state opposite of the first state when the voltage on the first capacitor is greater than the voltage on the second capacitor. A control module is configured to receive a PWM signal as an input signal and generate control signals based on the received PWM signal for controlling charging and discharging of the first and second capacitors. The output of the comparator is a decoded version of the PWM signal.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: July 19, 2016
    Assignee: SanDisk Technologies LLC
    Inventors: Tomer Elran, Alexander Tetelbaum
  • Patent number: 9385666
    Abstract: A system including an amplifier circuit configured to amplify an input and generate an output, a bias circuit configured to bias the amplifier circuit, and a feedback circuit configured to generate feedback based on the input and the output, and to adjust the bias of the amplifier circuit based on the feedback to reduce amplitude nonlinearity in the output. A digital pre-distortion circuit is configured to reduce phase nonlinearity in the output.
    Type: Grant
    Filed: December 3, 2014
    Date of Patent: July 5, 2016
    Assignee: Marvell World Trade LTD.
    Inventors: Sai-Wang Tam, Alden Chee Ho Wong, Yuan Lu, David M. Signoff, Li Lin
  • Patent number: 9379670
    Abstract: A parallel amplifier and an offset capacitance voltage control loop are disclosed. The parallel amplifier has a parallel amplifier output, which is coupled to an envelope tracking power supply output via an offset capacitive element. The offset capacitive element has an offset capacitive voltage. The offset capacitance voltage control loop regulates the offset capacitive voltage, which is adjustable on a communications slot-to-communications slot basis.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: June 28, 2016
    Assignee: RF Micro Devices, Inc.
    Inventors: Nadim Khlat, Michael R. Kay, Manbir Singh Nag
  • Patent number: 9379667
    Abstract: A switch mode power supply converter and a parallel amplifier are disclosed. The switch mode power supply converter is coupled to a modulated power supply output and the parallel amplifier has a parallel amplifier output coupled to the modulated power supply output. Further, the parallel amplifier has a group of output stages, such that each output stage is directly coupled to the parallel amplifier output and each output stage receives a separate supply voltage.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: June 28, 2016
    Assignee: RF Micro Devices, Inc.
    Inventors: Nadim Khlat, Michael R. Kay, Philippe Gorisse
  • Patent number: 9362963
    Abstract: A radio-frequency signal reception circuit that detects an input signal includes an input reference terminal, a first input terminal into which a first input signal is input, a second input terminal into which a second input signal is input, an output terminal and output reference terminal from which an output signal is output, a first detector circuit that detects the first input signal and outputs a first output signal, which is a positive-voltage pulse signal, to the output terminal, a second detector circuit that detects the second input signal and outputs a second output signal, which is a positive-voltage pulse signal, to the output reference terminal, and a transistor connected to the input reference terminal and output reference terminal. The input signal includes the first input signal and second input signal. The output signal includes the first output signal and second output signal.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: June 7, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Shuichi Nagai, Yasufumi Kawai
  • Patent number: 9362888
    Abstract: A signal converter directly converts pulse-density-modulated (PDM) signals into pulse-width-modulated (PWM) signals. A noise-shaping loop architecture can be configured to apply a signal transfer function having a low-pass filter effect, and a noise transfer function having a high-pass filter effect. Decimation and interpolation can ensure that the noise-shaping loop architecture operates at a first sampling frequency, while the PWM modulator operates at a second, higher sampling frequency.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: June 7, 2016
    Assignee: QUALCOMM TECHNOLOGIES INTERNATIONAL, LTD.
    Inventor: David Chappaz
  • Patent number: 9352557
    Abstract: A liquid discharge apparatus includes: an modulation circuit that generates a modulated signal by pulse-modulating a source signal through self-oscillation; a transistor that amplifies the modulated signal to generate an amplified modulated signal; a low-pass filter that includes an inductor and a capacitor and smoothes the amplified modulated signal to generate a drive signal; a feedback circuit that allows the drive signal to return to the modulation circuit; a piezoelectric element that is displaced by application of the drive signal thereto; a cavity that is filled with a liquid inside and has an internal volume which changes when the piezoelectric element is displaced; and a nozzle that is provided to discharge the liquid inside the cavity in response to the change of the internal volume of the cavity. In this configuration, a self-resonant frequency of the capacitor is higher than a frequency of the self-oscillation.
    Type: Grant
    Filed: August 5, 2015
    Date of Patent: May 31, 2016
    Assignee: Seiko Epson Corporation
    Inventors: Tetsuo Takagi, Hidekazu Uematsu
  • Patent number: 9356566
    Abstract: An audio amplifier comprising an input block, a plurality of switches, an output filter, a current monitor and a proxy signal generator is provided. The input block is configured to receive an input signal and to provide a modulated signal. The plurality of switches is configured to generate an audio unfiltered signal including an undesired switching frequency component in response to the modulated signal. The output filter includes a coil and is configured to filter the undesired switching frequency from the audio unfiltered signal. The current monitor is configured to transmit a measurement output including a first operating frequency. The proxy signal generator is configured to provide a proxy signal including a second operating frequency. The input block is further configured to receive the first operating frequency and the second operating frequency to operate in accordance to the first operating frequency and the second operating frequency.
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: May 31, 2016
    Assignee: Harman International Industries, Inc.
    Inventor: James R. Wordinger
  • Patent number: 9350302
    Abstract: An envelope tracking power amplifier system comprising an RF input path and an envelope path for providing a modulated power amplifier supply, further comprising a plurality of envelope detectors for detecting the envelope of a plurality of frequency bands of an input signal and each generating an output signal, and a combiner for combining the output of the envelope detectors.
    Type: Grant
    Filed: October 21, 2014
    Date of Patent: May 24, 2016
    Assignee: SNAPTRACK, INC.
    Inventor: Gerard Wimpenny
  • Patent number: 9344046
    Abstract: Methods, systems, and apparatuses for detecting and suppressing analog error in an output stage of a digital class-D amplifier are described. In embodiments, the digital class-D amplifier includes a PWM stage, an output stage, and a feedback circuit. The PWM stage receives the signal difference between an input digital signal and a feedback digital signal, generates a digital pulse-width modulated (PWM) signal based thereon, and provides the digital PWM signal as a first component of the digital feedback signal. The output stage receives the digital PWM signal and generates an analog output signal for driving a load responsive to the digital PWM signal. The feedback circuit combines an analog representation of the PWM signal and the analog output signal to generate a second component of the digital feedback signal.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: May 17, 2016
    Assignee: Broadcom Corporation
    Inventors: Zhengyu Wang, Iuri Mehr, Jungwoo Song, Xicheng Jiang
  • Patent number: 9337788
    Abstract: There is disclosed a power supply stage, and a corresponding method, comprising: a plurality of amplifiers for amplifying an input signal, each amplifier receiving a power supply voltage; a common selection means for selecting one of a plurality of power supply voltages in dependence on a reference signal representing a desired power supply voltage; and a plurality of adjusting means, corresponding to the plurality of amplifiers, adapted to generate an adjusted selected power supply voltage for a respective amplifier tracking the reference signal in dependence on the one selected power supply voltage and the reference signal.
    Type: Grant
    Filed: April 3, 2013
    Date of Patent: May 10, 2016
    Assignee: SnapTrack, Inc.
    Inventor: Gerard Wimpenny
  • Patent number: 9330624
    Abstract: Electronic devices with a VCOM display panel are configured to provide a common voltage VCOM to a VCOM display panel backplane, referred to as a VCOM reference plane. The common voltage is supplied by a VCOM application circuit coupled to the VCOM reference plane. The VCOM application circuit includes a VCOM amplifier having a closed-loop gain. The VCOM application circuit is configurable to quickly adjust the closed-loop gain so as to adjust the settling characteristics of the common voltage VCOM output by the VCOM application circuit. The VCOM application circuit having adjustable closed-loop gain also reduces the amount of power to be dissipated, and therefore the amount of heat generation, in the VCOM amplifier.
    Type: Grant
    Filed: February 24, 2012
    Date of Patent: May 3, 2016
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Cheng-Wei Pei, Ronald Bonshaw Koo
  • Patent number: 9325283
    Abstract: An exemplary embodiment of the present disclosure illustrates a modulation method for a switching modulator. Firstly, a data signal is received. Then, a first output signal at a first output side of the switching modulator and a second output signal at a second output side of the switching modulator are generated according to the data signal received, wherein the first output signal is an addition signal of a first pulse signal and the data signal, the second output signal is a second pulse signal, the first pulse signal and the second pulse signal are aligned to a same pulse width, and the pulse width equals to a minimum resolution of the switching modulator.
    Type: Grant
    Filed: September 16, 2014
    Date of Patent: April 26, 2016
    Assignee: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
    Inventor: Hsin-Yuan Chiu
  • Patent number: 9319011
    Abstract: A Class-D amplifier includes an analog-to-digital converter (ADC), a digital filter, a digital pulse width modulation (PWM) unit, a pre-driver unit, and an output driver. The ADC is configured to receive an input signal and one or more feedback signals, and to generate a first digital signal. The digital filter, the digital PWM unit, and the pre-driver unit are configured to generate control signals based on the first digital signal. The output driver is configured to generate an output signal based on the control signals. A first feedback path is defined as from a first output node of the output driver to a first input node of the ADC; and a second feedback path is defined as from a second output node of the output driver to a second input node of the ADC. The first and second feedback paths are free from a low-pass filtering device.
    Type: Grant
    Filed: June 10, 2014
    Date of Patent: April 19, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Martin Kinyua, Eric Soenen
  • Patent number: 9319008
    Abstract: A circuit includes a first input terminal for receiving a first pulsed voltage and a second input terminal for receiving a second pulsed voltage. The circuit further includes a load and an LC filter. The LC filter includes a coupled inductor pair that includes a first winding and a second winding magnetically coupled to each other. The first winding is coupled between the first input terminal and the load, and the second winding is coupled between the second input terminal and the load. A frequency of a first current flowing through the first winding is increased by the second pulsed voltage applied to the second winding.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: April 19, 2016
    Assignee: Versatile Power, Inc.
    Inventors: Alexandr Ikriannikov, David Hoffman, Noah A. Wilson
  • Patent number: 9319000
    Abstract: A method and apparatus for managing a multi-port amplifier. In one illustrative embodiment, an apparatus comprises the multi-port amplifier and a controller. The multi-port amplifier is configured to amplify a plurality of signals to form a plurality of amplified signals. The controller is configured to send a plurality of control adjustments to a plurality of equalizers in the multi-port amplifier to improve leakage performance of the multi-port amplifier.
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: April 19, 2016
    Assignee: THE BOEING COMPANY
    Inventor: Michael A. Whelan
  • Patent number: 9319247
    Abstract: An isolation coupler comprises a frequency splitter (36) for splitting an input signal (1) into a low frequency partial signal (2) and a high frequency partial signal (4) and a first isolating transformer (33) for transforming a signal derived from the high frequency partial signal (4) in a transformed high frequency partial signal (5). Moreover it may include a modulator (21) for modulating the low frequency partial signal (2) with a modulation signal (6) resulting in a modulated low frequency partial signal (7) and a second isolating transformer (34) for transforming a signal derived from the modulated low frequency partial signal (7) in a transformed low frequency partial signal (8).
    Type: Grant
    Filed: October 17, 2012
    Date of Patent: April 19, 2016
    Assignee: ROHDE & SCHWARZ GMBH & CO. KG
    Inventors: Nenad Stojaković, Reiner Franke