Modulator-demodulator-type Amplifier Patents (Class 330/10)
  • Patent number: 9312859
    Abstract: A switching circuit that switches voltage at an output node includes a first switch element configured to enable supplying a first voltage from a first supply node to the output node, a second switch element configured to enable supplying a second voltage from a second supply node to the output node, and a controller. The controller switches the first and the second switch element between a first state and a second state depending on an input voltage. In the first state, the first switch element is in a conducting state and the second switch element is in a non-conducting state, and, in the second state the first switch element is in a non-conducting state and the second switch element is in a conducting state, the switching being performed through an intermediate state in which both the first and the second switch element are in the non-conducting state.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: April 12, 2016
    Assignee: ST-ERICSSON SA
    Inventor: Marcus Suhonen
  • Patent number: 9312823
    Abstract: A super-efficient single-stage switching power amplifier is realized by not incorporating a rectification process in its power conversion loop while incorporating a bidirectional active clamping circuit to not only remove or maximally reduce otherwise occurring disruptive ringing and spikes but also convert the energy otherwise associated with the ringing and spikes to return energy that goes back to the DC power supply.
    Type: Grant
    Filed: November 29, 2013
    Date of Patent: April 12, 2016
    Assignee: GuangDong Redx Electrical Technology Limited
    Inventor: Xue Jian Chen
  • Patent number: 9306516
    Abstract: A switching amplifier realizes bidirectional energy flow and combines switching and power amplification into one single stage so as to increase system efficiency. The modulator circuit of the amplifier receives and modulates an input signal, and generates and outputs modulated driver signals, which are used by the power driver circuit to generate signals to drive switching transformers of an amplifier circuit of the amplifier, and control signals, which are used to control an output generator circuit so as to allow individual inductors across the load by enabling current flowing through the load to have a path to ground. The amplifier circuit comprises switching transformers as well as circuitries configured to capture energy returned from the load and enable the captured energy to flow back to a power supply circuit of the amplifier through an energy flow-back circuit of the amplifier.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: April 5, 2016
    Assignee: GuangDong Redx Electrical Technology Limited
    Inventor: Xue Jian Chen
  • Patent number: 9306448
    Abstract: A signal amplifying circuit and associated methods and apparatuses, the circuit comprising: a signal path extending from an input terminal to an output terminal, a gain controller arranged to control the gain applied along the signal path in response to a control signal; an output stage within the signal path for generating the output signal, the output stage having a gain that is substantially independent of its supply voltage, and a variable voltage power supply comprising a charge pump for providing positive and negative output voltages, the charge pump comprising a network of switches that is operable in a number of different states and a controller for operating the switches in a sequence of the states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage.
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: April 5, 2016
    Assignee: Cirrus Logic International Semiconductor Ltd.
    Inventors: John P. Lesso, John L. Pennock, Peter J. Frith
  • Patent number: 9306731
    Abstract: According to an embodiment, a signal processing apparatus includes a first switch, a second switch, a corrector and a circuit. The first switch selects one signal from a first signal group including a first signal and a first constant envelope signal to obtain a first selected signal. The second switch selects one signal from a second signal group including a second signal and a second constant envelope signal to obtain a second selected signal. The corrector corrects a characteristic of at least one of the first and second selected signals to obtain a first corrected signal and a second corrected signal. The circuit generates an output signal from the first corrected signal and the second corrected signal.
    Type: Grant
    Filed: January 12, 2015
    Date of Patent: April 5, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Makoto Tanahashi, Yoshimasa Egashira, Atsushi Yamaoka, Keiichi Yamaguchi
  • Patent number: 9300252
    Abstract: A parallel amplifier and a parallel amplifier power supply are disclosed. The parallel amplifier power supply provides a parallel amplifier power supply signal, which is adjustable on a communications slot-to-communications slot basis. During envelope tracking, the parallel amplifier regulates an envelope power supply voltage based on the parallel amplifier power supply signal.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: March 29, 2016
    Assignee: RF Micro Devices, Inc.
    Inventors: Nadim Khlat, Michael R. Kay, Manbir Singh Nag
  • Patent number: 9294000
    Abstract: A circuit and method for providing a fully integrated differential boost converter and amplifier. A first half bridge circuit has a first output node and a first switching node. A second half bridge circuit has a second output node and a second switching node. A capacitive load is coupled between the first output node and the second output node. An inductor is coupled between the first switching node and the second switching node. Control modes are provided to couple the first output node to a supply voltage and the first switching node to ground; to couple the first output node to the supply voltage and the second switching node to ground; to couple the second output node to the supply voltage and the first switching node to ground; and to couple the second output node to the supply voltage and the second switching node to ground.
    Type: Grant
    Filed: September 12, 2014
    Date of Patent: March 22, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Adam Lee Shook
  • Patent number: 9294054
    Abstract: Apparatus and methods for envelope trackers are disclosed herein. In certain configurations, a mobile device includes a power amplifier configured to amplify a radio frequency (RF) input signal to generate an RF output signal. The power amplifier is configured to receive power from a power amplifier supply voltage. The mobile device further includes a voltage converter configured to convert a battery voltage into a regulated voltage, and the voltage converter is configured to control a magnitude of the regulated voltage based on an error signal. The mobile device further includes an error amplifier configured to generate an output current based on an envelope of the RF input signal and to generate the power amplifier supply voltage by adjusting the magnitude of the regulated voltage using the output current. The error amplifier is further configured to control the error signal.
    Type: Grant
    Filed: March 6, 2015
    Date of Patent: March 22, 2016
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Florinel G. Balteanu, David Steven Ripley, Sabah Khesbak, Jeffrey Gordon Strahler, Roman Zbigniew Arkiszewski, Yevgeniy A. Tkachenko
  • Patent number: 9288808
    Abstract: A method and apparatus for configuring a power sharing carrier set on a user equipment having multiple component carriers, the method receiving an indication from a network that carrier configuration information is supported in a cell of the network; providing at least one of capability information regarding carriers and bands supported by the user equipment and power sharing information the user equipment is capable of supporting; and obtaining configuration information for power sharing carrier sets. Furthermore, a network element for to providing a power sharing carrier set configuration, the network element configured to: send an indication from a network that carrier configuration information is supported in a cell of the network; receive at least one of capability information regarding carriers and bands supported by a user equipment and power sharing information the user equipment is capable of supporting; and provide configuration information for power sharing carrier sets.
    Type: Grant
    Filed: August 9, 2010
    Date of Patent: March 15, 2016
    Assignee: BlackBerry Limited
    Inventors: Youn Hyoung Heo, Mo-Han Fong, Sean McBeath, Zhijun Cai, Mark Earnshaw, Hua Xu
  • Patent number: 9281744
    Abstract: In accordance with an embodiment, a method of operating a charge pump includes providing a first programmable voltage to a plurality of clock generators having outputs coupled to first nodes of corresponding groups of charge pump capacitors, and selecting a second node of one capacitor from one of the corresponding groups of charge pump capacitors. The clock generators produce a plurality of clock signals having amplitudes proportional to the first programmable voltage.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: March 8, 2016
    Assignee: Infineon Technologies AG
    Inventor: Michael Kropfitsch
  • Patent number: 9276530
    Abstract: A class-D audio amplifier incorporates an overcurrent protection scheme implementing two overcurrent thresholds to avoid a dynamic impedance drop. When output current reaches the first threshold as a result of an impedance drop across the speaker, the overcurrent protection circuitry limits the output current to the value of the first threshold, but does not shut down the circuit. The second threshold is used to detect an overcurrent condition to shut down the circuit. Current limiting logic of a first channel monitors the overcurrent condition of a second channel and controls the first channel output in response thereto. This permits the second channel output current to reach the second threshold if the circuit is experiencing a short-circuit condition. This scheme also allows the output current to drop below the first threshold if the overcurrent condition of the second channel is caused by an impedance drop across the output speaker.
    Type: Grant
    Filed: September 16, 2014
    Date of Patent: March 1, 2016
    Assignee: STMicroelectronics (Shenzhen) R&D Co. Ltd
    Inventors: Qi Yu Liu, Ru Feng Du
  • Patent number: 9270504
    Abstract: A power encoder includes a pulse width modulator for modulating a signal according to a set of thresholds to produce a pulse width modulated (PWM) signal and a switch mode power amplifier for amplifying the PWM signal by switching states of switching devices according to amplitudes of the PWM signal. At least one or combination of a distribution of values of the voltage thresholds in the set and a distribution of values of a current generated by different switching devices are non-uniform. The set of voltage thresholds includes at least two positive voltage thresholds.
    Type: Grant
    Filed: July 28, 2014
    Date of Patent: February 23, 2016
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Toshiaki Koike-Akino, Qiuyao Zhu, Rui Ma, Koon Hoo Teo
  • Patent number: 9264024
    Abstract: An apparatus and a method of correcting output characteristics in a power combination apparatus are provided. The method includes synchronizing Digital UpConverters (DUCs) included in a plurality of power amplifiers, adjusting a fine delay between signals outputted by the DUCs based on a Frequency Assignment (FA), combining fine delay-compensated signals output from the plurality of power amplifiers, and outputting the combined signal.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: February 16, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwan-Ho Shin, Yong-Sik Im, Young-Ju Cho
  • Patent number: 9264000
    Abstract: An audio power amplifier includes a first and a second amplification unit, each including a switching voltage amplifier, an output filter, a current compensator, an inner current feedback loop feeding a measurement of current measured at the output inductor back to a summing input of the current compensator, a voltage compensator coupled to the summing input of the current compensator, and an outer voltage feedback loop. A controlled signal path provides the output of the voltage compensator of the first amplification unit to the current compensator of the second amplification unit. The first and second amplification units are operable with separate loads, in parallel driving a common load, or across a bridge-tied-load. A second pair of amplification units may be added and operated together with the first pair to drive a single speaker with a parallel pair of amplifiers on each side of a bridge-tied-load.
    Type: Grant
    Filed: October 16, 2014
    Date of Patent: February 16, 2016
    Assignee: Bose Corporation
    Inventors: Michael Nussbaum, Timothy Sheen, Daniel Scott Pearce
  • Patent number: 9263992
    Abstract: A method for operating an audio system having multiple Class D audio amplifiers is described. An external oscillatory signal is coupled to the amplifiers, such that the switching frequencies of both of the amplifiers align with (e.g., are directly set to) a frequency of the external signal. An input level associated with an audio signal that is being amplified is detected, and the detected input level is compared to a threshold. When the comparison indicates that the input level is below a lower threshold, the frequency of the external oscillatory signal is raised, and when the comparison indicates that the input level is above an upper threshold, the frequency of the external oscillatory signal is lowered. Other embodiments are also described and claimed.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: February 16, 2016
    Assignee: Apple Inc.
    Inventors: David C. Breece, III, Dirk Schmelzer, Nathan A. Johanningsmeier
  • Patent number: 9257951
    Abstract: An amplifier for amplifying a differential audio signal, having common-mode rejection and digital gain control, includes a current source (401) which supplies a constant level of current to a first current path (I1) and a second current path (I2), and input stage (403) which modulates the current in the current paths in response to a differential input signal, and an output stage (405) which produces an output signal by amplifying the difference in current between the current paths, a degree of feedback provided to the input stage by a feedback stage (402) that modulates the current in the current paths in response to the output signal, and the degree of modulation by the feedback stage is determined by the attenuation provided by at least one multiplying digital-to-analog converter (407) located therein.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: February 9, 2016
    Assignee: Red Lion 49 Limited
    Inventor: David Joseph Mate
  • Patent number: 9252748
    Abstract: A multi-stage passive capture adapter (PCA) circuit is configured to sense and recover digital signals present on a high-speed serial bus for capture and analysis in external test equipment. A first stage of the PCA circuit includes a differentiator that functions as a high impedance probe that contacts the serial bus to capture an original input signal waveform of the high-speed digital signals. The signal waveform is fed to a dual-slope comparator/driver that includes a plurality of high-speed comparators and drivers. The second stage includes a differential receiver/shaper that converts logic levels of differential receiver outputs to input signals that set and reset a signal restorer whose output signals are fed to a driver of a driver/shaper. The output of the driver is then fed to a shaper network configured to substantially match an output signal of driver/shaper to the input signal waveform sensed from the high-speed serial bus.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: February 2, 2016
    Assignee: MCCI Corporation
    Inventors: Terrill M. Moore, Roy F. Flacco
  • Patent number: 9246460
    Abstract: A power management system, which includes a parallel amplifier circuit and a switch mode power supply converter, is disclosed. The switch mode power supply converter cooperatively operates with the parallel amplifier circuit to form the power management system. The power management system operates in one of a high power modulation mode, a medium power modulation mode, and a low power average power tracking mode. Further, during the high power modulation mode and the medium power modulation mode, the power management system controls a power amplifier supply voltage to a radio frequency power amplifier to provide envelope tracking. During the low power average power tracking mode, the power management system controls the power amplifier supply voltage to the radio frequency power amplifier to provide average power tracking.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: January 26, 2016
    Assignee: RF Micro Devices, Inc.
    Inventors: Nadim Khlat, Michael R. Kay, Phillippe Gorisse, Christopher Truong Ngo
  • Patent number: 9246448
    Abstract: An amplification circuit includes a first power supply; a first bipolar transistor whose collector is connected to the first power supply; a first resistor one terminal of which is connected to an emitter of the first bipolar transistor; a second bipolar transistor whose collector is connected to the other terminal of the first resistor; a second power supply; a third bipolar transistor whose collector is connected to the second power supply; a second resistor one terminal of which is connected to an emitter of the third bipolar transistor; and a fourth bipolar transistor whose collector is connected to the other terminal of the second resistor. An emitter of the second bipolar transistor is directly connected to an emitter of the fourth bipolar transistor, thereby becoming an output terminal.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: January 26, 2016
    Assignee: SONY CORPORATION
    Inventor: Hideaki Shiobara
  • Patent number: 9239762
    Abstract: The virtualization of file system placeholders is described. In one embodiment, a method for virtualizing placeholders includes monitoring placeholder creation initiated by at least one archival operation, generating placeholder data in a separate data store from a file system, wherein the placeholder data comprises a plurality of placeholders that correspond with a plurality of archived files, and servicing access requests for at least one archived file of the plurality of archived files using the placeholder data.
    Type: Grant
    Filed: August 11, 2009
    Date of Patent: January 19, 2016
    Assignee: Symantec Corporation
    Inventors: Laxmikant Vithal Gunda, Pillai Biju Shanmugham
  • Patent number: 9240730
    Abstract: A power circuit of an AC power supply includes a power input unit connected to a AC/DC converter. The AC/DC converter is connected to a DC/DC circuit, and the DC/DC circuit is further connected to an adjustable DC voltage regulation circuit. The adjustable DC voltage regulation circuit is connected to an amplifier to amplify and convert the DC voltages into the AC voltages, thereby outputting different AC voltages and electric currents under the condition of not switching off the output when adjusting the voltage via cross position, so that a power level is switched promptly and a very low power distortion.
    Type: Grant
    Filed: June 11, 2015
    Date of Patent: January 19, 2016
    Assignee: CHYNG HONG ELECTRONIC CO., LTD.
    Inventor: Mu-Chun Lin
  • Patent number: 9240759
    Abstract: The invention relates to an amplifier assembly.
    Type: Grant
    Filed: June 12, 2013
    Date of Patent: January 19, 2016
    Assignee: RWTH AACHEN
    Inventors: Renato Negra, Ahmed Aref
  • Patent number: 9236838
    Abstract: An object of the present invention is to provide a power amplification device having high power efficiency for an input signal even in a power region in a large back-off. A power amplification device of the present invention includes a delta-sigma modulator which performs a multilevel delta sigma modulation on amplitude signals of input signals, a plurality of power amplifiers which amplify carrier signals, an encoder which generates a first control signal that controls ON/OFF of the outputs from said plurality of power amplifiers in accordance with the output from said delta-sigma modulator, and a combiner which combines at least two power output from said plurality of power amplifiers in accordance with said first control signal.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: January 12, 2016
    Assignee: NEC CORPORATION
    Inventor: Kazuaki Kunihiro
  • Patent number: 9231535
    Abstract: A Class-D amplifier includes a pre-amplifier having an input configured to receive an amplifier reference voltage signal which is ramped at start-up at a fast rate. An integrator has a first input configured to receive an input signal from the pre-amplifier and a second input configured to receive an integrator reference voltage signal which is ramped at start-up at a slower rate. A modulator has an input coupled to an output of the integrator. The modulator generates a pulse width modulated output signal. Operation of the Class-D amplifier is controlled at start-up by applying a slow ramped signal as the integrator reference voltage signal and a fast ramped signal as the amplifier reference voltage so that the pulse width modulated output signal exhibits an increasing change in duty cycle in response to an increasing voltage of the integrator reference voltage signal, and no “pop” is introduced at start-up.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: January 5, 2016
    Assignee: STMicroelectronics (Shenzhen) R&D Co. Ltd
    Inventors: Ru Feng Du, Qi Yu Liu
  • Patent number: 9225301
    Abstract: An audio amplifier apparatus includes an audio amplifier which receives a single audio signal and produces a plus phase audio signal and a minus phase audio signal, both dependent upon the single audio signal. The plus phase audio signal and minus phase audio signal are received by first and second inputs of a speaker, respectively. A current sensing circuit senses a level of current received by the first or second inputs of the speaker and outputs a current sensing signal dependent upon the sensed level of current. An amplifying circuit receives and amplifies the current sensing signal. A mixer circuit receives the amplified current sensing signal and an audio drive signal and produces the single audio signal dependent upon the amplified current sensing signal and the audio drive signal. The single audio signal is produced at a node in-between two resistors.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: December 29, 2015
    Assignee: Panasonic Automotive Systems Company of America, Division of Panasonic Corporation of North America
    Inventor: Richard Fay
  • Patent number: 9225559
    Abstract: A receiver and a method to process signals from one or more transmission sources. The receives includes a front-end having: an input coupling path to route an analog input signal received from one or more transmission sources; an equalizer to generate an equalized signal from the analog input signal; and an ADC to generate a digitized signal from the equalized signal. The method includes routing the analog input signal through an input coupling path; equalizing the analog input signal to generate an equalized signal therefrom; and digitizing the equalized signal to generate a digitized signal therefrom.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: December 29, 2015
    Assignee: INTEL CORPORATION
    Inventors: Nicholas Cowley, Isaac Ali
  • Patent number: 9203359
    Abstract: Because of input of a digital signal, PWM-input, separately excited, class-D amplifier systems are less prone to be affected by noise than in the conventional case that an analog signal is input. Since a ramp wave that is synchronized with a PWM signal is used as a comparison clock, no beats occur between a PWM clock and a reference clock, making is possible to provide a class-D amplifier system which exhibits a large S/N ratio. Furthermore, the fact that an external clock can be varied provides another advantage that no beat noise occurs even in a set that is disposed close to a radio receiver.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: December 1, 2015
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Tsuyoshi Haga, Seigo Ozaki
  • Patent number: 9197172
    Abstract: A switched mode, high linearity power amplifier can include a dynamic quantizer, a pulse width modulator and an output driver. In one embodiment, the dynamic quantizer can include a sigma-delta modulator configured to provide a multi-level digital signal. The pulse width modulator can receive the multi-level digital signal and provide a variable pulse width signal based, at least in part, on the multi-level digital signal. The output driver can include a class D output driver. The output driver can receive the variable pulse width signal to operate the class D output driver and provide an amplified signal. In one embodiment, the output driver can adjust the amplified signal to compensate for output errors.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: November 24, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Niranjan Anand Talwalkar, Sanjay Kasturia
  • Patent number: 9197163
    Abstract: Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.
    Type: Grant
    Filed: August 13, 2013
    Date of Patent: November 24, 2015
    Assignee: ParkVision, Inc.
    Inventors: David F. Sorrells, Gregory S. Rawlins, Michael W. Rawlins
  • Patent number: 9190967
    Abstract: Apparatus and method embodiments are provided for improving power efficiency in an outphasing amplifier with a non-isolating combiner. The embodiments include reducing the driving power to two power amplifiers (PAs) of the amplifier circuit in the low input signal power region in an asymmetric manner between the two PAs. An embodiment method includes receiving, at a signal decomposer, an input signal, detecting a power amplitude of the input signal, and determining whether the input signal corresponds to one of a plurality of operation modes according to the detected power amplitude of the input signal and a plurality of power thresholds corresponding to the operation modes. Upon determining that the power amplitude of the input signal corresponds to a first mode from the operation modes, the input signal is decomposed into two component signals including at least one signal that has a reduced and scaled amplitude proportional to the input signal.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: November 17, 2015
    Assignee: Futurewei Technologies Inc.
    Inventors: Zhengxiang Ma, Ruikang Yang, Munawar Kermalli
  • Patent number: 9182617
    Abstract: A driver with the arrangement of the travelling wave amplifier is disclosed. The driver provides n counts of cells each configuring the open collector arrangement and amplifying an input signal. The cells are arranged between an input interconnection and an output interconnection, and powered through the output interconnection. The power supply line to power the output interconnection is connected between m-th and (m+1)-th cells not through the output terminal of the output interconnection.
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: November 10, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Taizo Tatsumi, Sosaku Sawada
  • Patent number: 9184708
    Abstract: An audio signal processing apparatus and method are provided. The apparatus includes a stability determiner and a sigma-delta modulator. The stability determiner divides a frequency band of an input audio signal into one or more sub-frequency bands, compares a level of the input audio signal for each of the sub-frequency bands with a threshold for the sub-frequency band, and generates a stability determination signal according to a result of the comparison. The sigma-delta modulator sigma-delta modulates the input audio signal according to the stability determination signal, and outputs a modulation signal.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: November 10, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung-min Choi, Jae-yong Cho
  • Patent number: 9178530
    Abstract: A delta sigma modulator includes a filter circuit including an integrator having an operational amplifier; a first addition circuit provided between an output section of the filter circuit and an input section of a quantizer, and including a first resistive element; and a second addition circuit including at least one of a first feedforward circuit including a second resistive element or a first feedback circuit configured to feed back, as an analog signal, a digital output signal having been quantized by the quantizer, to an input section of the quantizer, wherein at least one of the first addition circuit or the first feedback circuit includes a phase compensator.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: November 3, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yosuke Mitani, Kazuo Matsukawa, Koji Obata, Shiro Dosho
  • Patent number: 9166573
    Abstract: According to an aspect of the present invention, in a semiconductor device, a plurality of commands for specifying a circuit configuration of an analog front-end unit are transmitted from a processing unit to the analog front-end unit, an analysis is performed on the plurality of commands received by the analog front-end unit, and when a circuit configuration of the analog front-end unit which is to be updated and is determined according to the plurality of commands includes a forbidden condition that has been previously set, updating processing of the circuit configuration according to the plurality of commands is stopped.
    Type: Grant
    Filed: January 3, 2014
    Date of Patent: October 20, 2015
    Assignee: Renesas Electronics Corporation
    Inventor: Yutaka Yoshizawa
  • Patent number: 9160287
    Abstract: Circuits and methods for achieving high linearity, high efficiency power amplifiers, including digital predistortion (DPD) and pulse cancellation in switched-state RF power amplifier systems are described.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: October 13, 2015
    Assignee: Eta Devices, Inc.
    Inventors: Mark A. Briffa, Joel L. Dawson, John E. DeRoo, Krenar Komoni, David J. Perreault, Oguzhan Uyar
  • Patent number: 9148078
    Abstract: A switch driving circuit has: a switch signal generator adapted to generate switch signals to complementarily turn on and off switches connected in parallel between a node to which an input voltage is applied and a node to which a ground voltage is applied; drivers adapted to generate gate signals in response to the switch signals; and a dead time setter adapted to set dead times during which the switches are both kept off. At least one of the drivers includes a slew rate setter adapted to vary the slew rate of the gate signals according to a slew rate setting signal. The dead time setter controls to vary at least one of the dead times according to at least one of the slew rate setting signal and the input voltage.
    Type: Grant
    Filed: November 14, 2013
    Date of Patent: September 29, 2015
    Assignee: Rohm Co., Ltd.
    Inventor: Takuya Hattori
  • Patent number: 9143096
    Abstract: Apparatus and methods for envelope tracking systems are disclosed herein. In certain implementations, an envelope tracking system for generating a power amplifier supply voltage for a power amplifier is provided. The envelope tracking system includes a DC-to-DC converter that generates a regulated voltage from a battery voltage and controls a voltage of the regulated voltage using a low frequency feedback signal. The envelope tracking system further includes an error amplifier that generates an output current using an envelope signal and a high frequency feedback signal. The low frequency feedback signal is based on a low frequency component of the power amplifier supply voltage and the high frequency feedback signal is based on a high frequency component of the power amplifier supply voltage. The error amplifier generates the power amplifier supply voltage by adjusting the magnitude of the regulated voltage using the output current.
    Type: Grant
    Filed: February 8, 2013
    Date of Patent: September 22, 2015
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Florinel G Balteanu, David Steven Ripley, Sabah Khesbak, Jeffrey Gordon Strahler, Roman Zbigniew Arkiszewski, Yevgeniy A Tkachenko
  • Patent number: 9143310
    Abstract: Provided is a method of correcting a time misalignment between envelope and phase components in a transmitting apparatus which separates envelope and phase components of a signal, processes them, and then recombines them to transmit the recombined signal. For this, in a method of correcting a time misalignment between envelope and phase components according to an embodiment of the present invention, a time misalignment is corrected by applying a time delay to at least one of envelope and phase components in digital and analog signal processing operations, or applying a time delay to an envelope or phase component by a pre-processing operation.
    Type: Grant
    Filed: June 3, 2014
    Date of Patent: September 22, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung Jun Lee, Young Kyun Cho, Seunghyun Jang, Bong Hyuk Park, Jae Ho Jung, Kwangchun Lee
  • Patent number: 9130513
    Abstract: An audio signal amplifying device and method for reducing a size and corresponding power consumption of demodulation filters in the signal amplifying device. In the device and method, carrier waves having phase shifts are generated from a received audio signal. The shifted carrier waves are compared to the audio signal to generate modulation signals, which are amplified based on a power supply voltage. The amplified modulation signals or a power supply signal are output based on a comparison between the carrier waves and the audio signal. The output signals are synthesized to produce a synthesized signal having a lower average voltage and current value, thus reducing power consumption of the signal amplifying device.
    Type: Grant
    Filed: December 23, 2010
    Date of Patent: September 8, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-hyun Lim, Hae-kwang Park
  • Patent number: 9130521
    Abstract: Aspects of the invention include an operational amplifier circuit having a construction of a rail-to rail input folded circuit and includes an N-MOS differential pair composed of a pair of N-channel type MOS-FETs connected to a pair of voltage input terminals, and a P-MOS differential pair composed of a pair of P-channel type MOS-FETs connected to the pair of voltage input terminals. In some aspects, a comparator determines whether an common mode input voltage to the N-MOS differential pair and the P-MOS differential pair is higher than a half of a power supply voltage or not, and either one of the N-MOS differential pair and the P-MOS differential pair is selectively operated according to the comparison result. Active loads are provided separately for the N-MOS differential pair and for the P-MOS differential pair.
    Type: Grant
    Filed: April 2, 2014
    Date of Patent: September 8, 2015
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Motomitsu Iwamoto
  • Patent number: 9124227
    Abstract: Systems and methods are disclosed to provide automatic power control for a driver circuit. Embodiments disclosed herein enable a driver circuit to automatically decrease the gain of amplified input signals when output power exceeds a threshold. Further, embodiments disclosed herein enable a driver circuit to automatically increase the gain of amplified input signals when battery supply voltage drops to avoid unwanted output signal distortion. By using reference signals for battery power and amplified signal input, the amplifiers of the driver circuit can be automatically adjusted until an equilibrium is reached.
    Type: Grant
    Filed: September 18, 2012
    Date of Patent: September 1, 2015
    Assignee: Broadcom Corporation
    Inventors: Minsheng Wang, Iuri Mehr, Jungwoo Song, Vinay Chandrasekhar
  • Patent number: 9124971
    Abstract: An audio signal processing circuit includes an encoding circuit, a first audio conversion circuit, and a second audio conversion circuit. The encoding circuit receives pulse coded modulation signals and generates a first audio signal and a second audio signal accordingly. The first audio conversion circuit generates a first pulse width modulation (PWM) signal according to consecutive values of the first audio signal for configuring a first power stage circuit. The second audio conversion circuit generates a second PWM signal according to consecutive values of the second audio signal for configuring a second power stage circuit. The pulse width of the first PWM signal is configured to be substantially equal to the pulse width of the second PWM signal, and the pulse edges of the first PWM signal and the second PWM signal are configured to be separated by a predetermined time interval to mute the audio signal processing circuit.
    Type: Grant
    Filed: August 13, 2013
    Date of Patent: September 1, 2015
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventor: Tsung-Nan Wu
  • Patent number: 9112467
    Abstract: An energy-efficient consumer device audio power output stage with gain control provides improved battery life and reduced power dissipation without clipping the audio output signal. A power supply having a selectable operating mode supplies the power supply rails to the power amplified output stage. The operating mode is controlled in conformity with an input audio signal level, which may be determined from a volume control setting of the device and/or from a signal level detector that determines the amplitude of the signal being amplified. The gain applied to the audio input signal is reduced for a predetermined time period when a higher output voltage of the power supply is selected, to avoid clipping the audio output signal.
    Type: Grant
    Filed: October 16, 2012
    Date of Patent: August 18, 2015
    Assignee: Cirrus Logic, Inc.
    Inventors: John Christopher Tucker, Daniel John Allen, John L. Melanson, Ammisetti Prasad
  • Patent number: 9107167
    Abstract: An envelope tracking circuit for a transmit and receive path for a telecommunications device includes a filter to reduce the bandwidth of the transmit signal. The envelope of the filtered signal having the lower bandwidth is used to dynamically modulates the power amplifier voltage supply signal. The filter depends on current instantaneous values and also depends in a nonlinear way on instantaneous past and future values of the envelope tracking signal. The filter may be symmetric about peaks of the transmitted signal.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: August 11, 2015
    Assignee: Broadcom Corporation
    Inventors: Sriraman Dakshinamurthy, Robert Gustav Lorenz
  • Patent number: 9106182
    Abstract: There is described a method of generating a power supply tracking a reference signal, comprising the steps of: filtering the reference signal; generating a first voltage in dependence on the filtered reference signal; generating a second voltage in dependence on the reference signal; and combining the first and second voltages to provide a power supply voltage.
    Type: Grant
    Filed: November 4, 2009
    Date of Patent: August 11, 2015
    Assignee: Nujira Limited
    Inventors: Martin Paul Wilson, Gerard Wimpenny
  • Patent number: 9099968
    Abstract: The problem to be solved is to alleviate the distortion characteristic of an amplifier and to prevent the drop in gain with respect to a low-level high-frequency signal. A bias control circuit (10) for controlling the bias of an amplifier (20) which amplifies a high-frequency signal is provided herein with a detector (11) for detecting the envelope of the high-frequency signal, a first bias circuit (12) for supplying a constant bias current to the amplifier (20) and a second bias circuit (14) for supplying a bias current that varies with the variation of the level of the envelope of the high-frequency signal to the amplifier.
    Type: Grant
    Filed: January 17, 2012
    Date of Patent: August 4, 2015
    Assignee: TDK CORPORATION
    Inventors: Tomohiko Shibuya, Atsushi Ajioka, Atsushi Tsumita
  • Patent number: 9098099
    Abstract: An apparatus and a method for raising an output efficiency in a mobile communication terminal are provided. The apparatus includes a supply modulator and a power amplifier. The supply modulator includes a DC-DC converter, a voltage regulator, and a switching regulator. The supply modulator modulates an envelope component of an input signal to generate power. The power amplifier amplifies a phase component of the input signal using the power generated by the supply modulator as a power source of a collector/drain. The DC-DC converter raises battery power of the mobile communication terminal. The voltage regulator determines an output voltage of the supply modulator using the power raised by the DC-DC converter. The switching regulator determines an output current of the supply regulator using the battery power of the mobile communication terminal.
    Type: Grant
    Filed: November 11, 2011
    Date of Patent: August 4, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bok-Ju Park, Hyung-Sun Lim, Hee-Sang Noh, Jun-Seok Yang
  • Patent number: 9093957
    Abstract: Various envelope tracking amplifiers are presented that can be switched between an ET (envelope tracking) mode and a non-ET mode. Switches and/or tunable components are utilized in constructing the envelope tracking amplifiers that can be switched between the ET mode and the non-ET mode.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: July 28, 2015
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Dan William Nobbe, Jeffrey A. Dykstra, Chris Olson, James S. Cable
  • Patent number: 9086708
    Abstract: Embodiments of the disclosure include high slew rate switching regulator circuits and methods. In one embodiment, switching regulators are coupled to an output node. A first switching regulator may drive the output node. A second switching regulator may drive the output node through a capacitor. Control circuitry may include feedback inputs to maintain a first voltage on the output of the first switching regulator on one terminal of the capacitor and further to maintain a second voltage on the output of the second switching regulator on the other terminal of the capacitor.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: July 21, 2015
    Assignee: Gazelle Semiconductor Inc.
    Inventors: David Christian Gerard Tournatory, Kevin Kennedy Johnstone
  • Patent number: 9088251
    Abstract: In an aspect of the disclosure, a class D power amplifier with an overcurrent protection (OCP) circuit is provided. The class D power amplifier includes a plurality of output transistors, and the OCP circuit is mirrored to at least one output transistor of the plurality of output transistors in a closed-loop feedback configuration for precisely controlling a sensing current of the OCP circuit with respect to an output current of the at least one output transistor. The class D power amplifier with the OCP circuit in the closed-loop feedback configuration mitigates a variation in a current threshold value for triggering interruption of the class D power amplifier.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: July 21, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Haibo Fei, Matthew D. Sienko, Chenling Huang