Abstract: A difference between subsequent measures of a second signal when a first signal crosses a threshold value can be used to estimate a delay between the first and second signal. The delay can be used to compensate for delays between an envelope power supply signal and a radio frequency (RF) input signal.

Abstract: Apparatus and methods for envelope alignment calibration in radio frequency (RF) systems are provided. In certain embodiments, calibration is performed by providing an envelope signal that is substantially triangular along an envelope path, and by providing an RF signal to a power amplifier along an RF signal path. Additionally, an output of the power amplifier is observed to generate an observation signal using an observation receiver. The observation signal includes a first peak and a second peak, and a delay between the envelope signal and the RF signal is controlled based on relative size of the peaks of the observation signal to one another.

Abstract: An average power tracking (APT) power management circuit is provided. The APT power management circuit is configured to generate a first APT voltage(s) for a first power amplifier(s) and a second APT voltage(s) for a second power amplifier(s). The APT power management circuit further includes a pair of switcher circuits that can generate a pair of reference voltages. Depending on various operating scenarios of the APT power management circuit, it is possible to selectively output any of the reference voltages as any one or more of the first APT voltage(s) and the second APT voltage(s). As such, it is possible to flexibly configure the APT power management circuit to support the various operating scenarios based on a minimum possible number of the switcher circuits, thus helping to reduce footprint and cost of the APT power management circuit.

Abstract: A power converter may include an input for receiving an input signal and output for generating an intermediate signal that is a power converted signal from the input signal wherein the intermediate signal is determined based on various parameters of a signal path that utilizes the intermediate signal, wherein the various parameters comprise one or more of the following: a peak output signal of the signal path, energy requested over a period of time by the signal path, available energy from an energy source to the power converter, stored energy at an output of the power converter, and stored energy of a battery for providing electrical energy at the input.

Abstract: Disclosed is an operating method for a wirelessly communicating electronic device, including the following steps: a) acquisition of a radio-frequency frame representative of at least one data item intended to be transmitted by the radio-frequency transmitter in a radio-frequency message; b) determination of the amount of power available in the power storage; c) determination of the length of the radio-frequency message to be transmitted; d) determination of transmission parameters of the radio-frequency transmitter, according to the values determined for the length of the message and the amount of power available in the power storage; e) and transmission of the message by the transmitter, using the determined transmission parameters.

Abstract: A package or a chip including a linear amplifier and a power amplifier is provided, wherein the linear amplifier is configured to receive an envelope tracking signal to generate an amplified envelope tracking signal, the power amplifier is supplied by an envelope tracking supply voltage comprising a DC supply voltage and the amplified envelope tracking signal, and the power amplifier is configured to receive an input signal to generate an output signal.

Abstract: An antenna controller for an antenna is configured to request and receive status information comprising power amplifier data of at least two adjustable power amplifiers. The antenna controller is configured to determine at least one target setting for the at least two adjustable power amplifiers based on the received power amplifier data, and to send the at least one target setting for the at least two adjustable power amplifiers. Hereby it is made possible for an antenna controller to set an overall target for multiple adjustable power amplifiers of the antenna. This in turn makes it possible to make the settings for the adjustable power amplifiers such that the transmission signal becomes linearized by a shared digital pre-distorter when transmitting using the multiple adjustable power amplifiers of the antenna. A Radio Frequency Integrated Circuit controller for an antenna subarray is configured to control at least one adjustable power amplifier.

Abstract: A dual-mode average power tracking (APT) controller operates in a first mode to move the control voltage quickly without concern for ripple or ringing. When this coarse adjustment takes the control voltage to within a desired margin of a target, the controller may switch to a second mode, where the APT controller more slowly approaches the target, but has reduced ringing or ripples. The mode is changed by changing resistance and capacitance values in a loop filter within the APT circuit. In a further aspect, a pulse shaper circuit may inject a pulse to force the control voltage to change more rapidly. By switching modes in this fashion, the control voltage may quickly reach a desired target, and then remain in the second mode during a transmission time slot such that the control voltage is clean throughout.

Abstract: A compensator system includes a control loop with a gain modifier coupled to an antenna. A control unit is configured to adjustably control the gain of a Tx signal being provided to the antenna by the gain modifier. The control unit receives feedback from a first detector connected to the output of the gain modifier that allows the first control unit to ensure the gain modifier is providing the appropriate amount of gain. A signal level can be provided to the control unit to set the desired output level from gain modifier and the signal level can be determined adjacent a transceiver that is separated from the gain modifier by a length of cable.

Abstract: A marine vessel electric propulsion system includes an electric motor, a propulsive force generator to be driven by the electric motor to generate a propulsive force, an operator to be operated by a user to adjust the power output of the electric motor, and a controller. The controller is configured or programmed to control the power output of the electric motor based on an operation of the operator, and to change a power output gain characteristic of the electric motor with respect to an operation amount of the operator in response to a gain change command.

Abstract: In one aspect, a power amplifier apparatus comprising a power amplifier (PA) and an adaptive controller is provided. The PA comprises at least one transistor and the adaptive controller is configured to control a bias voltage of the transistor based on a measured power efficiency of the PA and a measure output signal quality of the PA. In another aspect, a method of optimizing PA performance is provided. The PA comprises at least one transistor and the method includes initializing a bias voltage of the transistor, receiving measurements indicating a power efficiency and an output signal quality of the PA, evaluating the received measurements, calculating a new bias voltage for the transistor based on the evaluation, and applying the calculated new bias voltage to the transistor.

Abstract: A digital to analog converter (DAC) can include a current mode DAC to receive an OC word from digital logic indicating an amount of current to add to or remove from sources of respective transistors of an amplifier and generate a current based on the OC word, an active output stage including a positive current mirror and a negative current mirror to generate a positive current and a negative current based on at least a portion of the generated current, and a plurality of outputs including a plurality of sink outputs and a plurality of source outputs to provide the positive and negative currents to the sources of the respective transistors.

Abstract: A power amplifier circuit includes a first amplifier including two amplifiers connected in series with a matching circuit interposed therebetween, a first power supply circuit that supplies a first power supply voltage to a former amplifier of the first amplifier, and a second power supply circuit that supplies a second power supply voltage to a latter amplifier of the first amplifier.

Abstract: A method for using driver circuitry to drive a load having an unknown impedance magnitude includes (a) in a configuration mode of the driver circuitry, determining a required power supply voltage for a driver stage to drive the load, and (b) in a driving mode of the driver circuitry, (1) driving the load via the driver stage in response to an input signal, and (2) controlling a power supply to provide the required power supply voltage to the driver stage as a static voltage, while driving the load via the driver stage in response to the input signal.

Abstract: A circuit includes a transformer having a primary coil coupled to a first power amplifier (PA) and a second PA, and a secondary coil. The secondary coil supplies a current to an antenna based on a first direction of a first phase of a first amplified constant-envelope signal in the primary coil with respect to a second phase of a second amplified constant-envelope signal in the primary coil. The circuit further includes load impedance coupled between a median point of the primary coil and ground. The load impedance dissipates the current based on a second direction of the first phase of the first amplified constant-envelope signal in the primary coil with respect to the second phase of the second amplified constant-envelope signal in the primary coil, which results in improved power efficiency.

Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.

Abstract: Generally, the described techniques provide for efficiently transmitting uplink signals to a base station using shared antennas associated with different power classes. A first device may be in communications with a base station using local antennas and may identify a second device having auxiliary antennas available for transmitting uplink signals to the base station. The local and auxiliary antennas may be associated with different power classes, and the first device may transmit a message to a base station indicating that the first device is capable of transmitting using antennas associated with different power classes. The first device may then receive configurations from a base station of different transmit powers to transmit on the antennas associated with the different power classes, and the first device may transmit uplink signals to the base station in accordance with the different transmit power configurations.

Abstract: Aspects of the present disclosure provide a high voltage switch with a fast turn-off. An example power supply circuit generally includes a capacitive element for coupling to a power terminal of an amplifier, a first switch configured to be closed in a first mode and to be open in a second mode, a second switch coupled in series between the first switch and the capacitive element and configured to be closed in the first mode and to be open in the second mode, a first circuit coupled to the first switch and configured to charge the capacitive element and power the amplifier in the first mode, and a buffer circuit having an output coupled to a first node and configured to output a first voltage level greater than half of a second voltage level at a second node.

Abstract: An open-loop digital-to-analog converter (DAC) circuit may include a delta-sigma modulator, a decode block responsive to the delta-sigma modulator configured to perform a DAC decode operation, a plurality of DAC elements responsive to the DAC decode operation, an analog output driver responsive to the plurality of DAC elements, a test signal generator configured to generate a test signal that is responsive to inputs of the plurality of DAC elements, and a synchronizer configured to enable replication of the test signal at an external test system coupled to the open-loop DAC circuit in order to generate a matching test signal at the external test system that matches the test signal generated by the test signal generator.

Abstract: A method of controlling a headroom voltage of a transistor stage of an electroplating system to maintain a target power dissipation across the transistor stage may include maintaining a headroom voltage in the transistor stage for a load in the electroplating system. The method may also include measuring an instantaneous power dissipation in the transistor stage and generating a difference output representing a difference between the instantaneous power dissipation in the transistor stage and the target power dissipation in the transistor stage. A voltage across the transistor stage and the load may then be adjusted using the difference output such that the headroom voltage in the transistor stage is adjusted to maintain the target power dissipation in the transistor stage.

Abstract: Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are presented, where the amplifier can have a varying supply voltage. According to one aspect, the gate of the input transistor of the amplifier is biased with a fixed voltage whereas the gates of the other transistors of the amplifier are biased with variable voltages that are linear functions of the varying supply voltage. According to another aspect, the linear functions are such that the variable voltages coincide with the fixed voltage at a value of the varying supply voltage for which the input transistor is at the edge of triode. According to another aspect, biasing of the stacked transistors is such that, while the supply voltage varies, the drain-to-source voltage of the input transistor is maintained to a fixed value whereas the drain-to-source voltages of all other transistors are equal to one another.

Abstract: Techniques are described related to digital radio control and operation. The various techniques described herein enable high-frequency local oscillator (LO) signal generation using injection locked cock multipliers (ILCMs). The techniques also include the use of LO signals for carrier aggregation applications for phased array front ends. Furthermore, the disclosed techniques include the use of array element-level control using per-chain DC-DC converters. Still further, the disclosed techniques include the use of adaptive spatial filtering and optimal combining of analog-to-digital converters (ADCs) to maximize dynamic range in digital beamforming systems.

Abstract: A power amplifying circuit includes an amplifier that amplifies a radio-frequency signal and a bypass capacitor section connected to a power supply terminal for supplying a power supply voltage to the amplifier. The bypass capacitor section includes a first capacitor, a second capacitor, and a first switch circuit. The first capacitor includes a first end connected to a power supply path, and a second end. The second capacitor includes a first end connected to the second end of the first capacitor and a second end connected to ground. The first switch circuit includes a first terminal connected to the second end of the first capacitor and the first end of the second capacitor, and a second terminal connected to the ground. The first switch circuit switches between connection and non-connection between the second end of the first capacitor and the ground.

Abstract: A multi-amplifier envelope tracking (ET) circuit and related apparatus are provided. The multi-amplifier ET circuit includes a number of amplifier circuits configured to amplify concurrently a radio frequency (RF) signal to generate a number of amplified RF signals for concurrent transmission, for example, in a millimeter wave (mmWave) spectrum. The amplifier circuits are configured to amplify the RF signal based on a number of ET voltages and a number of low-frequency currents, respectively. A number of driver circuits is provided in the multi-amplifier ET circuit to generate the ET voltages and the low-frequency currents for the amplifier circuits, respectively. In examples discussed herein, the driver circuits are co-located with the amplifier circuits to help improve efficiency and maintain linearity in the amplifier circuits, particularly when the RF signal is modulated at a higher modulation bandwidth (e.g., >80 MHz).

Abstract: A drive-sense circuit includes a signal source circuit and a signal change detection circuit. The signal source circuit is operably coupled to a sensor. When enabled, the signal source circuit provides a signal to the sensor. When the sensor is exposed to a condition, an electrical characteristic of the sensor affects the signal, which includes a DC component and/or an oscillating component. When enabled, the signal change detection circuit is operably coupled to detect an effect on the signal as a result of the electrical characteristic of the sensor. The signal change detection circuit is further operable to generate a signal representative of change to the signal based on the detected effect on the signal.

Abstract: A distributed envelope tracking (ET) amplifier circuit and related apparatus are provided. The distributed ET amplifier apparatus includes an amplifier circuit configured to amplify a radio frequency (RF) signal based on a modulated voltage. In examples discussed herein, the amplifier circuit is co-located with an ET voltage circuit configured to supply the modulated voltage such that a trace inductance between the amplifier circuit and the ET voltage circuit can be reduced to below a defined threshold. By co-locating the amplifier circuit with the ET voltage circuit to reduce a coupling distance between the amplifier circuit and the ET voltage circuit and thus the trace inductance associated with the coupling distance, it may be possible to reduce degradation in the modulated voltage. As a result, it may be possible to improve efficiency and maintain linearity in the amplifier circuit, particularly when the RF signal is modulated at a higher modulation bandwidth.

Abstract: An envelope tracking (ET) integrated circuit (IC) (ETIC) is provided. The ETIC is configured to generate an ET voltage based on a supply voltage(s) and provide the ET voltage to an amplifier circuit(s) for amplifying a radio frequency (RF) signal(s). Notably, the RF signal(s) may be modulated in different modulation bandwidths and the amplifier circuit(s) may correspond to different load-line impedances. Accordingly, the ETIC may need to adapt the ET voltage such that the ETIC and the amplifier circuit(s) can operate at higher efficiencies. In examples discussed herein, the ETIC is configured to determine a time-variant peak of the ET voltage and adjust the supply voltage(s) accordingly. As a result, it may be possible to improve operating efficiency of the ETIC in face of a wide range of bandwidth and/or load-line requirements.

Abstract: A power amplifier module includes a power amplifier circuit and a control IC. The power amplifier circuit includes a bipolar transistor that amplifies power of an RF signal and outputs an amplified signal. The control IC includes an FET, which serves as a bias circuit that supplies a bias signal to the bipolar transistor. The FET is operable at a threshold voltage lower than that of the bipolar transistor, thereby making it possible to decrease the operating voltage of the power amplifier module.

Abstract: An adaptive frequency equalizer for wide modulation bandwidth envelope tracking (ET) is provided. In this regard, an ET integrated circuit (ETIC) provides an ET power signal for one or more power amplifiers (PAs). A voltage error can occur in the ET power signal due to variable impedance sources, such as a variable load impedance at the PA and a variable trace inductance between the ETIC and the PA. The adaptive frequency equalizer disclosed herein works to adaptively correct for such voltage errors to provide improved overall power signal tracking at the PA, especially where there is a large trace inductance from the ETIC being located several centimeters (cm) away from the PA. Thus, embodiments of the adaptive frequency equalizer enhance ET performance for radio frequency (RF) systems having a modulation bandwidth of 100 megahertz (MHz) or above.

Abstract: Provided is a power supply for envelope tracking, comprising: a first driving unit for finally providing a first current based on a preset and variably-set first high-frequency threshold or threshold interval; a second driving unit for finally providing a second current based on a preset and variably-set second low-frequency threshold or threshold interval; a third driving unit for providing a third current based on a delayed signal; and a superimposing unit for superimposing the first current, the second current, and the third current to provide a supply voltage of a radio-frequency power amplifier. A new power supply for envelope tracking is provided, which is capable of more efficiently providing a supply voltage of the radio frequency power amplifier by superimposing a first current to a third current.

Abstract: In a discrete supply modulation system, a circuit includes a multi-stage pulse shaping network (PSN) having a first PSN stage having an input configured to receive variable bias supply signals from a power management circuit (PMC) and having an output coupled to one or more second PSN stages with each of the one or more second PSN stages having an output configured to be coupled to a supply (or bias) terminal of a respective one of one or more radio frequency amplifiers. Such an arrangement is suitable for use with transmit systems in mobile handsets operating in accordance with 5th generation (5G) communications and other connectivity protocols such as 802.11 a/b/g/n/ac/ax/ad/ay and is suitable for use with multiple simultaneous transmit systems including multiple-input, multiple-output (MIMO), uplink carrier aggregation (ULCA) and beamforming.

Abstract: The present disclosure discloses a terahertz detector based on a N×M dielectric resonant antenna array, wherein a N×M on-chip dielectric resonant terahertz antenna array is connected to a matching network, the matching network is connected to a source of a NMOSFET, a gate of the NMOSFET is sequentially connected to a first bias resistor and a first bias voltage, a third transmission line is connected between the first bias resistor and the gate, a drain of the NMOSFET is connected to a first DC blocking capacitor, the other end of the first DC blocking capacitor is connected to a low noise preamplifier, a second bias resistor and a second bias voltage are further connected between the first DC blocking capacitor and the low noise preamplifier, and the low noise preamplifier is further provided with a voltage feedback loop. The present disclosure also discloses a design method for the same.

Abstract: An envelope tracking system is disclosed having an envelope tracking integrated circuit (ETIC) with a first tracker having a first supply output and a second tracker having a second supply output, wherein the ETIC has a first mode in which only one of the first and second trackers supplies voltage and a second mode in which the first and second trackers both supply voltage. A first notch filter is coupled to the first supply output and a second notch filter is coupled to the second supply output. A mode switch coupled between the first supply output and the second supply output is configured to couple the first notch filter and the second notch filter in parallel in the first mode and open the mode switch to decouple the first notch filter from the second notch filter in the second mode in response to first and second switch control signals, respectively.

Abstract: An envelope tracking (ET) integrated circuit (IC) (ETIC) is provided. The ETIC includes a number of ET circuits configured to generate a number of ET voltages based on a number of ET target voltages, respectively. In examples discussed herein, a selected ET circuit among the ET circuits is configured to generate a respective ET voltage based on a maximum ET target voltage among the ET target voltages. In this regard, the respective ET voltage generated by the selected ET circuit can be used as a reference ET voltage for the rest of the ET circuits in the ETIC. As a result, it may be possible to opportunistically turn off or reduce functionality of one or more other ET circuits in the ETIC, thus helping to reduce peak battery current and improve heat dissipation in an ET amplifier apparatus incorporating the ETIC.

Abstract: A voltage generation circuit and related envelope tracking (ET) amplifier apparatus is provided. In examples discussed herein, a voltage generation circuit can be provided in an ET amplifier apparatus to provide a supply voltage to a voltage amplifier(s) that is configured to generate an ET voltage for an amplifier circuit(s). In a non-limiting example, the voltage amplifier(s) receives an ET target voltage signal corresponding to a time-variant target voltage envelope and generates the ET voltage conforming to the time-variant target voltage envelope. The voltage generation circuit is configured to generate one or more supply voltages and selectively provide one of the supply voltages to the voltage amplifier(s) in accordance to the time-variant target voltage envelope. By selectively providing the supply voltage based on the time-variant target voltage envelope, it may be possible to improve efficiency of the voltage amplifier, thus helping to improve efficiency and linearity of the amplifier circuit(s).

Abstract: Disclosed are a radio frequency power amplifier for inhibiting a harmonic wave and stray, a chip and a communication terminal. The radio frequency power amplifier comprises a power source, an LDO circuit, a harmonic inhibition unit, a stray inhibition unit, an amplifying unit, and a low-pass matching network. On the one hand, by means of the power source being connected to the harmonic inhibition unit, harmonic waves and stray of the power source at a resonant frequency are inhibited. Additionally, by means of the stray inhibition unit reducing the gain of the amplifying unit at a resonant frequency, output of stray is reduced. On the other hand, by means of the low-pass matching network being embedded at an output end of the radio frequency power amplifier, harmonic waves and the stray of a radio frequency signal amplified by the amplifying unit at different frequencies is effectively inhibited.

Abstract: A power management circuit and related radio frequency (RF) front-end circuit are provided. In examples discussed herein, a power management circuit can be incorporated into an RF front-end circuit to support RF beamforming in millimeter wave spectrum(s). In this regard, the power management circuit is configured to generate multiple output voltages to drive multiple power amplifier subarrays in the RF front-end circuit. More specifically, the power management circuit is configured to generate the output voltages based on a voltage scaling factor(s) such that each of the output voltages corresponds proportionally to a battery voltage received by the power management circuit. As such, the output voltages can be dynamically controlled based on the voltage scaling factor(s) to maximize operating efficiency of the power amplifier subarrays. As a result, it is possible to reduce heat dissipation of the power amplifier subarrays and improve overall thermal performance of the RF front-end circuit.

Abstract: Apparatus and methods for envelope tracking systems with automatic mode selection are provided herein. In certain configurations, a power amplifier system includes a power amplifier configured to provide amplification to a radio frequency signal and to receive power from a power amplifier supply voltage, and an envelope tracker including a signal bandwidth detection circuit configured to generate a detected bandwidth signal based on processing an envelope signal corresponding to an envelope of the radio frequency signal. The envelope tracker further includes a switch bank configured to receive a plurality of regulated voltages, a filter configured to filter an output of the switch bank to generate the power amplifier supply voltage, and a mode control circuit configured to control a filtering characteristic of the filter based on the detected bandwidth signal.

Abstract: An envelope tracking (ET) voltage tracker circuit is provided. The ET voltage tracker circuit is configured to generate a time-variant voltage based on a time-variant target voltage, which further corresponds to a time-variant power envelope of a radio frequency (RF) signal. The time-variant voltage may be provided to an amplifier circuit(s) for amplifying the RF signal. The ET voltage tracker circuit includes a target voltage processing circuit configured to pre-process the time-variant target voltage. More specifically, the target voltage processing circuit is configured to pre-process the time-variant target voltage based on a high-order transfer function when the time-variant target voltage corresponds to a higher modulation bandwidth (e.g., >80 MHz). As a result, it may be possible to improve temporal alignment between the time-variant voltage and the time-variant target voltage at the amplifier circuit(s), thus allowing the amplifier circuit(s) to operate with improved efficiency and linearity.

Abstract: A power control circuit includes a voltage control circuit and a current control circuit. The voltage control circuit is configured to detect an output power control signal that is inputted, convert the output power control signal into a control voltage and output the control voltage to the driver stage of a power amplifier connected to the power control circuit. The current control circuit is configured to detect an output power control signal that is inputted, convert the output power control signal into a control current and output the control current to the amplification stage of the power amplifier.

Abstract: An envelope tracking system for controlling a power amplifier supply voltage includes envelope circuitry and a feed forward digital to analog converter (DAC) circuitry. The envelope circuitry is configured to generate a target envelope signal based on a selected power amplifier supply voltage. The feed forward DAC circuitry includes a voltage source circuitry and a selector circuitry. The voltage source circuitry is configured to generate a plurality of voltages. The selector circuitry is configured to select one of the plurality of voltages based at least on the target envelope signal. The feed forward DAC circuitry is configured to provide the selected voltage to a supply voltage input of a power amplifier that amplifies a radio frequency (RF) transmit signal.

Abstract: The present disclosure discloses a dielectric resonant antenna based NMOSFET terahertz detector, comprising an on-chip dielectric resonant terahertz antenna, wherein the on-chip dielectric resonant terahertz antenna is connected to a matching network, the matching network is connected to a source of an NMOSFET, and a gate of the NMOSFET is sequentially connected to a first bias resistor and a first bias voltage, a third transmission line is connected between the first bias resistor and the gate, a drain of the NMOSFET is connected to a first DC blocking capacitor, the other end of the first DC blocking capacitor is connected to a low noise preamplifier, a second bias resistor and a second bias voltage are connected in parallel between the first DC blocking capacitor and the low noise preamplifier, and the low noise preamplifier is further provided with a voltage feedback loop. The present disclosure also discloses a design method for the same.

Abstract: A system may include a first capacitor, a first switched-mode power supply configured to deliver energy from a power source to the first capacitor at an output load of the first switched-mode power supply, a second capacitor having a capacitance larger than the first capacitor, a second switched-mode power supply configured to deliver energy from the power source or a second power source to the second capacitor and one or more switching elements coupled between the first capacitor and the second capacitor. The system may operate in a plurality of modes, including a first mode in which the first switched-mode power supply transfers energy to the first capacitor and the second capacitor, a second mode in which the second capacitor transfers energy to the first capacitor, and a third mode in which first switched-mode power supply transfers energy to the first capacitor and the second capacitor and the second switched-mode power supply transfers energy to the first capacitor and the second capacitor.

Abstract: Techniques are described for using valley detection for supply voltage modulation in power amplifier circuits. Embodiments operate in context of a power amplifier circuit configured to be driven by a supply voltage generated by a supply modulator and to receive an amplitude-modulated (AM) signal at its input. The output of the power amplifier circuit can be fed to a valley detector that can detect a valley level corresponding to the bottom of the envelope of the AM signal. The detected valley level can be fed back to the supply modulator and compared to a constant reference. In response to the comparison, the supply modulator can vary the supply voltage to the power amplifier circuit in a manner that effectively tracking the envelope of the power amplifier circuit's output signal, thereby effectively seeking a flat valley for the output signal's envelope.

Abstract: In one embodiment, a filter circuit is formed to include a transconductance amplifier. The filter circuit has one pair of capacitors connected between at least one input of the amplifier and an input signal that is to be filtered.

Abstract: A dynamic power supply (DPS) for polar modulation transmitters and envelope tracking (ET) transmitters includes a direct current (DC)-DC converter, a linear amplitude modulator (LAM) connected in series with the DC-DC converter, and a controller that dynamically controls both the switching of the DC-DC converter and the magnitude of the LAM's reference voltage, depending on time-varying changes in an input envelope voltage Venv. The DC-DC converter includes a high-power buck switching stage and an output energy storage network having a third-order or higher low-pass filter (LPF). The third-order or higher LPF filters out switching noise and ripple from the switching voltage produced by the high-power buck switching stage, and in one embodiment of the invention is augmented by a damping network that eliminates undesirable ringing at the power supply input of the LAM, thereby increasing efficiency and DPS conversion precision.

Abstract: The present invention provides a class-G amplifier, wherein the class-G amplifier includes an amplifier stage, an impedance detector and a power source. In the operations of the class-G amplifier, the amplifier stage is supplied by a supply voltage, and amplifies an input audio signal to generate an output audio signal, and the impedance detector is configured to detect an output impedance of the amplifier stage to generate a detection result, and the power source refers to the detection result to determine a level and a switching frequency of the supply voltage.

Abstract: An example method according to some embodiments includes receiving, from a modulator, a phase-modulated carrier output signal having a carrier center frequency that is a non-integer multiple of a desired carrier center frequency; generating, by an injection-locked ring oscillator (ILRO), a plurality of phases of the phase-modulated carrier output signal at a plurality of outputs of the ILRO; generating a decoupled fractional frequency output signal by sequentially selecting, using a multiplexer, successive outputs of the plurality of outputs corresponding to successive phases of the plurality of phases, the decoupled fractional frequency output signal having a center frequency equal to an integer multiple of the desired carrier center frequency; and generating, based on the decoupled fractional frequency output signal, a desired phase-modulated carrier output signal that is decoupled from the modulator, the desired phase-modulated carrier output signal having a generated carrier center frequency equal to the

Abstract: An integrated circuit, a circuit assembly and a method for operation the integrated circuit are disclosed. In embodiments an integrated circuit includes at least one supply voltage terminal configured to receive a supply voltage for operation of the integrated circuit, at least one input terminal configured to receive an analog input signal corresponding to an audio signal, at least one output terminal configured to provide an analog output signal, a signal strength detector configured to detect a signal strength of the analog input signal provided at the at least one input terminal and a signaling circuit configured to indicate an amplification setting of the integrated circuit at the at least one output terminal, wherein the integrated circuit is configured to amplify the audio signal based on the detected signal strength and to output a corresponding amplified signal at the at least one output terminal.

Abstract: The purpose of the present invention is to provide an amplifier having high signal-to-noise ratio of a transmitted signal and high electrical efficiency. Another purpose is to suppress complexity of amplifier's wiring connecting a signal generator that generates a binary digital signal and an amplification unit that amplifies the same. This amplifier generates a binary digital signal. The amplifier further generates a K-value digital signal (K is an integer greater than or equal to 3) from the binary digital signal and generating a plurality of binary digital signals from the K-value digital signal. The amplifier amplifies each of the plurality of binary digital signals, and combines the plurality of amplified binary digital signals and generating a combined signal having a substantially proportional relationship with the K-value digital signal.