Abstract: A power amplifier circuit includes a transistor having a base to which a radio frequency signal is input and a collector to which a power supply voltage that varies in accordance with an envelope of amplitude of the radio frequency signal is supplied and from which an amplified signal obtained by amplifying the radio frequency signal is output; a first termination circuit provided at a stage subsequent to the transistor and configured to attenuate a harmonic component of the amplified signal; and a second termination circuit provided at the stage subsequent to the transistor and configured to attenuate a harmonic component of the amplified signal. The first termination circuit and the second termination circuit have a property of resonating for a radio frequency signal having a frequency between a frequency of a second harmonic component and a frequency of a third harmonic component.

Abstract: A circuit includes a first device between a first input node and an internal node, a second device between a second input node and the internal node, a third device between the internal node and ground, a fourth device between the internal node and an output node, and a fifth device between the output node and ground. The second and third devices generate a direct current (DC) voltage on the internal node by dividing a bias voltage on the second input node. The fourth device generates, from the DC voltage, a first component of an output voltage on the output node. The first and third devices generate a modulation signal on the internal node by dividing a radio frequency (RF) signal on the first input node. The fifth device rectifies the modulation signal to generate a second output voltage component.

Abstract: Various methods and circuital arrangements for controlling an RF amplifier while reducing size, cost and power consumption are presented. Included is an amplifier controller unit that provides different current amplification stages, via corresponding calibration and control blocks, that can be used for calibrating an output power of the RF amplifier based on a reference current. Order of the current amplification stages starting from the reference current allow reduction in size, cost and power consumption. A fixed or programmable offset current may be added to an output current provided by a current amplification stage.

Abstract: Techniques for non-linear modeling of a physical system are provided using direct optimization of look-up table values. A non-linear system with memory is modeled by obtaining physical data for the non-linear system by applying a set of input samples x(n) to the non-linear system and measuring an output y(n) of the non-linear system; directly computing parameters ? of a memory model for the non-linear system from the physical data, wherein the memory model comprises one or more look-up tables having linear interpolation and wherein the parameters ? produce a substantially minimum mean square error; and providing the parameters ? for storage as entries in the one or more look-up tables. The mean square error can be determined, for example, using one or more of a least squares algorithm, a least mean square algorithm and a recursive least squares algorithm. The look-up tables are optionally used in a processor instruction to implement digital pre-distortion.

Abstract: Provided is a Radio Frequency (RF) communication apparatus and a method for detecting power. The RF communication apparatus includes a receiver that receives a segment value indicating one of multiple transmission output power ranges, a power detector that detects a strength of an RF transmission signal in an output power range corresponding to the segment value, and a transmitter that transmits the strength of the detected RF transmission signal. The power detector includes a feedback unit that receives the fed-back RF transmission signal, an RF core unit that generates a Root Mean Square (RMS) of the RF transmission signal, and a converter that converts a current signal corresponding to the RMS of the RF transmission signal into a voltage signal, and converts the converted voltage signal from a differential signal to a single signal.

Abstract: The present invention relates to a power detection circuit and an RF signal amplification circuit having the same. According to an embodiment of the present invention, a power detection circuit including a coupling unit adjacent to an RF matching inductor to extract induced power; a rectification unit for rectifying the signal output from the coupling unit to output the rectified signal; a slope adjustment unit connected between an output terminal of the rectification unit and a ground and adjusting a voltage slope for power detection by changing the output signal of the output terminal of the rectification unit according to changes in internal impedance; and a smoothing unit for receiving the output signal of the output terminal of the rectification unit to smooth the received signal into a DC voltage for power detection using the voltage slope is provided. Further, an RF signal amplification circuit having the same is provided.

Abstract: There is provided compensation for non-linear effects caused by a radio frequency power amplifier. An input sequence is acquired. A pre-distortion parameter is determined based on the input sequence. The pre-distortion parameter is based on a block matrix pseudo-inverse of a regression matrix comprising permutations of the input sequence. The regression matrix is decomposed into at least two block matrices based on at least one physical property of the radio frequency power amplifier.

Abstract: A method of sharing inductors for inductive peaking of an amplifier includes calculating a single stage inductance of a single stage for inductive peaking in order to have a stable impulse response. The method further includes determining a number of stages for shared inductance for inductive peaking. The method further includes sharing at least two inductors having the shared inductance among the determined number of stages for inductive peaking.

Abstract: A multiband RF power amplifier includes a first band RF amplifier circuit, a second band RF amplifier circuit and a second band power detection circuit. The second band RF amplifier circuit subjects an RF input signal having a frequency band to power amplification and generates an RF amplifier output signal. The input terminal of the second band power detection circuit is coupled to the output of the second band RF amplifier circuit. The second band power detection circuit detects a harmonic component that is a whole number multiple of a fundamental wave component of the RF amplifier output signal, and generates a detected signal indicating the fundamental wave component. The second band power detection circuit includes an input circuit, which detects the harmonic component, and an output circuit, which generates the detected signal.

Abstract: The present invention reduces the size of a power detection circuit. An RF power amplifier includes an RF amplifier circuit and a power detection circuit. The RF amplifier circuit subjects an RF input signal having a predetermined frequency band to power amplification and generates an RF amplifier output signal. The input terminal of the power detection circuit is coupled to the output of the RF amplifier circuit. The power detection circuit detects a harmonic component having a harmonic frequency that is a whole number multiple of the frequency of a fundamental wave component of the RF amplifier output signal, and generates at an output terminal a detected signal indicative of the signal level of the fundamental wave component of the RF amplifier output signal. The power detection circuit includes an input circuit, which detects the harmonic component, and an output circuit, which generates the detected signal at the output.

Abstract: Disclosed herein is a circuit for preventing an element from being damaged although output impedance of a final transistor is changed in a power amplifier. The power amplifier includes: a power stage amplifying a signal; a transformer connected to an output terminal of the power stage and coupling a signal output from the power stage; and a controller controlling a bias voltage from the power stage according to the coupled signal. Although output impedance is changed, damage to the power amplifier can be prevented. Also, the power amplifier can be automatically controlled to maintain performance thereof by sensing an operational state in which output impedance is normal.

Abstract: Techniques are disclosed relating to peak detection. In one embodiment, an apparatus is disclosed that includes an amplifier configured to amplify a signal. The apparatus further includes a peak detector DC coupled to an output of the amplifier. The peak detector includes a first comparator stage configured to perform subtraction of a threshold signal from the amplified signal. The peak detector further includes a second comparator stage is configured to amplify a differential output signal of the first comparator stage indicative of a result of the subtraction. In some embodiments, the amplifier and peak detector are included within automatic gain control system in a path for an in-phase or quadrature channel of the receiver chain.

Abstract: A circuit for self-calibrating a gain control system samples the output of a digital amplifier coupled in series with one or more analog amplifiers to correct errors in a discrete stepped gain control. A digital gain control circuit controls both the digital amplifier and at least one analog amplifier to produce a smooth linear and continuous gain, wherein perturbations in the digital control of gain are smoothed by a signal applied to gain control circuit by a gain step correction circuit.

Abstract: In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block.

Abstract: A power detector includes a first phase shift element implemented to shift a phase of a first input signal to generate a first phase-shifted signal, a second phase shift element implemented to alter a phase of a second input signal to generate a second phase-shifted signal, a combiner for combining the first phase-shifted signal and the second phase-shifted signal to generate a combined single-phase signal, and a single element power detector for determining a power of the combined single-phase signal.

Abstract: A variable gain amplifier includes a plurality of amplification elements arranged to generate amplified representations of an RF input signal at a plurality of nodes. A plurality of controllable response elements each have an input coupled to a different one of the nodes to receive a different one of the amplified representations of the RF input signal. A scale factor generator is coupled to each of the controllable response elements. The scale factor generator receives a gain control signal and generates scale factor signals for varying the response of each of the controllable response elements such that as the scale factor generator sweeps through a full range of the gain control signal, the response of each of the controllable response elements is, in succession, increased smoothly to a peak and thereafter decreased smoothly to a lower level to produce a scaled output.

Abstract: A power amplification circuit includes a power amplifier, an RF detector, an error amplifier, a saturation detector, and an offset circuit. The power amplifier provides an amplified signal based on an input signal and a gain control signal. The RF detector provides a detection signal indicative of a logarithm of the power of the amplified signal. The error amplifier provides the gain control signal based on an amplification control signal and the detection signal. The saturation detector provides a saturation signal in response to the gain control signal differing from a reference signal by less than a first predetermined voltage. The offset circuit decreases a voltage level of the amplification control signal by up to a second predetermined voltage in response to the saturation signal and the amplification control signal differing from the detection signal by less than the second predetermined voltage.

Abstract: An amplifier includes a voltage detector that detects current flowing to a drain terminal of a transistor which amplifies a signal using GaN as a voltage difference by means of voltage conversion, a compensation decision unit that decides whether or not to perform gain compensation based on the voltage difference detected by the voltage detector, and a gain compensation unit that performs the gain compensation according to the voltage difference when the compensation decision unit decides to perform the gain compensation.

Abstract: A linear diode detector having an increased dynamic range and an improved sensitivity level is described. The linear diode detector includes a signal input that receives a sample of output power from a power amplifier (PA). A detector output provides a voltage signal that is usable by power control circuitry to maintain a constant output power for the PA. A rectifier diode has an anode communicatively coupled to the signal input, and a cathode that is communicatively coupled to the detector output. A low pass filter is communicatively coupled to the detector output to filter out high frequency components of a rectified sample of output power. The anode of a feedback diode is communicatively coupled to the detector output, and the cathode of the feedback diode is communicatively coupled to the anode of the rectifier diode in order to feedback a portion of the voltage signal to increase detection sensitivity.

Abstract: A dual FET detector having a common RF input and a common detector output for two detector circuits is provided. The first detector circuit is optimized for detecting lower RF signal levels while the second detector circuit is optimized for detecting higher RF signal levels. A detector output voltage output from the common detector output is a composite signal made up of the individual contributions of the two detector circuits. A control circuit receives a feedback signal derived from the detector output voltage, and uses the feedback signal to control a transition between urging a predominance of the contribution to the detector output voltage from one of the detector circuits to the other. The control of the transition between the detector circuits ensures that whichever of the two detector circuits is best optimized for a particular RF signal level will contribute the most to the detector output voltage.

Abstract: An amplifier module comprises an amplifier with an output and a coupling element for receiving a signal at the output. It also comprises a control input for receiving a control signal and a power detector which can be changed over and is intended to determine a power signal from the signal. The power detector which can be changed over is coupled to the control input and is set up in such a manner that a dynamic range of the power detector can be changed on the basis of the control signal.

Abstract: Systems and methods are described for detecting and correcting saturation in a power amplification circuit. An exemplary circuit comprises a power amplifier that provides an amplified output signal based upon an input signal and a gain control signal; a power detector that provides a detector signal indicative of the amplified signal magnitude; an error amplifier that generates the gain control signal based upon a setpoint signal and the detector signal; and a saturation detector that provides a saturation detection signal indicating whether gain control signal exceeds a reference signal. In another embodiment the circuit comprises an offset generator that provides a correction to the setpoint signal in response to the saturation detection signal indicating that the gain control signal exceeds the reference signal. In still another embodiment the circuit includes an offset cutoff circuit that freezes the correction to the setpoint signal in response to the correction exceeding a threshold.

Abstract: A method for low noise signal amplification includes modifying a signal by way of a first amplification stage and conveying the modified signal to a second amplification stage. The method continues with comparing an output of the second amplification stage with a signal ground in a low-frequency feedback loop and changing a bias voltage for the first amplification stage as a result of the comparing step.

Abstract: A switchable inductor-capacitor-inductor (L-C-L) network, which includes an integrated T/R switch, can advantageously bridge a PA and an LNA of a wireless device. The first inductor can function as an RF choke that provides power to the PA. In one embodiment, the first inductor can be advantageously implemented using the bond wires already attached to the PA, thereby requiring no additional inductors to provide the integrated T/R switch and minimizing use of valuable silicon area. The second inductor can function as a source inductor for and cancel an input parasitic capacitance of the LNA. A set of capacitors can act as blocking capacitors to provide DC isolation between the LNA and the PA, thereby protecting the LNA from high voltages. The L-C-L network can also advantageously function as an impedance matching network for at least one of the PA and the LNA.

Abstract: Embodiments of apparatuses, methods, and systems for a radio frequency amplification circuit utilizing a variable voltage generator are generally described herein. Other embodiments may be described and claimed.

Abstract: An adaptive bias power amplifier including an amplifier, a signal coupler, a power detector and a bias control circuit is provided. The signal coupler is connected to an input terminal of the amplifier. The power detector is connected to the signal coupler, and detects an input power of the amplifier via the signal coupler. The bias control circuit is connected to an output terminal of the power detector and the input terminal of the amplifier. The bias control circuit adjusts a gate bias of the amplifier in accordance with a detecting result of the power detector.

Abstract: An electronic component for high frequency power amplification realizes an improvement in switching spectrum characteristics. The gain of an amplifying NMOS transistor is controlled by a bias voltage on which a bias control voltage is reflected. Further, a threshold voltage compensator compensates for a variation in threshold voltage with variations in the manufacture of the amplifying NMOS transistor. The threshold voltage compensator includes an NMOS transistor formed in the same process specification as the amplifying NMOS transistor and converts a variation in current flowing through the NMOS transistor depending on the variation in the threshold voltage of the amplifying NMOS transistor to its corresponding voltage by a resistor to compensate for the bias voltage. It is thus possible to reduce variations in so-called precharge level brought to fixed output power in a region (0 dBm or less, for example) low in output power.

Abstract: Biasing methods and devices for power amplifiers are described. The described methods and devices use the power amplifier output voltage to generate bias voltages. The bias voltages are obtained using rectifiers and voltage dividers. The described biasing methods and devices can be used with class-E power amplifiers.

Abstract: A gain control circuit and its gain control method, said gain control method comprising the following steps: firstly, outputting continuously a counter value; next, generating a ramp wave signal based on said counter value, and at a voltage where a control voltage signal intersects said ramp wave signal, obtaining an initial counter value based on said ramp wave signal, thus determining an initial voltage gain of an amplifier circuit; then, when a high or low voltage of an output signal of said amplifier circuit is greater or less than a predetermined detection voltage upper or lower limit, adjusting a DC voltage level of said ramp wave signal with a detection signal; and finally, obtaining at said voltage a counter value less than said initial counter value based on said ramp wave signal, hereby reducing said initial voltage gain based on said counter value.

Abstract: An amplifier includes: a variable gain unit that adjusts an amplitude of an input signal and outputs a first signal; an amplitude limiting unit that limits an amplitude of the first signal and outputs a second signal set to have an amplitude of a first amplitude value or less; an amplifying unit that amplifies the second signal to output the amplified second signal as an output signal; and a control unit that detects when the first signal has an amplitude of a second amplitude value or more to control a gain of the variable gain unit so that the amplitude of the first signal becomes less than the second amplitude value, the second amplitude value being larger than the first amplitude value.

Abstract: A full-wave rectifier circuit receives complementary signals and produces a current corresponding to an added value of differential signals at different levels. A voltage comparator performs a comparison between output signals produced and subjected to current addition and voltage conversion by the full-wave rectifier circuit. A timer detects whether an output signal of the voltage comparator is kept in the same state for a predetermined time or more, and produces a signal indicating a result of the detection. A signal detecting circuit that can accurately identify a state of digital signals of a minute amplitude transferred through a pair of complementary signal lines is achieved without complicating manufacturing steps.

Abstract: A circuit arrangement for wirelessly exchanging data with a reader device, including an antenna for converting electromagnetic radiation into an antenna voltage, an analogue circuit for demodulating an information signal based on the antenna voltage, and a digital circuit for processing of the information signal and for receiving power from the analogue circuit. The circuit arrangement also includes a decoupling circuit, which is interconnected between the analogue circuit and the digital circuit and provides a decoupling of both circuits.

Abstract: A method for amplifying radiocommunication signals via a string of amplifiers associated with a gain controller receiving an amplification setpoint of constant value, in order to produce an amplification of constant gain or of variable value, in order to produce an amplification with constant amplified power with the aid of a first regulator that is able to deliver this variable value setpoint based on a measurement of the amplified power. So that, in constant gain amplification mode, a setpoint transmitted by the first regulator is held at a value close to the setpoint of constant value.

Abstract: Embodiments of the present invention provide systems and methods for automatic amplifier gain profile control, including a method for automatically configuring a variable gain profile amplifier according to received input and a variable gain profile amplification system. Further, embodiments of the present invention provide systems and methods for increased gain profile accuracy, including methods and systems to reduce the effects of temperature and/or process variations on the gain profile of an amplifier.

Abstract: There is provided an AGC circuit that has a very small offset voltage and is easy for integration, without using any of external capacities.

Abstract: A system for controlling amplifier power is provided. The system includes a voltage envelope detector that receives a voltage signal and generates a voltage envelope signal. A current envelope detector receives a current signal and generates a current envelope signal. A power amplifier level controller receives the greater of the voltage envelope signal and the current envelope signal, such as by connecting the output of the voltage envelope detector and the current envelope detector at a common point and conducting the high frequency current components to ground via a capacitor. A power amplifier level control signal is then generated based on the voltage drop across the capacitor.

Abstract: Satellite set-top boxes (STB) are increasingly being designed with multiple tuners, making them capable of receiving more than one program at a time. In addition, satellite STBs are increasingly being designed with multiple inputs, to permit reception of additional channels that will not fit within the conventional satellite intermediate frequency (IF) band (950-2150 MHz). Often, the STB must route these multiple inputs to the multiple tuners with some form of switching function, to allow each tuner to receive all channel bands. Accordingly, the invention includes an RFIC with two RF inputs and three RF outputs, and a crossbar switch that can route any input to any output. The two inputs are amplified by low-noise amplifier stages.

Abstract: A wireless communication unit comprises a semiconductor power amplifier device and a bias control circuit therefor. The bias control circuit comprises a detector for detecting at least a portion of the RF input signal; and a buffer for buffering the detected RF input signal. The detector is arranged to provide at least one inverted signal of the RF input signal. A semiconductor amplifier device is connected to an output of the bias control circuit and arranged to use an inverted detected signal to extract current from the output. When applied to a Doherty amplifier design, the biasing circuit requires fewer components, for example no video (buffer) amplifier and no delay block are required in the RF path. This facilitates integration of the circuit on a semiconductor die.

Abstract: An apparatus and method is disclosed for providing a mirror circuit for detecting a change in current of a RF power amplifier. The mirror circuit includes a voltage operably coupled with the mirror circuit, a bias circuit operably coupled with the mirror circuit, wherein the bias circuit is capable of applying a bias voltage to the mirror circuit, and an output reference signal. The output reference signal is proportional to the change of current in the RF power amplifier.

Abstract: A radio-frequency power amplifier is supplied by a voltage supply device. The voltage supply device has a voltage divider chain that is connected at the input side with a base potential and a ground voltage. The voltage divider chain has a number of Zener diodes connected in series, with which at least one capacitor is connected in parallel. Intermediate voltages that lie between the ground voltage and the base potential can be tapped at respective node points between each two immediately adjacent Zener diodes. A first supply input of the radio-frequency power amplifier is connected with the ground voltage. The voltage divider chain is connected with the radio-frequency power amplifier via a switching device. The switching device has a number of switching elements connected in parallel with one another, these switching elements being connected at the output side with a second supply input of the radio-frequency power amplifier.

Abstract: A variable gain frequency multiplier comprises a multiplier circuit and a control circuit configured to receive a power control signal, the power control signal being proportional to a power output signal.

Abstract: A radio frequency (RF) amplifier system uses an envelope elimination and restoration (EER) amplifier having at least one carrier input, at least one power input, and at least one amplifier output carrying an amplified signal. The RF amplifier system disclosed also uses a diplexer receiving the amplified signal and filtering the amplified signal, the diplexer having at least one RF output and at least one harmonic energy output. Further, the RF amplifier system uses a harmonic energy recovery circuit. The harmonic energy recovery circuit is coupled to the at least one harmonic energy output and the harmonic energy recovery circuit having at least one output coupled to the EER amplifier.

Abstract: An architecture for detecting amplifier power is provided. The architecture includes a voltage envelope detector that receives a voltage signal and generates a voltage envelope signal. A current envelope detector receives a current signal and generates a current envelope signal. A power amplifier level controller receives the greater of the voltage envelope signal and the current envelope signal, such as by connecting the output of the voltage envelope detector and the current envelope detector at a common point and conducting the high frequency current components to ground via a capacitor. A power amplifier level control signal is then generated based on the voltage drop across the capacitor.

Abstract: A single chip GSM/EDGE transceiver comprises a fully differential receive chain, a subharmonic mixer in the receive chain, the subharmonic mixer configured to receive a radio frequency (RF) input signal and a local oscillator (LO) signal that is phase-shifted by a nominal 45 degrees, and a synthesizer having a voltage controlled oscillator and having at least one frequency divider to generate desired transmit and receive LO signals. The transceiver also comprises a transmitter having a closed power control loop, and a harmonic rejection modulator, the use thereof made possible by a frequency plan designed to allow the synthesizer to develop the transmit and receive LO signals without a frequency multiplier.

Abstract: An automatic gain controller includes a variable gain amplifier for amplifying an input signal having a specified DC level on the basis of the DC level, and outputting a first differential signal having a specified gain ?, a second differential signal having a 180° phase difference from the first differential signal, and an output signal obtained by subtracting the second differential signal from the first differential signal; a full-wave-rectifying unit for full-wave-rectifying the first differential signal and the second differential signal; a low-pass filter for extracting the DC component from the output signal of the full-wave-rectifying unit and outputting the extracted DC component; a reference voltage level adjustment unit for adjusting a DC level of a reference voltage; and a comparison unit for comparing the output signal of the low-pass filter with the output signal of the reference voltage level adjustment unit to adjust a gain of the variable gain amplifier.

Abstract: RF power detector employing an envelope amplifier circuit and a current mirror circuit. The output of the current mirror circuit supplies a bias voltage for biasing the output of the envelope amplifier circuit. Furthermore, the output of the envelope amplifier circuit is fed back to the output of the current mirror circuit so as to reduce the magnitude of the bias signal according to the magnitude of the amplified RF signal envelope. In this manner, the overall gain of the RF power detector can be selectively reduced, resulting in an RF power detector having a more linearized dynamic range and greater ability to compensate for variation in gain caused by temperature.

Abstract: Provided is a detector for automatic gain control (AGC). The detector for AGC is used for a variable gain amplifier (VGA) including at least one VGA cell.

Abstract: A signal amplifier system is provided for a mobile or portable broadcast receiver. The signal amplifier system includes an operational circuitry, a signal generator and a voltage supply. The signal generator receives a field strength signal that indicates a field strength of at least one broadcast signal. The signal generator outputs a supply voltage control signal based on the field strength signal. The voltage supply provides one of a first supply voltage and a second supply voltage to the operational circuitry in accordance with the supply voltage control signal.

Abstract: The present invention is an active RF power detector and decision circuit, which is used to provide a DC signal to circuitry that controls the DC supply voltage to an RF power amplifier. The DC signal is proportional to the amount of RF power detected within specified operating limits. When the RF power detected is above the maximum operating limit, the DC signal is set to its maximum value. When the RF power detected is below the minimum operating limit, the DC signal is set to its minimum value. The active RF power detector and decision circuit does not require an external DC reference voltage. Since the active RF power detector and decision circuit uses active components, the input impedance is high enough to use resistors to couple the RF input signal instead of a lower impedance RF coupler and the response time is faster than a passive envelope detector.

Abstract: An apparatus and method is disclosed for providing a mirror circuit for detecting a change in current of a RF power amplifier. The mirror circuit includes a voltage operably coupled with the mirror circuit, a bias circuit operably coupled with the mirror circuit, wherein the bias circuit is capable of applying a bias voltage to the mirror circuit, and an output reference signal. The output reference signal is proportional to the change of current in the RF power amplifier.