Abstract: A recording system, such as a magnetic or optical recording system, sets input attenuation level setting and variable gain amplifier (VGA) operating region during zero gain start (ZGS) by sharing the ZGS adjustment between attenuator settings and VGS gain setting. Further adjustment is made to attenuator settings and VGS gain setting for each subsequent servo or read sector event. The input attenuation level setting and variable gain amplifier (VGA) operating region are set so as to minimize effects of gain error due to incorrect attenuator setting, and subsequently operate the VGA near the center of its range where the non-linear effects are minimal.

Abstract: An operational amplifier comprises multiple stages. A differential input stage that includes an adaptive high voltage differential pair generates up and down output currents in response to up and down input voltages. The differential input stage includes adaptive common input high voltage (HV) bias. An intermediate stage converts the up and down output currents into a first output voltage signal. The intermediate stage includes a folded cascode arrangement. The intermediate stage is biased by fixed voltage bias signals. The intermediate stage also includes unaffected slew rate stability compensation and a combined split stability compensation. An output stage includes a class AB source follower driver that generates a second output voltage signal in response to the first output voltage signal. The output stage is biased with an adaptive push-pull source follower output HV bias. The output stage includes feed-forward slew rate enhancement.

Abstract: A circuit and method for bridging an analog signal between two integrated circuits operating at different supply voltages. The circuit is a two stage fixed gain amplifier. The first stage is a transconductance amplifier and the second stage is an operational amplifier. The first stage converts an input signal from a voltage into a current. The second stage converts the current signal to an output voltage signal.

Abstract: The present invention relates to a high-frequency power amplifier having differential inputs, and more specifically to a high-frequency power amplifier having differential inputs, in which a structure of an output port of a communication system for 2.4 GHz ISM frequency band can be simplified by designing and producing the high-frequency power amplifier having differential inputs for 2.4 GHz ISM frequency band using a silicon germanium (SiGe) microwave monolithic integrated circuit (MMIC), thereby decreasing the number of components of a transmission unit and reducing a price of the communication system.

Abstract: A method and apparatus is provided for detecting the output power of an RF power amplifier for purposes of controlling the output power. A circuit for generating an output power control signal includes a power detector to detect the output power of an RF power amplifier. A variable gain amplifier is coupled to the power detector for amplifying the output of the power detector. The value of the generated control signal is a function of the gain of the variable gain amplifier.

Abstract: A radio frequency amplifier and a method of driving the radio frequency amplifier which are excellent in the controllability at the time of a low power output while keeping the advantage of a high efficiency and give the heating generated by a power loss of such a degree that dewing generated due to over-cooling by the cooling system is not generated at the time of a low power output. The radio frequency amplifier is structured by a variable wave height and a variable wave width pulse wave generating circuit that generates a pulse wave (rectangular wave) having an arbitrary pulse height and pulse width, and a power amplifier that is driven by the rectangular wave.

Abstract: The invention relates to a power control structure comprising a switching mode power amplifier for receiving an input signal, for amplifying the received input signal and for providing the amplified signal as output signal. In order to enable a power control over a large range while preserving the efficiency of the power amplifier, the structure further comprises a first control arrangement for controlling the power level of the output signal at least at higher desired power levels by adjusting a power supply provided to the switching mode power amplifier, and in addition a second control arrangement for controlling the power level of the output signal at least at lower desired power levels by adjusting the power of the input signal before it is provided to the switching mode power amplifier. The invention relates equally to a corresponding method.

Abstract: An automatic gain control device without being influenced by leakage current of a capacitor. The automatic gain control device includes a first control loop, a second control loop, and a multiplexer. The first control loop receives an input voltage and generates a first control voltage. The second control loop receives the first control voltage, digitizes the first control voltage, and outputs a second control voltage by a DAC. The multiplexer chooses the first control voltage or the second control voltage as a gain control voltage according to a hold signal. Because the second control loop digitizes and holds the first control voltage and output the second control voltage from the DAC, the gain control voltage can be held constant for a long time without being influenced by leakage current.

Abstract: The number of components of a high frequency power amplifier is reduced. A bias resistance ratio is adjusted in accordance with a change in the threshold voltage Vth of a transistor. A high frequency power amplifier has a plurality of amplifying systems. Each of these systems has an input terminal to which a signal to be amplified is supplied, an output terminal, a bias terminal, a plurality of amplifying stages which are sequentially cascaded between the input and output terminals, and a bias circuit connected to the bias terminal and each of the amplifying stages to apply a bias potential to the amplifying stage. The amplifying stage includes a control terminal for receiving an input signal and the bias potential supplied to the stage and a first terminal for transmitting an output signal of the stage.

Abstract: The invention relates to a power control structure comprising a switching mode power amplifier for receiving an input signal, for amplifying the received input signal and for providing the amplified signal as output signal. In order to enable a power control over a large range while preserving the efficiency of the power amplifier, the structure further comprises a first control arrangement for controlling the power level of the output signal at least at higher desired power levels by adjusting a power supply provided to the switching mode power amplifier, and in addition a second control arrangement for controlling the power level of the output signal at least at lower desired power levels by adjusting the power of the input signal before it is provided to the switching mode power amplifier. The invention relates equally to a corresponding method.

Abstract: A circuit and method for bridging an analog signal between two integrated circuits operating at different supply voltages. The circuit is a two stage fixed gain amplifier. The first stage is a transconductance amplifier and the second stage is an operational amplifier. The first stage converts an input signal from a voltage into a current. The second stage converts the current signal to an output voltage signal.

Abstract: An automatic gain control device without being influenced by leakage current of a capacitor. The automatic gain control device includes a first control loop, a second control loop, and a multiplexer. The first control loop receives an input voltage and generates a first AGC voltage accordingly. The second control loop receives the first AGC voltage, registers the first AGC voltage as digital data, and outputs a second AGC voltage by a DAC. The multiplexer chooses the first AGC voltage or the second AGC voltage as an AGC voltage according to a hold signal. Because the second control loop registers the first AGC voltage in a digital format and output the second AGC voltage from the DAC, the AGC voltage can be held constant for a long time without being influenced by leakage current.

Abstract: In a transmission power control circuit according to the present invention, a variable gain amplifier (1) amplifies a transmitting wave with a gain corresponding to a control voltage VC from a power control section (110). When a transmission power (POUT) of the transmitting wave is within a measurable range of a detecting circuit (3), the power control section (110) sets a control voltage feedback ratio (K′) to 0 and applies negative feedback to a detection voltage (VDET) and thereby, implements close loop control to cause transmission power POUT to be closer to a designated level. On the other hand, when the transmission power (POUT) is out of a measurable range of the detecting circuit (3), the power control section (110) sets a detection voltage feedback ratio (K) to 0 to generate the control voltage (VC) according to open loop control based on a reference voltage VREF.

Abstract: In a radio reception apparatus, a judgement unit judges inter-transmission users. A controller specifies the number of inter-transmission users in accordance with the judgement result. The controller calculates a power value of a received signal per one person of inter-transmission user from both of a power value of the received signal and the number of inter-transmission users. The controller estimates a power value in the case where all the members of inter-communication users come into inter-transmission users from both of the calculated power value and the number of inter-communication users.

Abstract: A variable gain low noise amplifier is disclosed that offers flat gain versus frequency throughout the entire cable and broadcast television signal spectrum. The circuit uses multiple stages and buffering techniques to cancel the primary source of high frequency gain degradation. The invention also uses variable capacitor networks which track with gain control to control peaking within the circuit so as to have consistent gain control with frequency and gain. A further aspect of the invention is in the use of capacitors within the circuit to act as simple band-pass filters to roll off segments of the spectrum away from the channel of interest, thus reducing system-level distortion in a receiver.

Abstract: The number of components of a high frequency power amplifier is reduced. A bias resistance ratio is adjusted in accordance with a change in the threshold voltage Vth of a transistor. A high frequency power amplifier has a plurality of amplifying systems. Each of these systems has an input terminal to which a signal to be amplified is supplied, an output terminal, a bias terminal, a plurality of amplifying stages which are sequentially cascaded between the input and output terminals, and a bias circuit connected to the bias terminal and each of the amplifying stages to apply a bias potential to the amplifying stage. The amplifying stage includes a control terminal for receiving an input signal and the bias potential supplied to the stage and a first terminal for transmitting an output signal of the stage.

Abstract: A method and apparatus is provided for detecting the output power of an RF power amplifier for purposes of controlling the output power. A circuit for generating an output power control signal includes a power detector to detect the output power of an RF power amplifier. A variable gain amplifier is coupled to the power detector for amplifying the output of the power detector. The value of the generated control signal is a function of the gain of the variable gain amplifier.

Abstract: An amplifier chain that switches between a saturated mode of operation and a linear mode of operation comprises at least two amplifier stages. A switch is associated with the first amplifier stage and dampens the gain of the amplifier chain when the switch is closed. In a first embodiment, this is done by bypassing the first amplifier stage. In second and third embodiments, this is done by providing a feedback loop to the first amplifier stage. Dynamic device scaling and changing the bias may also be used to affect the performance of the amplifier chain.

Abstract: A power amplifier includes drains and sources of a plurality of transistors connected to each other to produce a plurality of common drains and a plurality of common sources, wherein the common drains are connected at a common drain point and wherein the common drain point is connected via an RF choke to a power supply voltage terminal and wherein the common sources are grounded; an output terminal connected to the RF choke; a plurality of bias terminals each coupled via a resistor to the gate of one of the plurality of transistors wherein each of the gates of the plurality of transistors is also capacitively coupled to a radio frequency input.

Abstract: A design of integrated circuit components to prevent accidental turn on when large input signals are accepted. With integrated circuits operated at lower power supply voltages, input signals having large peak values can tend to turn on devices within the integrated circuit erroneously. By placing amplifiers within the integrated circuits where input signals are received and removing the power of such amplifiers, accidental turn on can be minimized.

Abstract: The invention concerns an amplifier circuit which comprises an amplifier unit (210) arranged to receive an input signal, to influence the amplification of this input signal and to transmit an out signal. The amplifier circuit also comprises a first control unit (210) and a second control unit (220). Those control units receive said output signal. Furtherm re, the amplifier circuit comprises a selector unit (240) which is arranged to receive first and second control signals from the control units (310, 220). The selector unit (240) is arranged to control the amplification of the amplifer unit (201) in accordance with that ne of said first and second control signals which gives the lowest amplification.

Abstract: An automatic gain control device without being influenced by leakage current of a capacitor. The automatic gain control device includes a first control loop, a second control loop, and a multiplexer. The first control loop receives an input voltage and generates a first AGC voltage accordingly. The second control loop receives the first AGC voltage, registers the first AGC voltage as digital data, and outputs a second AGC voltage by a DAC. The multiplexer chooses the first AGC voltage or the second AGC voltage as an AGC voltage according to a hold signal. Because the second control loop registers the first AGC voltage in a digital format and output the second AGC voltage from the DAC, the AGC voltage can be held constant for a long time without being influenced by leakage current.

Abstract: The gain and current consumption of a power amplifier are adjusted while maintaining amplified output signal linearity. Where linearity and low power consumption are maintained for the amplifier by controllable shunting of an input signal amplitude and by providing a predetermined bias signal to the amplifier circuit in a precalibrated manner. A mapping circuit is disposed for receiving a control signal and for providing the predetermined bias signal to the amplifier circuit in the precalibrated manner. The mapping circuit is either internally provided within the same circuit as the power amplifier, or externally.

Abstract: The invention relates to an amplification device AD, comprising a first and a second amplifier AMP1 and AMP2, arranged in cascade, each amplifier being provided with a feedback loop Zi (where i=1 or 2) and having a gain proper Gi equal to Ai/(1+Ai.Zi). In accordance with the invention, the value of the inverse of the gain proper Gi of the first amplifier AMP1 is substantially equal to three times the value of the inverse of the gain proper G2 of the second amplifier AMP2 raised to the power of three: (1/G1)=3/(G2)3. Such a choice provides the amplification device AD with an optimum linearity.

Abstract: A broadband power amplifier module for high bit-rate SONET/SDH transmission channels, such as OC-192 and OC-768 applications. The power amplifier module, or also frequently referred to as modulator driver module, comprises amplifiers connected in series to amplify an input signal. A bias tee circuit is incorporated into the power amplifier module by connecting a conical shape inductor between the output stage of the amplifiers and the supply voltage and connecting a pair of blocking capacitors also at the output stage of the amplifiers. The conical shape inductor is adapted to provide high impedance over the entire bandwidth. The capacitors are adapted to provide high self-resonant frequency that is approaching or exceeding the bandwidth frequency. A power detection circuit can also be incorporated into the power amplifier module at the output stage of the amplifiers. The power detection circuit has a voltage divider circuit connected between the output stage and a ground supply.

Abstract: A GSM system and an EDGE system much different in gain are incorporated into a single high frequency power amplifier module. In a high frequency power amplifier module having a multi-stage amplifying configuration, which is used in a GSM mode and an EDGE mode according to switching, a first-stage amplifier comprises a dual gate MOSFET. In the EDGE mode, an APC signal or a selected and fixed potential is supplied to a first gate electrode of the dual gate MOSFET. Further, Vgs (Vgs1, Vgs2 and Vgs3) of respective transistors of from a first stage to a third stage are fixed in potential form or supplied as APC signals, and the gain in the EDGE mode is matched with that in the GSM mode, whereby the generation of noise is reduced.

Abstract: A variable gain amplifier includes at least two amplifiers for amplifying a signal, the at least two amplifiers being connected in series with one another, and a variable resistor having a resistance that is controlled in accordance with a voltage applied to a control terminal, the variable resistor being connected between the outputs of two of the at least two amplifiers having opposite output phases. As a result, the variable gain amplifier is capable of a low-gain operation and an attenuating operation in a high-frequency amplifier used in a communications device for transmitting and receiving high-frequency signals.

Abstract: A variable gain amplifier (“VGA”) having an open loop architecture is disclosed. The VGA includes one or more gain cells coupled in the signal path to amplify a given input signal. The VGA further includes a replica gain cell having a gain servo circuit which amplifies a gain reference signal according to a programmable gain input and equalizes the amplified reference signal to the original unamplified reference signal, continuously generating a gain control input to the signal path gain cells based on the equalization. This gain control input reflects the gain set by the programmable gain input as adjusted for process, temperature and supply voltage variations. The replica gain cell further includes a common mode voltage servo circuit which senses the common mode voltage of the amplified reference signal and equalizes it to a common mode voltage reference, generating a common mode voltage control signal to the signal path gain cells to regulate their common mode voltage.

Abstract: A mobile station (10) is constructed to include transmitter circuitry (20) and an antenna (24) for transmitting a signal. The transmitter circuitry includes a multistage power amplifier (1) having a first power amplifier stage (1A) with an output coupled to an input of a second power amplifier stage (1B). The output of the second power amplifier stage is coupled to the antenna. The transmitter circuitry further includes a source of variable bias current (3) that is input to the second power amplifier stage for controlling the gain thereof, a source of fixed bias current (3C), and a summing junction (3E) for summing the fixed bias current and the variable bias current for input to the first power amplifier stage for controlling the gain thereof. The gain of the first power amplifier stage is controlled such that a minimum desired gain of the second power amplifier stage is achieved without inducing a collapse in the gain of the first power amplifier stage.

Abstract: A wide band linear gain control amplifier for a mobile communications system, which can be easily implemented by standard CMOS fabrication processes for forming into an integrated circuit. The linear gain control amplifier is responsive to a basic control signal and includes a compensating circuit unit for outputting a gain-compensated first control voltage that is substantially stable against changes in temperature and changes in source voltage, and which has an exponential relation to the basic control signal, and for outputting a second control voltage associated with the first control signal; a variable gain amplification unit for gain-controlling an input signal according to the first control voltage to output an amplification signal and for keeping the gain of the amplification signal for the input signal substantially constant even if a source voltage changes; and a driving amplification unit for amplifying the amplification signal to a predetermined level.

Abstract: An apparatus comprising a first circuit and a second circuit. The first circuit generally comprises one or more master amplifiers and a plurality of control amplifiers. The first circuit may be configured to generate a plurality of control signals in response to (i) a first signal related to a desired gain and (ii) a second signal related to a known reference. The second circuit may be configured to generate an output signal in response to (i) an input signal and (ii) the plurality of control signals. The output signal may be amplified with respect to the input signal.

Abstract: An automatic gain control (AGC) circuit including a high gain amplifier, a feedback network and two transconductance amplifiers. The feedback network has a first end that receives an input signal of the AGC circuit, a second end coupled to the output of the high gain amplifier and two intermediate nodes. Each transconductance amplifier has an input coupled to a respective intermediate node of the feedback network and an output coupled to the input of the high gain amplifier. The transconductance amplifiers collectively control a position of a virtual ground within the feedback network to control gain of the AGC circuit. The transconductance amplifiers each include an attenuator and a transconductance stage coupled between the feedback network and the high gain amplifier and are configured to operate linearly across a relatively wide input voltage range. The input offset voltage of the AGC circuit varies monotonically with gain of the AGC circuit.

Abstract: The gain characteristics of certain stages of a tuner circuit are selected to be proportional, but opposite, to selected other stages such that the overall gain of the tuner remains constant over a wide temperature range. In one embodiment, the gain of the IF stage has a temperature slope opposite to the temperature slope of the input RF stage thereby avoiding the use of AGC circuitry.

Abstract: A high frequency power amplifier module is provided for improving output controllability. A wireless communication apparatus incorporates a high frequency power amplifier module in a multi-stage configuration including a plurality of cascaded MOSFETS. The power amplifier module comprises a bias circuit for generating a gate voltage in response to a power control voltage (vapc) generated based on a power control signal of the wireless communication apparatus. The gate voltage has a bias pattern which presents smaller fluctuations in output power in response to a control voltage (Vapc) in a region near a threshold voltage (Vth) of the MOSFETs in respective amplification stages. In this way, the controllability for the output power is improved. More specifically, the power amplifier module has a gate bias circuit for generating the gate voltage (Vg) which follows a gate voltage pattern.

Abstract: A linear amplifier comprises a first current-mirror circuit including a first transistor whose base and collector are short-circuited for diode connection and whose collector is connected via a first resistance to a power-supply terminal, a second current-mirror circuit including a second transistor whose collector and base are connected to power-supply terminals, and an amplification transistor whose emitter is grounded. The base of the first transistor and the emitter of the second transistor are connected to the base of the amplification transistor.

Abstract: The present invention provides a hardware assisted automatic gain control (AGC) for a communication network. A dedicated hardware portion of the AGC, which works in cooperation with software implemented functionality (400), is included to detect saturation conditions in the internal nodes of the analog front end (200) in which a plurality of gain stages (PGA1, PGA2, PGA3) and filter stages (H1, H2, H3) are interleaved with inaccessible intermediate points. The saturation detection logic includes a comparator (21, 22, 23) and flip-flop (27, 28, 29) for each gain stage (PGA1, PGA2, PGA3) and can be integrated directly in the analog front end 200. The dedicated hardware can further be included in a codec of a modem in a digital subscriber line (DSL) system.

Abstract: A method and apparatus for reducing offset errors in a variable gain circuit is offered. A first programmable gain amplifier is located in a feedforward signal path and a second programmable amplifier is connected in feedback with the first programmable gain amplifier. Each programmable gain amplifier has a separate gain control circuit so that the gain of each programmable gain amplifier can be independently controlled.

Abstract: The present invention concerns a method for variable linear amplification and an apparatus for a variable linear amplifier, which is particularly suited for RF communication applications. One embodiment includes a high gain circuit in communication with a transconductor to receive an RF signal, a low gain circuit in communication with the transconductor and a current dissipation circuit in communication with the transconductor and a ground source. In one embodiment, the high gain circuit is a NMOS device which is characteristically larger than the low gain device.

Abstract: The stages of a multistage amplifier are quickly switched between operational modes, e.g., from a standby mode to an active mode. The delivery of a control signal to each individual stage is delayed so that the modes of the stages are switched, in a desired sequence. The final amplifier stage is isolated from the operational mode switching of the preceding stages by a buffer. For switching the multistage amplifier from the standby mode to the active mode, the stages and the buffer are turned on, in a desired sequence, beginning with the first stage. For switching the multistage amplifier from the active mode to the standby mode, the stages and the buffer are turned off, in a desired sequence, beginning with the buffer. A delay unit includes a plurality of delay units, one connected to each amplifier stage, except the final amplifier stage, and to the buffer.

Abstract: The number of components of a high frequency power amplifier is reduced. A bias resistance ratio is adjusted in accordance with a change in the threshold voltage Vth of a transistor.

Abstract: A signal level adjusting circuit includes a first amplifying stage in which output electrodes of output stage transistors are connected to ground through current supplies and are connected with respective output terminals, and a DC voltage at the output terminals has a first voltage value; a second amplifying stage in which control electrodes of input stage transistors are connected with respective input terminals, and a DC voltage at the input terminals has a second voltage value; and a coupling stage, connected between the output terminals and the input terminals, which includes at least one series resistor. The first amplifying stage is incorporated in a bipolar IC, and the second amplifying stage is incorporated in a CMOS IC.

Abstract: A driver system for a power amplifier in a wireless communication handset. The driver system includes a driver and a current source. The driver drives the power amplifier at a level of linearity determined responsive to a variable input bias current provided by the current source. The current source varies the bias current, and thus the degree of linearity provided, responsive to the desired output power of the handset.

Abstract: A variable gain amplifier includes multiple unit variable gain amplifiers connected in series which amplify an input signal in accordance with their respective gains and generate a multi-stage amplified signal. A gain control circuit generates voltage control signals, one for each of the unit amplifiers, from a gain control input signal. The control signals control the respective gains of the unit amplifiers such that the gain of the first amplifier in the series is greater than the gain of the last amplifier in the series.

Abstract: Disclosed herein is a high frequency power amplifier system having a transistor comprised of a first electrode, a second electrode and a control electrode and for controlling current which flows between the first electrode and the second electrode by applying a potential to the control electrode, and a resistance type potential divider circuit for determining a dc bias potential applied to the control electrode of the transistor, and wherein an input signal is inputted to the control electrode, an output signal is outputted from the first electrode and a control signal is inputted to the resistance type potential divider circuit. One resistor of the resistance type potential divider circuit is comprised of a temperature compensating resistor whose resistance value varies linearly, so that a temperature characteristic of an idle current defined as an output when the control signal is not inputted, assumes a negative temperature characteristic.

Abstract: A variable gain amplifying apparatus which can accurately set a predetermined gain for amplifying. The variable gain amplifying apparatus has a first amplifying circuit, a second amplifying circuit and a third amplifying circuit. The first amplifying circuit can control a first gain during an operation. The second amplifying circuit is coupled to an output of the first amplifying circuit, in which a gain is fixed during an operation. The third amplifying circuit coupled to an output of the second amplifying circuit, in which a gain can be controlled during an operation. The apparatus can avoid deterioration in a distortion characteristic, an increase in a total noise figure and an increase in a consumptive electric power.

Abstract: An amplifier arrangement includes a first amplifier powered by a pair of lower voltage power supplies, a second amplifier powered by a pair of higher voltage power supplies and a drive control device. This amplifier arrangement has both current and voltage gain larger than one. The drive control device includes a regulating device adapted to switch off the first amplifier based on the output signal of the amplifier arrangement, and at least one current link and at least one voltage controlled current source. The transition between the operation of the first and second amplifiers is thereby controlled by the values of the currents of these at least one current links and the at least one voltage controlled current sources.

Abstract: A dual band system high frequency power amplifier has biasing circuits and a bias switching circuit, each circuit having heterojunction bipolar transistors (HBTs) so that the high frequency power amplifier can be integrated with an MMIC of HBTs. A bias switching circuit for switching a first biasing circuit and a second biasing circuit, each made with HBTs, is built with common AlGaAs or GaAs HBTs, having three or more such HBTs connected in series so that the total of each base-emitter voltage, Vbe, does not exceed 3 V.

Abstract: A radio-frequency power amplifier of mobile communication equipment includes a differential amplifier arranged to balanced-input and amplify a radio-frequency signal delivered from a frequency converter of a transmission system of the mobile communication equipment located downstream of a modulator of the transmission system. The radio-frequency signal delivered from the differential amplifier is further amplified and balanced-output by a push-pull circuit. The differential amplifier and the push-pull circuit are respectively supplied with bias currents varying in dependence on a gain control signal, whereby respective amplification gains of the differential amplifier and the push-pull circuit are variably adjusted.

Abstract: A transceiver (10) includes a transmitter (16) that receives a digital data stream from a digital signal processor (18) to delay lines (20, 30). The delay lines (20,30) provide an address to a ROM look-up table (40). Another input of the look-up table (40) receives a signal that selects protocols such as TDMA, CDMA, and GSM. A multi-accumulator fractional-N synthesizer (48) receives phase derivative coefficients and a DAC (46) receives amplitude modulation coefficients from the look-up table (40) based on the selected protocol. The analog output signals from the DAC (46) and the synthesizer (48) are received by a variable gain amplifier (54) that generates an RF amplitude and frequency modulated output signal for transmission from the transmitter (16). The look-up table (40) stores phase derivative coefficients and amplitude modulation coefficients that correct for non-linearity in the variable gain amplifier (54).

Abstract: A bias circuit and bias supply method for a multistage power amplifier including heterojunction bipolar transistors for power amplifying a high frequency signal and suppressing an increase in Rx noise during low power output operation of the multistage power amplifier. The bias circuit outputs a control signal Vapc from an external control circuit to the base of only a first-stage amplifier HBT in the multistage power amplifier. To the base of the second and each later power amplifying stage HBT of the multistage power amplifier, the bias circuit supplies a bias current regulated by voltage stabilizers according to the control signal Vapc.