Abstract: An ultrasonic probe including: a plurality of transducers; a plurality of low-noise amplifier circuits individually corresponding to the plurality of transducers, the plurality of low-noise amplifier circuits having a variable resistor feedback unit making a resistance value variable by an electrical signal inputted to a control terminal; and a control circuit; wherein the control circuit has a dummy circuit generating a bias voltage of a feedback unit of the low-noise amplifier circuit, and an adding circuit outputting an added signal of a bias voltage by the dummy circuit and a control signal increasing or decreasing with a lapse of time; and the plurality of low-noise amplifier circuits input an output of the adding circuit to the control terminal of the variable resistor feedback unit to perform variable control on a gain of the low-noise amplifier circuit.

Abstract: An interface in a communications system includes a physical layer transceiver (PHY) for coupling to a wireline channel medium, and for coupling to a functional device via a single-ended cable. The PHY is an integrated circuit (IC) device having first and second differential input/output (I/O) conductors for coupling to the functional device, an impedance element configured to terminate a first one of the differential I/O conductors to a system ground, a second one of the differential I/O conductors being coupled to the single-ended cable, and a common-mode filter coupled to both of the differential I/O conductors. The PHY may further include a printed circuit board (PCB), with the IC device being mounted on the PCB, the first and second differential I/O conductors being signal traces on the PCB. The single-ended cable may be a coaxial cable.

Abstract: A clock signal conversion circuit includes an amplification circuit configured to amplify a differential clock signal having sub rail-to-rail voltage swings relative to a supply voltage, such that an amplified differential clock signal output by the amplification circuit has complementary positive and negative signal components with full rail-to-rail voltage swings relative to the supply voltage.

Abstract: An amplifier circuitry includes a first amplifier, a second amplifier, a voltage generating circuitry, and a control circuitry. The first amplifier circuitry configured to amplify a first signal. The second amplifier circuitry configured to amplify a second signal which forms differential signals together with the first signal. The voltage generating circuitry configured to generate at least one of a first bias voltage to be applied to the first signal and a second bias voltage to be applied to the second signal. The control circuitry configured to control the voltage generation circuitry so as to decrease a difference between a DC component of an output of the first amplifier circuitry and a DC component of an output of the second amplifier circuitry.

Abstract: A device comprises a voltage-mode filter circuit, a current-mode output circuit, and a regulation circuit. The voltage-mode filter circuit is configured to generate a voltage signal on an output terminal thereof. The current-mode output circuit comprises an input transistor which comprises a gate terminal coupled to the output terminal of the voltage-mode filter circuit, and a source terminal coupled to a regulated node. The regulation circuit is configured to adjust a voltage level on the regulated node to maintain a constant gate-source bias voltage for the input transistor to generate a current for biasing the current-mode output circuit.

Abstract: The present invention provides a common-mode rejection ratio and gain trimming circuit of differential amplifier, comprising: a first trimming unit and a second trimming unit coupled between an in-phase input voltage and a reference voltage, wherein the first trimming unit and the second trimming unit are coupled to a positive input terminal of the differential amplifier by means of tap switches; a third trimming unit and a fourth trimming unit coupled between tan inverting input voltage and an output terminal of the differential amplifier, wherein the third trimming unit and the fourth trimming unit are coupled to a negative input terminal of the differential amplifier by means of tap switches; wherein, the first trimming unit, the second trimming unit, the third trimming unit, and the fourth trimming unit comprise: a first trimming resistor string and a second trimming resistor string coupled in series; the first trimming resistor string is coupled in parallel with a first trimming auxiliary resistor string

Abstract: A circuit for startup of a multi-stage amplifier circuit includes a pair of input nodes and at least two output nodes configured to be coupled to a multi-stage amplifier circuit. A startup differential stage includes a differential pair of transistors having respective control terminals coupled to the pair of input nodes, and each transistor in the differential pair of transistors has a respective current path therethrough between a respective output node and a common source terminal. The startup differential stage is configured to sense a common mode voltage drop at a first differential stage of the multi-stage amplifier circuit. Current mirror circuitry includes a plurality of transistors coupled to the common terminal of the differential pair of transistors and coupled to two output nodes of the at least two output nodes.

Abstract: An imaging device is provided with an amplification transistor having a gate connected to a charge accumulator, a feedback transistor of which the source or drain is electrically connected to the charge accumulator and the other is connected to the source or drain of the amplification transistor, a current supply that supplies a current to a first node, a first select transistor of which the source or drain is connected to the other of the amplification transistor, a second select transistor of which the source or drain is connected to the source or drain of the amplification transistor, a current source/voltage source switching circuit that selectively connects a current source or a first voltage supply circuit to the other of the first select transistor, and a second voltage supply circuit connected to the other of the second select transistor.

Abstract: The present application discloses an amplifier circuit, a chip and an electronic device, which generates a positive output signal and a negative output signal according to a positive input signal and a negative input signal, wherein the positive input signal and the negative input signal have a corresponding input differential-mode voltage and input common-mode voltage, and the positive output signal and the negative output signal have a corresponding output differential-mode voltage and output common-mode voltage, and the amplifier circuit includes: an amplifying unit, configured to receive the positive input signal and the negative input signal and generate the positive output signal and the negative output signal; and an attenuation unit, including: a positive common-mode capacitor and a negative common-mode capacitor, configured to attenuate the input common-mode voltage below a first specific frequency.

Abstract: An operational amplifier with one or more fully-differential amplifier stages has a common-mode control input. A low-frequency feedback control path is coupled between an output of the fully-differential amplifier stages and the common-mode control input to control low-frequency drift of the common-mode voltage of the output of the stages. A high-frequency feed-forward control path couples a pair of inputs of the stages to control high-frequency ripple of a common-mode voltage of the inputs of the stages. One or more of the differential amplifier stages may have a bias input that controls a direct-current (DC) bias voltage of gates of pull-up transistors of the stage that is both DC and capacitively coupled to the gates so that the stage operates with class A bias at DC and with class AB bias at high frequencies.

Abstract: Apparatus and methods for power amplifier distortion networks are disclosed. In one aspect, there is provided a power amplifier system including a power amplifier configured to amplify a radio frequency input signal. The power amplifier including an input configured to receive the radio frequency input signal and an output configured to generate an amplified radio frequency signal. The power amplifier system further includes a distortion network electrically coupled to either the input or the output of the power amplifier. The distortion network including a plurality of channelized resistors. The channelized resistors connected in series to either an input or an output of the power amplifier.

Abstract: An amplifying apparatus includes a zero point generating circuit, a level shift circuit, a transistor, and an amplifying circuit. A first terminal of the zero point generating circuit is coupled to an output terminal of the amplifying apparatus. A first terminal of the level shift circuit is coupled to the output terminal of the amplifying apparatus. A first terminal of the transistor is coupled to a supply voltage. A second terminal of the transistor is coupled to the output terminal of the amplifying apparatus. A control terminal of the transistor is coupled to a second terminal of the level shift circuit. An input terminal of the amplifying circuit is coupled to an input terminal of the amplifying apparatus. An output terminal of the amplifying circuit is coupled to the output terminal of the amplifying apparatus.

Abstract: A neural-signal amplifier includes an amplifier, a switched-capacitor circuit-input unit, a switched-capacitor feedback-circuit unit, and a switched-capacitor circuit-output unit. Each of the switched-capacitor circuit-input unit, the switched-capacitor feedback-circuit unit, and the switched-capacitor circuit-output unit includes a plurality of differential switches, a plurality of common mode switches, and a plurality of capacitors. By controlling the switches to turn on or performing the switched-capacitor operation, the neural-signal amplifier is controlled to suppress the DC drift and reconstruct the DC input of the common-mode power supply.

Abstract: A shunt resistor is connected in series to a load. A differential amplifier circuit are inputted a first voltage that is generated at one end of the shunt resistor and a second voltage that is generated at the other end of the shunt resistor. The differential amplifier circuit outputs a third voltage equivalent to a sum of a reference voltage and a voltage obtained by performing differential amplification on the first voltage and the second voltage. A conversion circuit outputs the voltage obtained by performing differential amplification on the first voltage and the second voltage by removing the reference voltage from the third voltage. The voltage is proportional to a load current.

Abstract: The present disclosure discloses a startup circuit device, a filter and a receiver. The startup circuit device is applicable to the filter that includes a fully-differential operational amplifier and a common-mode feedback circuit device connected in sequence. Both the first startup input terminal and the first startup output terminal are connected to a first amplification input terminal of the fully-differential operational amplifier, and both the second startup input terminal and the second startup output terminal are connected to a second amplification input terminal of the fully-differential operational amplifier.

Abstract: An operational amplifier includes a differential amplification circuit configured to receive and amplify an input voltage to generate an output voltage, and receive a feedback signal, and the feedback signal adjusts a common-mode voltage of the output voltage, a reference voltage generation circuit configured to detect status information of the operational amplifier, and generate a reference voltage based on the status information, where the status information includes a temperature or an operating voltage of the operational amplifier, and a common-mode feedback circuit configured to receive the output voltage and the reference voltage, and provide the feedback signal to the differential amplification circuit based on the output voltage and the reference voltage.

Abstract: A fully differential amplifier includes: an input stage comprising a first amplification circuit and a second amplification circuit, one of which is configured to generate a push signal and the other of which is configured to generate a pull signal, each by amplifying a differential input signal; an output stage for generating a differential output signal based on the push signal and the pull signal; and a feedback circuit for providing common mode feedback to the first amplification circuit based on the differential output signal, wherein the second amplification circuit may include a passive network for setting a common mode voltage of the push signal or the pull signal.

Abstract: An amplifying apparatus and a voltage-to-current conversion apparatus are provided. The amplifying apparatus includes a zero point generating circuit, a level shift circuit, a transistor, and an amplifying circuit. A first terminal of the zero point generating circuit is coupled to an output terminal of the amplifying apparatus. A first terminal of the level shift circuit is coupled to the output terminal of the amplifying apparatus. A first terminal of the transistor is coupled to a supply voltage. A second terminal of the transistor is coupled to the output terminal of the amplifying apparatus. A control terminal of the transistor is coupled to a second terminal of the level shift circuit. An input terminal of the amplifying circuit is coupled to an input terminal of the amplifying apparatus. An output terminal of the amplifying circuit is coupled to the output terminal of the amplifying apparatus.

Abstract: Various embodiments include an electronic circuit for driving a thermocouple element comprising: contact electrodes for connecting cold-end electrodes of the thermocouple element; and a measurement circuit to measure a thermo-voltage generated by the thermocouple element. One of the electrodes is connected to a supply voltage and a ground potential over a voltage divider having resistors with pre-defined resistance values such that a common mode voltage between the contact electrode and the ground potential is in a pre-defined range. If a leakage resistance effective between the contact electrode and the ground potential is greater than a pre-defined threshold, a processor compares the common mode voltage to the pre-defined range and generates a calibration value for the measurement circuitry if the common mode voltage is outside the range.

Abstract: Disclosed is a differential amplifier including an input circuit, a detecting and controlling circuit, and an output circuit. The input circuit outputs input current to two output nodes according to the voltage of a differential input signal and the voltage of a bias node. The detecting and controlling circuit outputs compensative current to the two output nodes according to control bias voltage and the voltage of the bias node, in which the voltage of the bias node and the compensative current relate to the voltage of the differential input signal. The output circuit is coupled to the two output nodes and outputs a differential output signal according to the sum of the input current and the compensative current. Due to the detecting and controlling circuit outputting the compensative current, the differential amplifier prevents itself from entering a deadlock state even though the input current is insufficient or zero.

Abstract: Provided is an imaging device including: a photoelectric converter; an AD converter unit including a differential stage; and a ramp signal generator. The photoelectric converter and a first part of the differential stage are arranged in a first chip, a second part of the differential stage is arranged in a second chip that is a different chip from the first chip and stacked on the first chip, and the ramp signal generator is arranged in a different chip from the first chip.

Abstract: A signal receiving device includes a first amplifier, a duty cycle adjuster and a common mode feedback circuit. The first amplifier receives an input signal, a reference voltage and a bias voltage. The first amplifier generates a first common current based on the bias voltage and, based on the first common current, generates a first output signal and a second output signal complementary to each other by comparing the input signal and the reference voltage. The duty cycle adjuster charges and discharges a selected capacitor according to the first output signal or the second output signal to generate a sensing voltage, and generates a common reference voltage according to the sensing voltage. The common mode feedback circuit generates the bias voltage by comparing the common reference voltage and the reference voltage.

Abstract: A MOSFET has a current conduction path between source and drain terminals. A gate terminal of the MOSFET receives an input signal to facilitate current conduction in the current conduction path as a result of a gate-to-source voltage reaching a threshold voltage. A body terminal of the MOSFET is coupled to body voltage control circuitry that is sensitive to the voltage at the gate terminal of the MOSFET. The body voltage control circuitry responds to a reduction in the voltage at the gate terminal of the MOSFET by increasing the body voltage of the MOSFET at the body terminal of the MOSFET. As a result, there is reduction in the threshold voltage. The circuit configuration is applicable to amplifier circuits, comparator circuits and current mirror circuits.

Abstract: An input circuit includes an input stage having an input node and a direct-current (DC) amplifier coupled to the input node. The input circuit also includes an alternating-current (AC) amplifier coupled to an output node of the DC amplifier. The input circuit also includes a capacitor coupled between the input node and the output node of the DC amplifier. The input circuit also includes a voltage divider coupled to the DC amplifier and the AC amplifier. The voltage divider includes first resistor associated with the DC amplifier and a second resistor associated with the AC amplifier, where the first resistor is larger than the second resistor.

Abstract: In an imaging device, a differential stage includes an input transistor having an input node connected to a floating diffusion portion, a first control line and a second control line are located in a plurality of sets, the first control line is connected to connection portions of some sets of the plurality of sets, and the second control line is connected to connection portions of the other sets of the plurality of sets.

Abstract: An amplifier circuit is provided, which includes an input stage circuit, at least one impedance component and a current supply circuit, where the input stage circuit is coupled between at least one input terminal of the amplifier circuit and at least one output terminal of the amplifier circuit, the impedance component is coupled between a first reference voltage and the output terminal, and the current supply circuit is coupled between a second reference voltage and the output terminal. The input stage circuit is arranged to generate a signal current in response to an input signal on the input terminal, and the current supply circuit is arranged to provide at least one adjustment current. In addition, a common mode voltage level of an output signal on the output terminal is controlled by the adjustment current, to allow the amplifier circuit to perform low voltage operations.

Abstract: A system has an output and receives an input signal. An operational amplifier has an input, an output and an offset at the input. A switched capacitor network samples the input signal at a switched capacitor frequency. An autozeroing capacitor connected to the input of the operational amplifier captures the offset during an offset capture interval according to an autozeroing frequency. Chopping and autozeroing switches, connected between the autozeroing capacitor and the switched capacitor network, chop the sampled input signal according to a chopping frequency and autozero the captured offset according to the autozeroing frequency. De-chopping switches, connected between the output of the operational amplifier and the output of the system, operate on the output of the operational amplifier at the chopping frequency to chop the autozeroed captured offset and de-chop the chopped sampled input signal processed by the operational amplifier.

Abstract: A signal processing arrangement for a Hall sensor comprises a signal path, a feedback path and a converter path. The signal path comprises a Hall element and a front-end amplifier which are connected in series and arranged to generate an output signal depending on a magnetic field. The feedback path comprises a compensation circuit and is coupled to the signal path. The converter path comprises an analog-to-digital converter and an offset compensation circuit and is coupled to the signal path. A switch network is coupled between the signal path, the feedback path and the converter path. In a compensation phase, the switch network electrically connects the feedback path to the signal path such that the compensation circuit generates a compensation signal which is coupled into the signal path. In a sampling phase, the switch network connects the signal path to the converter path such that the output signal is reduced by the compensation signal is provided at the converter path.

Abstract: Apparatus and methods for calibrating radio frequency transmitters to compensate for common mode local oscillator leakage are provided herein. In certain configurations herein, a transmitter generates a radio frequency transmit signal based on mixing a baseband input signal with a local oscillator signal. The transmitter is calibrated to compensate for common mode local oscillator leakage. Thus, a common mode component of the local oscillator signal is reduced or eliminated from the radio frequency transmit signal, which provides a number of benefits, including lower levels of undesired emissions from the transmitter.

Abstract: A differential amplifier circuit includes a differential pair including a first field-effect transistor (FET) and a second FET, a first current source that generates a current which flows in the first FET and the second FET, and an output circuit that outputs an output voltage corresponding to a difference between a gate voltage of the first FET and a gate voltage of the second FET in accordance with an operation of the differential pair. A back gate of the first FET is connected to a gate of the first FET, and a back gate of the second FET is connected to a gate of the second FET. A first feedback voltage corresponding to the output voltage is input to the gate of the second FET.

Abstract: An electronic device includes a voltage divider producing different reference voltages. Dummy pixels each are formed by a transfer gate transistor having a first conduction terminal coupled to a floating diffusion node, a second conduction terminal, and a control node coupled to a first gate signal line, a transmission gate coupled between one of the plurality of taps and the second conduction terminal of the transfer gate transistor, a floating diffusion capacitor coupled between the floating diffusion node and ground, a transistor having a first conduction terminal coupled to the floating diffusion node, a second conduction terminal, and a control terminal coupled to a second gate signal line, and a reset transistor having a first conduction terminal coupled to the upper reference voltage, a second conduction terminal coupled to the second conduction terminal of the transistor, and a control terminal coupled to a reset signal line.

Abstract: At least some embodiments are directed to a system comprising a capacitor coupled to a voltage supply rail and configured to carry a capacitor current that comprises first and second parts. The capacitor current is an alternating current (AC). A first current mirror component may couple to the capacitor and to the voltage supply rail and is configured to carry the first part of the capacitor current. A second current mirror component couples to the voltage supply rail and is configured to carry the second part of the capacitor current. The second part of the capacitor current is proportionally related to the first part of the capacitor current. A circuit couples to the second current mirror component. The capacitor and the first and second current mirror components are configured to attenuate a common mode noise current flowing to the circuit.

Abstract: This application relates to amplifier circuitry for amplifying an input signal from a MEMS capacitive sensor. The amplifier circuitry includes a first amplifier for receiving the input signal (VINP) and outputting a first output signal (VOUTP) based on the input signal. A second amplifier is configured to output a second output signal (VOUTN) which varies inversely with the first output signal. The first and second amplifier outputs are connected via first and second impedances so that a voltage at a common-mode node is equal to a common-mode voltage of the first and second output signals. The second amplifier has an input stage having an input terminal connected to a first reference voltage (VR1) and a feedback terminal connected to the common-mode node. The second amplifier also has an output stage connected between an output terminal of the input stage and the second amplifier output.

Abstract: An operational amplifier includes: a first amplifier stage, configured to generate first output voltages according to first input voltages; a second amplifier stage, configured to generate second output voltages according to the first output voltages; a second output stage circuit, configured to replicate an equivalent or a scaled-down version of the first output stage circuit; a first common-mode feedback circuit, configured to keep an output common-mode voltage of the second output stage circuit at a predetermined value; a logic loop circuit configured to, when the operational amplifier operates in a direct current calibration phase, adjust a difference between the first output voltages; a bias circuit, configured to generate a voltage close to a common-mode voltage of the first output voltages produced after the operational amplifier is turned on, the voltage serving as a reference voltage of a second common-mode feedback circuit.

Abstract: An amplifying circuit may include: an amplifier configured to receive a first input voltage and output a first output voltage by amplifying the first input voltage; and a common-mode feedback circuit configured to enable the first output voltage to operate in a common mode by receiving the first output voltage and performing a feedback to adjust at least one feedback voltage applied to the amplifier based on the first output voltage. The common-mode feedback circuit may include a first Miller compensation circuit configured to perform dominant pole compensation by using a Miller effect for the common-mode feedback circuit. The first Miller compensation circuit may include a resistor and a capacitor.

Abstract: A low noise amplifier (LNA) includes a pair of n-type transistors, each configured to provide a first transconductance; a pair of p-type transistors, each configured to provide a second transconductance; a first pair of coupling capacitors, cross-coupled between the pair of n-type transistors, and configured to provide a first boosting coefficient to the first transconductance; and a second pair of coupling capacitors, cross-coupled between the pair of p-type transistors, and configured to provide a second boosting coefficient to the second transconductance, wherein the LNA is configured to use a boosted effective transconductance based on the first and second boosting coefficients, and the first and second transconductances to amplify an input signal.

Abstract: An apparatus such as an electronic circuit includes an input operable to receive an input signal; a dynamic common mode adjustor operable to: i) derive a differential signal from the received input signal, and ii) control an offset of the differential signal as a function of the received input signal to produce an offset differential signal; and an output operable to output the offset differential signal. In one arrangement, the offset differential signal outputted from the output includes a first signal and a second signal; a difference between the second signal and the first signal proportionally varies with respect to the received input signal.

Abstract: A amplifier circuit in some embodiment includes a differential amplifier have a pair of current sources. Each of the current sources includes two or more current-generating transistors and respective switching transistors, which can be turned on and off by a gain input code to tune the gain of the amplifier. A common-mode controller includes a similar pair of current sources as the differential amplifier. The common mode controller receives a common-mode signal of the input signal and a common-mode gain input code, and maintains the common-mode gain of the amplifier circuit when the differential gain changes. The amplifier circuit is switchable between a buffer mode and an equalizer mode.

Abstract: Methods, circuits, and apparatuses that provide Buffer Amplifier, containing Amplifiers and Buffer Drivers, one or more of the following: ultra low power Buffer Amplifier, capable of having high gain, low noise, high speed, near rail-to-rail input-output voltage span, high sink-source current drive capability for an external load, and able to operate at low power supply voltages. Methods, circuits, and apparatuses that provide regulated cascode (RGC) current mirrors (CM) capable of operating at low power supply and having wide input-output voltage spans.

Abstract: An amplifier circuit having improved common mode rejection is provided. This can be achieved by estimating the common mode value of an input signal and using this to adjust a target common mode voltage at the output of the amplifier. This can help avoid the differential gain becoming modified by the common mode voltage.

Abstract: In a general aspect, a system can include a fully differential amplifier circuit that includes a first amplifier, and first and second feedback paths. The first feedback path can provide a feedback path from a positive output of the first amplifier to a negative input of the first amplifier. The second feedback path can provide a feedback path from a negative output of the first amplifier to a positive input of the first amplifier. The system can include a chopper clock circuit configured to output a variable duty cycle chopper clock signal. The system can include a common mode loop circuit including a second amplifier and chopper switches. The common mode loop circuit can be configured as a local feedback loop for the first amplifier. The chopper switches can be configured to receive the chopper clock signal and control current flow into the positive and negative inputs.

Abstract: The present disclosure provides systems and methods to provide a constant common mode voltage at the input terminals of a difference amplifier. A difference amplifier can receive an input signal and can deliver an amplified version of the received input signal at an output of the difference amplifier. In a system where a difference amplifier can receive an output of a digital-to-analog converter (DAC), the DAC performance can deteriorate in situations where common mode voltage at the input terminals of the difference amplifier are changing. A difference amplifier including feedback circuitry can provide a constant common mode voltage at the input terminals of the difference amplifier, leading to improved performance in a system where the difference amplifier receives an input signal from a DAC.

Abstract: A noised-reduced capacitive image sensor and a method operating the capacitive image sensor are provided. The capacitive image sensor includes: a number of capacitive sensing units forming an array, each capacitive sensing unit for transforming a distance between a portion of a surface of an approaching finger and a top surface thereof into an output electric potential, wherein a value of the output electric potential is changed by a driving signal applied to the sensing unit; at least one sample-and-hold circuit for capturing and retaining different output electric potentials; at least one signal conditioning circuit, each comprising at least one differential amplifier for amplifying a difference between two electric potentials retained by the sample-and-hold circuit; and a driving source, for providing the driving signal to the capacitive sensing units.

Abstract: A calibrated measurement circuit, with a first node, a second node, a circuit element coupled between the first node and the second node, and a reference circuit element. The calibrated measurement circuit also comprises circuitry for directing a first current and a second current between the first node and the second node and to the reference circuit element. The calibrated measurement circuit also comprises circuitry for measuring voltage across the circuit element in response to the first and second currents, and circuitry for measuring voltage across the reference circuit element in response to the first and second currents. A calibration factor is also determined for calibrating measured voltages across the circuit element, in response to a relationship between the first voltage, the second voltage, and the reference circuit element.

Abstract: A dynamic common reference input (CMRI) signal may be provided to an operational amplifier, or “op-amp,” in an amplifier system to reduce the common mode ripple of the fully-differential op-amp, while adding little or no noise in the amplifier system. The dynamic CMRI signal may be controlled such that a common-mode component of two amplifier input nodes of the operational amplifier is made approximately independent of two input signals received at two system input nodes of the amplifier system. An amplifier system with the dynamic CMRI may be used in class-D amplifiers, such as amplifiers for audio systems that generate output for headphones or speakers.

Abstract: A fully differential amplifier includes a first feedback resistance, a second feedback resistance, a first input resistance and a second input resistance. A first ratio of the first feedback resistance to the first input resistance is equalized with that of a reference ratio of a pair of reference resistances. Similarly a second ratio of the second feedback resistance to the second input resistance is also equalized with that of the reference ratio. Such equalization operations may be performed during a calibration phase prior to normal operation of the fully differential amplifier. Accordingly, when a common mode voltage present on each of the first output terminal and the second output terminal varies during normal operation, contribution of an erroneous differential signal component across the pair of differential output terminals is prevented.

Abstract: An apparatus includes a first amplifier having a first feedback resistance and an output configured to be coupled to a first input of a second amplifier having a second feedback resistance. The apparatus includes a third amplifier coupled to an input of the first amplifier and having an output configured to be coupled to a second input of the second amplifier.

Abstract: An amplifier may include a differential pair circuit configured to generate an output signal according to a first input signal and a second input signal, a plurality of current sinks coupled between a ground terminal and the differential pair circuit, and a feedback circuit configured to sense a level of the output signal and generate a feedback signal. At least one of the plurality of current sinks is controlled according to the feedback signal.

Abstract: The present disclosure describes variable gain amplifiers with gain-based compensation. In some embodiments, a variable gain amplifier (VGA) includes a gain stage, an output stage, a compensation stage, and a capacitor coupled between respective outputs of the gain stage and compensation stage. A gain of the VGA is configured, based on a gain setting, to amplify signals received by the variable gain amplifier. A gain of the compensation stage is configured, based on the gain setting, to alter an effective capacitance of the capacitor, which is applied to the output of the gain stage for compensation of the VGA. By altering the effective capacitance based on the gain setting of the VGA, compensation capacitance is adjusted continuously with changes in the gain setting and at a similar resolution. In various embodiments, the continuous adjustment of the compensation capacitance across different gain levels prevents discontinuities in amplifier compensation.

Abstract: A noised-reduced capacitive image sensor and a method operating the capacitive image sensor are provided. In order to generate a noise-reduced image of a fingerprint, the capacitive image sensor has an array of capacitive sensing units which each has a protective layer; a sensing electrode; a voltage follower; a comparative capacitor; and a bias voltage supply circuit. The comparative capacitor, a portion of the bias voltage supply circuit, and the voltage follower are formed in an isolated well which is configured in such a way that current is able to be prevented from flowing across an interface in the isolated well and surrounding structures. The driving source is connected to a bulk node of the isolated well such that well potential of the isolated well equals to the output electric potential of a driving source.