Abstract: In an automatic gain control circuit, a peak detection circuit detects and outputs the peak voltage of an output signal from a variable gain circuit. An average value detection/output amplitude setting circuit detects the average value voltage of an output signal from the variable gain circuit, and outputs a calculated voltage. An amplification circuit controls the gain of the variable gain circuit by amplifying the difference between the output voltages of the peak detection circuit and average value detection/output amplitude setting circuit. The number of base-emitter junctions of transistors on a path in the peak detection circuit from input ports which receive output signals from the variable gain circuit to an output port which outputs a voltage to the amplification circuit is equal to the number of base-emitter junctions of transistors on a path in the average value detection/output amplitude setting circuit.

Abstract: Devices and methods for correcting for start-up transients in integrated power amplifiers are disclosed. A delay element is arranged to produce a delay waveform signal that is responsive to an input voltage signal. A transconductance element has an input that receives the delay waveform signal and is arranged to provide an output boost current that is based on the delay waveform signal and a gain of the transconductance element. A reference element provides an output bias current that is responsive to a static reference current and the boost current. A bias element has an input that receives the bias current and is arranged to provide a bias control output. A power amplifier is responsive to the bias control output and is arranged to provide an amplified power output. In some examples, the boost current is adjusted based on a supply voltage and an input power of the power amplifier.

Abstract: According to one embodiment, provided are an amplifier transistor configured to amplify an input signal; a biasing circuit configured to set a bias voltage in such a manner as to allow the amplifier transistor to perform amplification; an electrostatic protective circuit configured to set the bias voltage for the amplifier transistor in such a manner as to make the amplifier transistor to turn off based on voltage to be applied to the amplifier transistor; and a switching circuit configured to switch the bias voltage for the amplifier transistor based on a power supply condition.

Abstract: In general, according to one embodiment, a power amplifier includes an envelope detector, a limiter, and a combiner. The envelope detector is configured to sense an envelope component of an input signal. The limiter includes a PMOS (Positive channel Metal Oxide Semiconductor) transistor and an NMOS (Negative channel Metal Oxide Semiconductor) transistor. The PMOS transistor is configured to sense a phase component of the input signal. The phase component has a second-order distortion controlled within a predetermined range with respect to the input signal. The NMOS transistor is configured to sense a phase component of the input signal. The phase component has the same second-order distortion as the phase component sensed by the PMOS transistor. The combiner is configured to combine the envelope component sensed by the envelope detector and the phase component sensed by the limiter to generate an output signal.

Abstract: According to one embodiment, a circuit for compensating fluctuation of a base current of a transistor is presented. The transistor has a base connected with an input terminal. The compensation circuit is provided with a first transistor, a current mirror circuit and a second transistor. The current mirror circuit mirrors a current which is supplied to a base of the first transistor. Further, the current mirror circuit supplies the obtained mirror current to the base of the transistor to be compensated. A base of the second transistor is connected with the input terminal electrically. The second transistor causes an early effect in the first transistor.

Abstract: The invention discloses a circuit and a method for reducing radio frequency power consumption of mobile phone, wherein a baseband processing chip (21) adjusts a base bias voltage and/or a collector bias voltage of a radio frequency power amplifier (23) according to radio frequency power output of the radio frequency power amplifier (23). Since the invention reduces the radio frequency output power of the radio frequency power amplifier (23) by moderately reducing the base bias voltage and/or the collector bias voltage at the same time when it is ensured that the mobile phone communicates with a base station normally and the linear index and the Adjacent Channel Power Ratio (ACPR) of the radio frequency power amplifier (23) meet the requirements of the specification, thus the efficiency of the radio frequency power amplifier can be improved, the battery energy is saved and the heating problem of the mobile phone is relieved.

Abstract: Methods and apparatus to control power in a printer are disclosed. An example apparatus includes a first field effect transistor having a first terminal, a second terminal, and a third terminal, the second terminal coupled with a first voltage input. The example apparatus further includes a second field effect transistor having a fourth terminal, a fifth terminal, and a sixth terminal, the fourth terminal coupled with the first terminal of the first field effect transistor, the fifth terminal coupled with a second voltage input. The example apparatus further includes a first comparator having a first input coupled to the first input voltage, having a second input coupled to the second input voltage, and having an output coupled with the third terminal.

Abstract: Circuits and techniques to linearize the operation of an RF power amplifier are described. A linearizer circuit may include a non-amplification signal path which includes a delay line and an amplification signal path which includes at least one amplifier stage. In some embodiments, the amplification signal path may include an odd number of amplification stages. The linearizer may be used to precondition an input signal of an RF power amplifier in a manner that improves the overall linearity of operation.

Abstract: This disclosure provides systems, apparatus, and methods for switching a portion of a power amplifier on and off during different modes of operation. In one aspect, a control circuit can include separate switches to provide bias currents to different portions of a power amplifier. The control circuit can include another switch to electrically connect outputs of the separate switches in a first mode of operation (for example, a high power mode) and electrically isolate the outputs of the separate switches in a second mode of operation (for example, a low power mode). In some implementations, a circuit element, such as a field effect transistor or a diode, can turn off one of the separate switches in the second mode. Alternatively or additionally, another circuit element, such as a field effect transistor or a diode, can prevent a power amplifier portion from turning on in the second mode.

Abstract: The embodiments of the present invention disclose a high power-supply rejection ratio (PSRR) amplifier circuit. The amplifier circuit comprises a low dropout regulator, a negative charge pump and an amplifier. The output voltages of the negative charge pump and the low dropout regulators don't track the change of input voltage. Therefore the amplifier circuit has high PSRR.

Abstract: There is provided a power amplifying apparatus with dual-current control mode, including: a transistor mirror circuit adjusting currents respectively flowing through a main path and a mirror path connected in parallel to a power source terminal; a resistor mirror circuit adjusting the respective currents of the main path and the mirror path; a current controlling unit controlling a control current flowing through the main path with a pre-set constant current; a voltage adjusting unit providing a bias adjustment signal that corresponds to a difference voltage between a first voltage of a first node on the main path to which a current is output from the resistor mirror circuit and a second voltage of a second node on the mirror path to which a current is output from the resistor mirror circuit; and a bias circuit unit adjusting a bias of a power amplifying unit.

Abstract: An amplifier circuit includes a power amplifier configured to amplify an RF input signal to obtain an RF output signal, and a bias controller configured to control a bias of the power amplifier. The bias controller is configured to determine a measure of a load impedance of a load coupled to an output of the power amplifier and provide a bias control signal to adjust the bias of the power amplifier based on the determination of the measure of the load impedance.

Abstract: The invention relates to a compressor and method for amplifying an input signal with a controlled gain. An output signal representing the input signal is amplified by an initial gain and a signal level of the input signal or of the output signal is compared with a threshold level. If the signal level is below the threshold level, the initial gain value is updated using an adaptive control characteristic, and if the signal level is above the threshold level, the initial gain value is updated using a fixed control characteristic or an adaptive control characteristic respectively. The adaptive control characteristic is dependent on the signal level and the fixed control characteristic is independent from the signal level.

Abstract: A system and method improve amplifier efficiency of operation relative to that of an amplifying transistor with a fixed bias current. A power level representing a level of transmission power from an amplifier circuit and an indicator of amplifier circuit operation are provided. The indicator is at least one of channel, channel bandwidth, out-of band spectral requirements, spectral mask requirements, error vector magnitude, modulation rate, and modulation type. The amplifying transistor is biased with a bias current that is determined based at least in part on the power level and the indication where the bias current is different for channels at an edge of a channel band than for channels nearer a center of the channel band.

Abstract: In an amplifier with pass-through mode of the present invention, in a pass-through mode, a signal transmission transistor and a bias control transistor are turned ON and a voltage of an output terminal is maintained in a ground potential via the bias control transistor and a resistor. Thus, a power supply voltage is applied to a control terminal of the signal transmission transistor and one main terminal of the signal transmission transistor is maintained in a ground potential. Therefore, an ON-resistance of the signal transmission transistor is decreased to a minimum level.

Abstract: The present invention provides a single chain power amplifier for a multi-mode and/or multi band wireless communication. The power amplifier comprise switchable input, inter-stage and output matching networks as well as active periphery adjustable driver stage power device and power stage power device. Switches and bias are configured for each frequency band and/or wireless communication standard. A driver stage power device, switches, control and bias circuitry, input matching, inter-stage matching and a part of output matching is fabricated on CMOS Silicon On Insulator process (SOI), while a power stage power device maybe fabricated by Gallium Arsenide (GaAs) processing.

Abstract: An oscillator having: (A) a transistor for producing an oscillating output signal at an output electrode of the transistor. The oscillator includes; (B) a bias circuit for producing a bias signal for the transistor, said bias circuit including an amplifier coupled to the output electrode of the transistor; and (C) a circuit coupled between an output of the amplifier and a control electrode of the transistor, for isolating the bias signal provided by the amplifier from the oscillating signal.

Abstract: There is provided a power amplifier which may suppress fluctuations in a phase of an output signal in accordance with fluctuations in a level of an input signal by varying an impedance between a signal input terminal and an amplification unit in accordance with a power level of an input signal. The power amplifier includes a bias voltage generation unit generating a bias voltage set in accordance with a power level of an input signal, an amplification unit amplifying the power level of the input signal in accordance with the bias voltage, and an impedance variation unit varying an impedance of a signal transmission path through which the input signal is transmitted to the amplification unit in accordance with the bias voltage.

Abstract: A power amplifier includes: an amplifying element having a base into which input signals are inputted, a collector to which a collector voltage is applied, and an emitter; and a bias circuit supplying a bias current to the base of the amplifying element. The bias circuit includes a bias current lowering circuit which lowers the bias current when the collector voltage is lower than a prescribed threshold value.

Abstract: This document discusses, among other things, a system and method for receiving an input signal and power supply information, and amplifying the input signal by a gain value determined as a function of the power supply information.

Abstract: A power amplifier system is provided with a signal path including driver stages and output stages. A power control element has one or more control ports and uses one or more nonlinear control characteristics.

Abstract: A power control circuit for regulating an output voltage applied to a radio frequency power amplifier. The power control circuit includes an amplifier, a pass transistor and one or more saturation detectors. An input ramp voltage having a magnitude equal to a first voltage level is applied to a negative terminal of the amplifier. The pass transistor provides an output voltage at a drain terminal of the pass transistor. The saturation detector detects a magnitude of a voltage at a gate terminal of the pass transistor and generates a control current based on the magnitude of the voltage at the gate terminal of the pass transistor. The voltage regulating circuit reduces the magnitude of the input ramp voltage from the first voltage level to a third voltage level based on the control current.

Abstract: An amplifier arrangement with an amplifier arrangement input and an amplifier arrangement output is disclosed. The amplifier arrangement comprises a first transistor and a first ballast resistance, wherein the first ballast resistance connects a first transistor base of the first transistor to a common base terminal at least one second transistor and at least one second ballast resistance, wherein the at least one second ballast resistance connects a second transistor base of the at least second transistor to the common base terminal; and a feedback device comprising a feedback input terminal for sensing at least a base voltage of the first transistor and further comprising a feedback output terminal that is connected to the common base terminal.

Abstract: A calculating apparatus includes a first state variable calculating unit that calculates first state variables respectively having a memory effect and being of an amplifier that causes signal distortion; an amplifier model unit that based on the calculated first state variables, calculates the signal distortion caused by the amplifier, as a distortion characteristic; and an output unit that outputs the calculated distortion characteristic.

Abstract: A method is disclosed wherein a power level indicating a level of transmission power from an amplifier is provided. An indication of at least one of channel, channel bandwidth, OOB spectral requirements, spectral mask requirements, EVM, modulation rate, and modulation type is also provided. A control signal for controlling one of a bias current provided to the amplifier and a matching circuit for matching an output port of at least a stage of the amplifier is generated, the control signal determined in dependence upon the power level and the at least an indication. Then the one of the bias current and the matching circuit is adjusted in accordance with the control signal.

Abstract: Systems, methods and apparatus are disclosed for amplifiers for wireless power transfer. In one aspect a method is provided for controlling operation of an amplifier, such as a class E amplifier. The method may include monitoring an output of the amplifier. The method may further include adjusting a timing of an enabling switch of the amplifier based on the output of the amplifier.

Abstract: Systems and methods may include an amplifier having at least a first input port, where the amplifier includes a first capacitance associated with the first input port; a first bias circuit, where the first bias circuit comprises a series connection of a first charging circuit and a first discharging circuit, wherein a first node between the first charging circuit and the first discharging circuit is connected to the first input port, wherein responsive to an RF input signal having at least a first predetermined level being received at the first input port, the first charging circuit charges the first capacitance associated with the first input port during a first portion of a cycle of the RF input signal, and discharges the first capacitance associated with the first input port during a second portion of the cycle, thereby controlling a DC bias voltage level available at the first input port.

Abstract: A high frequency circuit and a high frequency module are provided, in which the accuracy of compensation operation is improved in compensating by digital control. The amplification gain of an amplification element of an amplifier unit is controlled by a bias current of a bias control unit. A process monitoring circuit of a calibration circuit includes a first and a second element characteristic detector and a voltage comparator. The detectors convert the current of replica elements into a first and a second detection voltage. The voltage comparator compares a first and a second detection voltage and supplies a comparison output signal to a search control unit. Responding to the comparison output signal of the comparator and a clock signal of a clock generating unit, the controller generates a multi-bit digital compensation value according to a predetermined search algorithm, and the bias control unit of the second detector is feedback-controlled.

Abstract: A power amplifier includes an input matching circuit, an amplifier transistor for amplifying an input signal received through the input matching circuit, an element for varying the collector voltage of the amplifier transistor, a bias circuit for varying the idle current in the amplifier transistor, and a compensation circuit for varying capacitance of the input matching circuit to maintain the phase shift and the input reflection in the power amplifier constant when the collector voltage and the idle current are varied, to prevent a decrease in the efficiency of the power amplifier due to changes in the output power of the amplifier transistor.

Abstract: A power amplifier using a drain (collector) power control loop in which the feedback signal is an estimated output power level computed with a linear summation of the output sensed voltage and current. Both RF and baseband voltage and current sensing are possible, and voltage-mode or current-mode signal processing are feasible. This control loop technique is applicable to any means of drain power control circuits such as: supply regulators, DC-DC converters and others. Voltage error amplifiers can be used in conjunction with voltage feedback network, while current error amplifiers can be used with current feedback networks. Regulator sharing between different bands may be used as an area and cost reduction solution. The linear voltage and current summation driven power control technique can be also applied to the gate (base) power control scheme. Similarly, voltage-mode and current-mode signal processing can be implemented.

Abstract: An upstream amplifier is integrated on a substrate with a digital-to-analog converter (DAC) to form an integrated circuit. In an embodiment, a low-pass filter is also integrated on the substrate. The output signal level of the upstream amplifier is controllable. In embodiments, fine adjustments are made to the output signal level of the upstream amplifier by varying a bias current of the DAC. A software control bit is used to switch between a power-on mode of operation and a power-down mode of operation. The upstream amplifier transmits in a burst mode. The power consumption of the upstream amplifier scales with the amplifier's output signal level. A high degree of matching is attained between the positive and negative paths of the upstream amplifier. This provides high immunity from common-mode disturbances such as substrate noise, clock spurs, and glitches caused by a gain change.

Abstract: A feedback gate bias circuit for use in radio frequency amplifiers to more effectively control operation of LDFET, GaNFET, GaAsFET, and JFET type transistors used in such circuits. A transistor gate bias circuit that senses drain current and automatically adjusts or biases the gate voltage to maintain drain current independently of temperature, time, input drive, frequency, as well as from device to device variations. Additional circuits to provide temperature compensation, RF power monitoring and drain current control, RF output power leveler, high power gain block, and optional digital control of various functions. A gate bias circuit including a bias sequencer and negative voltage deriver for operation of N-channel depletion mode devices.

Abstract: A relationship is established between measurable characteristics of the DC power input to a power amplifier and the RF output power level. A power circuit is configured to measure the input supply current to the power amplifier and to utilize the relationship between the input supply current and the applied input supply voltage to the output power level, thereby normalizing the output power of an amplified communication signal.

Abstract: A power amplification circuit includes a power amplifier, an RF detector, an error amplifier, a saturation detector, and an offset circuit. The power amplifier provides an amplified signal based on an input signal and a gain control signal. The RF detector provides a detection signal indicative of a logarithm of the power of the amplified signal. The error amplifier provides the gain control signal based on an amplification control signal and the detection signal. The saturation detector provides a saturation signal in response to the gain control signal differing from a reference signal by less than a first predetermined voltage. The offset circuit decreases a voltage level of the amplification control signal by up to a second predetermined voltage in response to the saturation signal and the amplification control signal differing from the detection signal by less than the second predetermined voltage.

Abstract: The present invention is directed to a self-adjusting gate bias network for field effect transistors in radio frequency applications. A bias network for field effect transistors is provided comprising a field effect transistor having a source electrode connected to ground and a drain electrode connected to a load; a radio frequency network connected to the gate electrode; a gate bias network connected to the gate electrode; wherein a device having a non-linear characteristic is provided in series between the gate electrode and the gate bias network such that a forward bias current at the gate electrode of the field effect transistor is reduced or prevented. The reduction or prevention of a forward bias current leads in overdrive conditions to a self-adjustment of the bias point of the field-effect transistor improving the reduction of distortions of an amplifier or changing the class of oscillators connected to the gate electrode.

Abstract: The present disclosure relates to RF power amplifier circuitry that may operate as either a Class AB amplifier or as a Class B amplifier based on a magnitude of RF output power provided by the RF power amplifier circuitry. A transistor bias circuit in the RF power amplifier circuitry may control transitioning between operating as the Class AB amplifier and operating as the Class B amplifier. When the magnitude of the RF output power is below a first threshold, the RF power amplifier circuitry may operate as a Class AB amplifier, and when the magnitude of the RF output power is above the first threshold, the RF power amplifier circuitry may operate as a Class B amplifier.

Abstract: Apparatus and methods for biasing a power amplifier are disclosed. In one embodiment, a method of biasing a power amplifier includes shaping an enable signal using a time-dependent signal generator to generate a control current, amplifying the control current using a current amplifier to generate a correction current, and generating a bias current for a power amplifier using a primary biasing circuit. The primary biasing circuit is configured to use the correction current to correct for a variation in gain of the power amplifier when the power amplifier is enabled.

Abstract: A power control system includes a transmitter having a plurality of gain-adjustable elements, a switchable attenuator located at an output of the transmitter, a gain-adjustable power amplifier coupled to the attenuator, and a power control element responsive to a power target signal, the power control element configured to calculate and apply a gain control signal to the plurality of gain-adjustable elements in the transmitter, to the switchable attenuator, and to the gain-adjustable power amplifier so that a signal to noise ratio (SNR) at the output of the transmitter remains substantially constant over a range of output power.

Abstract: A power amplifying apparatus according to an embodiment includes a first amplifying unit having a first amplifying element to amplify an input signal, a second amplifying unit having a second amplifying element to amplify an output signal from the first amplifying unit; and a bias supply unit giving bias values to the first amplifying element and the second amplifying element, respectively, the bias values causing the first amplifying element and the second amplifying element to operate in a non-linear region.

Abstract: A low-noise amplifier (LNA) includes a first cascode gain stage coupled to an input node for increasing an amplitude of an RF input signal. A first variable gain network is coupled to the first cascode gain stage and includes a first inductor for boosting a gain of the first cascode gain stage, a first capacitor coupled to the first inductor for blocking a direct current (DC) voltage, and a first switch coupled to the first inductor and to the first capacitor. The first switch is configured to selectively couple the first inductor to the first cascode gain stage in response to a first control signal.

Abstract: In an amplifying device, an amplification unit includes a first amplifier which amplifies a signal and a second amplifier which amplifies a signal when the signal has a predetermined level or more. A detector detects a temperature change. A calculation unit calculates an adjacent channel leakage power ratio of an output signal output from the amplification unit based on detection of the temperature change of the detector. A controller controls gate biases of the first and second amplifiers based on the adjacent channel leakage power ratio calculated by the calculation unit.

Abstract: There is provided a power amplifying apparatus including: a power amplifier; a power regulator providing a driving voltage and a driving current corresponding to a control voltage to the power amplifier; a current sensing unit sensing a current and a voltage corresponding to the driving current and controlling the driving voltage according to the sensed current; a current control unit controlling a current bias according to the sensed voltage of the current sensing unit; and a current bias circuit unit controlling a bias current of the power amplifier according to the controlling of the current control unit.

Abstract: A power supply controller controls the power supply voltage provided to a multi-gain step RF power amplifier to increase the efficiency of the RF power amplifier when the different gains of the RF power amplifier are selected and, thereby, reduce the power consumed by the multi-gain step RF power amplifier.

Abstract: Techniques for providing multiple power supplies in electronic devices are disclosed. According to one aspect of the present invention, an appropriate power supply is provided only to accommodate a volume setting. In other words, there are at least two power supplies, one with a low voltage and the other with a high voltage. The high voltage power supply is only applied when there is a need to accommodate a volume setting. Thus the power consumption of the amplifiers is well controlled. As a result, the designs of the device and heat dissipation therein can be simplified and lowered in cost.

Abstract: An improved method and apparatus for managing an application of power with a power generator to a load, the apparatus comprising a power generator configured to apply power to the load; a controller coupled to the power generator, the controller configured to control a plurality of parameters to optimize operational performance of the power system in response to indicia of operational performance of the power system; and a performance assessor, coupled to the power generator and coupled to the controller, the performance assessor configured to provide the indicia of operational performance of the power system to the controller, where the indicia of the operational performance are relative to a plurality of metrics indicative of operational efficiency of the power system.

Abstract: A system and method are provided for reducing dynamic EVM of an integrated circuit power amplifier (PA) used for RF communication. In a multistage PA, the largest amplification stage is biased with a high amplitude current pulse upon receipt of a Tx enable, before receipt of the RF signal data burst. The high amplitude current pulse causes a large portion of the total ICQ budget of the multistage PA to pass through the largest amplification stage causing the entire integrated circuit to rapidly approach steady-state operating conditions. A smoothing bias current is applied to the largest amplification stage after the pulse decays to compensate for transient bias current levels while standard bias circuitry is still approaching steady-state temperature.

Abstract: A variable gain amplifier includes a direct current (DC) blocking capacitor which receives an input signal at a first terminal, a variable amplifier unit, having a variable transistor size, which amplifies an output of a second terminal of the DC blocking capacitor, a load impedance unit coupled to an output of the variable amplifier unit, a bias resistor having a first terminal coupled to the second terminal of the DC blocking capacitor, a variable bias voltage generator which applies a variable bias voltage to a second terminal of the bias resistor, and a gain controller which provides control to decrease the variable bias voltage when an effective transistor size of the variable amplifier unit is controlled so as to increase, and provides control to increase the variable bias voltage when the effective transistor size of the variable amplifier unit control is controlled so as to decrease.

Abstract: A radiofrequency signal power amplification circuit may include a signal input for receiving the radiofrequency signal, an amplification stage coupled to the signal input and having at least one power transistor, a biasing stage for delivering a bias voltage to the amplification stage, and a processing stage. The processing stage may include a processing input coupled to the signal input, a processing output for delivering a bias current modulated at least in amplitude to the biasing stage, and an amplitude modulator coupled between the processing input and the processing output and configured to determine an envelope signal representative of the envelope of the radiofrequency signal, for modulating the amplitude of the envelope signal based on a variable voltage setpoint and for generating the amplitude-modulated bias current based on the modulated envelope signal.

Abstract: Aspects of a method and system for transmitter linearization are provided. A signal may be amplified via one or more circuits comprising a first transistor having a first bias voltage applied to its gate via a resistor, and a second transistor having its source coupled to a first terminal of the resistor, its drain coupled to a second terminal of the resistor, and its gate coupled to a second bias voltage. The signal may be AC-coupled, via one or more capacitors, for example, to the gate of the first transistor. The first bias voltage and the second bias voltage may be such that the first transistor operates in the active region the second transistor operates in the subthreshold region. The effective channel width of the second transistor may be configurable during operation of the one or more circuits.

Abstract: A power amplifier comprises: an amplifier transistor; a bias circuit supplying bias current to the amplifier transistor; and a collector voltage terminal connected to a collector of the amplifier transistor. The bias circuit includes: a reference voltage terminal into which a reference voltage is input; a power terminal connected to a power source; a transistor having a control terminal connected to the reference voltage terminal, a first terminal connected to the power terminal, and a second terminal that is grounded. The transistor supplies a bias current corresponding to the reference voltage to the amplifier transistor; a variable capacitor connected between the first terminal and a grounding point; and a logic circuit controlling capacitance of the variable capacitor.