Abstract: A transistor cell can be modeled as a transistor with a collector, a base, and an emitter operating with a current at the collector to produce a minimum transconductance in the transistor cell that increases a current gain and improves at least one operating characteristic of the transistor cell. The operating characteristics include bandwidth, gain, and output power.

Abstract: Multimode power amplifier bias circuit with selectable bandwidth. In some embodiments, a bias circuit for a power amplifier can include a first bipolar junction transistor (BJT) configured to pass a reference current. The first BJT can be coupled with a second BJT that performs at least some amplification for the power amplifier. The first and second BJTs can be configured as a current mirror. The bias circuit can further include a coupling circuit that couples the collector and the base of the first BJT. The coupling circuit can include a switchable element to allow the coupling circuit to be in a first state or a second state. The first state can be configured to yield a first bandwidth for the bias circuit, and the second state can be configured to yield a second bandwidth for the bias circuit.

Abstract: A calibration solution for a power amplifier array comprising a plurality of amplifier cells is presented that improves the linearity and efficiency of the power amplifier, especially when only a small number of the amplifier cells are active. To that end, a bias control word is selected from a predetermined bias table for each of the active power amplifier cells. An average of the selected bias control words is then used to bias an input stage of each active power amplifier cell. The solution presented herein provides techniques for determining the bias control words, as well as using the bias control words.

Abstract: A circuit includes a front-end circuit, a receiver stage and a controller. An example front-end circuit includes a common base input device, a first current mirror and a second current mirror, where the common base input device has its emitter coupled to a photodiode, its collector coupled to an input of the first current mirror, and its base coupled to a reference voltage to reverse bias the photodiode and where an output of the first current mirror is input into the second current mirror. In another example, a voltage drop resistor is coupled to a cancellation signal output of the first current mirror and an operational transimpedance amplifier (OTA) has inputs coupled to the voltage drop resistor and to a reference voltage and an output coupled to a compensating impedance and to a control input of a variable current source designed to feed the emitter signal input.

Abstract: Embodiments of the invention generally provide an device that regulates a negative output voltage from a power supply using a positive representation of the negative output voltage. To convert the negative voltage to a positive voltage, the device changes the negative voltage into a current using, for example, a current generator that outputs a current corresponding to the negative voltage received from the power supply. This current is then transferred from the negative voltage domain to the positive voltage domain and is fed through a voltage generator that outputs a positive voltage corresponding to the current. By doing so, the negative voltage output is transformed into a corresponding positive voltage. This positive voltage may then be compared to a positive reference voltage to determine an error signal for adjusting the power supply.

Abstract: A power amplifying module includes a radio frequency amplifying circuit including an amplifying circuit configured to amplify an input signal and output an amplified signal, and a bias circuit of an emitter-follower type configured to bias the amplifying circuit to an operating point, and a constant voltage generating circuit configured to generate, from a first reference voltage, a first constant voltage applied to a base side of a transistor of the bias circuit and a second constant voltage applied to a collector side of the transistor.

Abstract: An AC-inverting amplifier for a waveform conversion circuit includes a first MOS transistor of a first conductivity type having a gate that receives an input signal, a drain that provides an inverted amplified output signal, and a source coupled to a first power supply voltage. A current source provides a first bias current and a second bias current in proportion to the first bias current. The second bias current is coupled to the drain of the first MOS transistor to bias the first MOS transistor. The first bias current has a magnitude that is determined by a DC voltage applied at the gate of the first MOS transistor.

Abstract: A power amplifier includes: a first transistor having a gate, a drain, and a source that is grounded; a second transistor having a gate, a drain, and a source that is connected to the drain of the first transistor; a capacitor connected between the gate of the second transistor and a grounding point; an idling current control circuit having a positive temperature coefficient and making an idling current flowing through the first transistor proportional to an ambient temperature; and a drain voltage control circuit having a positive temperature coefficient and making a drain voltage on the first transistor proportional to the ambient temperature.

Abstract: A voltage regulator includes a current bridge and first and second current paths coupling a current mirror to respective first and second voltage-to-current converters. The current mirror controls a second current dependent on a first current. The first voltage-to-current converter controls the first current dependent on either a reference voltage or a feedback voltage derived from the regulator's output voltage, and the second voltage-to-current converter controls the second current dependent on the other of the feedback and reference voltages. Voltage-to-current conversion by the first converter is independent of voltage-to-current conversion by the second converter. An output transistor stage coupled to the second current path controls the output voltage dependent on the voltage in the second current path indicative of a deviation of the second current from a target current value dependent on the reference voltage.

Abstract: A series of current repeaters with localized feedback is provided. Each current that precedes a subsequent current repeater in the series is configured to receive a feedback current from the subsequent current repeater and generate an error signal accordingly with a differential amplifier so as to reduce current repetition errors that would otherwise result from an offset voltage in the differential amplifier.

Abstract: Techniques for monitoring and controlling bias current of amplifiers are described. In an exemplary design, an apparatus may include an amplifier and a bias circuit. The amplifier may include at least one transistor coupled to an inductor. The bias circuit may generate at least one bias voltage for the at least one transistor in the amplifier to obtain a target bias current for the amplifier. The bias circuit may generate the at least one bias voltage based on a voltage across the inductor in the amplifier, or a current through a current mirror formed with one of the at least one transistor in the amplifier, or a gate-to-source voltage of one of the at least one transistor in the amplifier, or a voltage in a replica circuit replicating the amplifier, or a current applied to the amplifier with a switched mode power supply disabled.

Abstract: A device includes a low noise amplifier (LNA) for amplifying an input signal, with the LNA including a first transistor configured to receive the input signal, a second transistor configured to receive a bias current and forming a current mirror for the first transistor, and an operational amplifier (op amp) operative to generate a bias voltage for the first and second transistors to match operating points of the first and second transistors.

Abstract: In one embodiment, a current amplifier circuit includes a first transistor, a first resistor, a second transistor, a second resistor, a first passive element, and a control circuit. The first transistor has a first terminal, a second terminal, and a control terminal. The first resistor has one end connected to the first terminal of the first transistor. The second transistor has a first terminal, a second terminal, and a control terminal. The second resistor has one end connected to the first terminal of the second transistor. The first passive element is connected between the first terminals of the first transistor and the second transistor. The control circuit controls at least one of voltage at the control terminals of the first transistor and the second transistor such that the voltage at the other end of the first resistor becomes equal to the voltage at the other end of the second resistor.

Abstract: A system for pre-charging a current minor includes a controller configured to provide a first current and an additional current to a current minor to rapidly charge a capacitance associated with the current minor based on a reference voltage or control signals. A power amplifier module includes at least one current minor and a controller. A capacitor is coupled to the current minor. The controller provides a bias current in an amount proportional to an input to a voltage-to-current converter. The controller receives a control signal that directs the controller to apply one of a pre-charge voltage and a nominal voltage to the voltage-to-current converter.

Abstract: Some embodiments of the system comprise a current mirror with two switches (a first switch and a second switch) and two compensation circuits (a first compensation circuit and a second compensation circuit). In one embodiment, the first compensation circuit adjusts a drain voltage of the second switch based on a drain voltage of the first switch, and the second compensation circuit adjusts a current through the first switch based on the drain voltage of the second switch.

Abstract: Circuits and methods to reduce the size of output capacitors of LDOs or amplifiers are disclosed. Nonlinear mirroring of the load current allows scaling of gain or adapting small signal impedance of a pass transistor depending on other inputs, in case of a preferred embodiment, allows to reduce small signal impedance at the gate of the pass transistor as the load current increases, hence allowing to reduce the size of an output capacitor without compromising stability of the system.

Abstract: Various embodiments provide a bias circuit for a radio frequency (RF) power amplifier (PA) to provide a direct current (DC) bias voltage, with bias boosting, to the RF PA. The bias circuit may include a bias transistor that forms a current mirror with an amplifier transistor of the RF PA. The bias circuit may further include a first resistor coupled between the gate terminal and the drain terminal of the bias transistor to block RF signals from the gate terminal of the bias transistor. The bias circuit may further include a second resistor coupled between the drain terminal of the bias transistor and the RF PA (e.g., the gate terminal of the amplifier transistor). An amount of bias boosting of the DC bias voltage provided by the bias circuit may be based on an impedance value of the second resistor.

Abstract: An AC-inverting amplifier for a waveform conversion circuit includes a first MOS transistor of a first conductivity type having a gate that receives an input signal, a drain that provides an inverted amplified output signal, and a source coupled to a first power supply voltage. A current source provides a first bias current and a second bias current in proportion to the first bias current. The second bias current is coupled to the drain of the first MOS transistor to bias the first MOS transistor. The first bias current has a magnitude that is determined by a DC voltage applied at the gate of the first MOS transistor.

Abstract: A plurality of transistors in which ratios of a channel length L to a channel width W, ?=W/L, are different from each other is provided in parallel as output side transistors 105a to 105c in a current mirror circuit 101 which amplifies a photocurrent of a photoelectric conversion device and an internal resistor is connected to each of the output side transistors 105a to 105c in series. The sum of currents which flow through the plurality of transistors and the internal resistor is output, whereby a transistor with large amount of ? can be driven in a linear range with low illuminance, and a transistor with small amount of ? can be driven in a linear range with high illuminance, so that applicable illuminance range of the photoelectric conversion device can be widened.

Abstract: Some embodiments of the system comprise a current mirror with two switches (a first switch and a second switch) and two compensation circuits (a first compensation circuit and a second compensation circuit). In one embodiment, the first compensation circuit adjusts a drain voltage of the second switch based on a drain voltage of the first switch, and the second compensation circuit adjusts a current through the first switch based on the drain voltage of the second switch.

Abstract: Apparatus and methods for reducing load-induced non-linearity in amplifiers are provided. In certain implementations, an amplifier includes a current mirror, a buffer circuit, and an output stage. The buffer circuit can have a relatively high current gain and a voltage gain about equal to 1. The buffer circuit can amplify a mirrored current generated by the current mirror and provide the amplified mirrored current to the output stage, thereby helping to balance or equalize currents in the current mirror and avoiding the impact of load-induced offset error.

Abstract: A current-voltage converter with a current reflector, for which the input current includes a fixed component and a variable component, includes an input for the current to be converted, an output for the converted voltage, two constant current sources each connected between the output and a respective reference voltage, at least one MOSFET transistor mounted in series with each constant current source, and a resistor for converting the current into a voltage, arranged between the output and ground. The gate of each MOSFET transistor is connected to one of the reference voltages. The input for the current to be converted is connected to the output through one of the MOSFET transistors. The converted further includes, for each MOSFET transistor, means for re-injecting into at least one of the current sources, a current equal to the current absorbed in the gates of the MOSFET transistors.

Abstract: A high dynamic range precision variable amplitude controller includes a gain portion configured to apply a controllable amount of amplitude adjustment to an input signal. The gain portion includes two or more amplification stages each amplification stage having branches that are cross-coupled with branches of the other amplification stage. A control portion controls the current supply to the two or more amplification stages to control the amount of amplitude adjustment by the gain portion. The amplitude controller also includes a load portion that provides balanced impedances to the cross-coupled branches of the amplification stages throughout the amplitude control range.

Abstract: An optical transceiver and/or optical network, and methods of monitoring optical transceivers, may be useful for increasing the dynamic range and/or determining the received signal strength and/or link budget of the optical transceiver and/or a different optical transceiver in the optical network. The circuitry generally comprises a photodiode configured to generate a first current responsive to an optical signal, a current mirror configured to produce a second current equal or proportional to the first current, and a nonlinear element configured to produce a first voltage from the first current.

Abstract: The invention provides a semiconductor integrated circuit device and a high-frequency power amplifier module capable of reducing variations in the transmission power characteristics. The semiconductor integrated circuit device and the high-frequency power amplifier module each include, for example, a bandgap reference circuit, a regulator circuit, and a reference-voltage correction circuit which is provided between the bandgap reference circuit and the regulator circuit and which includes a unity gain buffer. The reference-voltage correction circuit corrects variations in a bandgap voltage from the bandgap reference circuit. The reference-voltage correction circuit includes first to third resistance paths having mutually different resistance values, and corrects the variations by selectively supplying a current which reflects an output voltage of the unity gain buffer to any one of the first to third resistance paths.

Abstract: Embodiments relate to systems and methods for image lag mitigation for a buffered direct injection readout circuit with current mirror. A photo detector device is coupled to a buffered direct injection (BDI) circuit, in which an operational amplifier and other elements communicate the output signal from the detector to subsequent stages. The BDI output is transmitted to a first current mirror, which can be implemented as a Säckinger current mirror. The first current mirror is coupled to a second current mirror, one of whose outputs is a fixed bias current. Image lag can be controlled by the fixed bias current, rather than the photocurrent produced directly by the optical detector. In aspects, the negative feedback provided by the first current mirror can increase the modulation of the second current mirror. This gain factor can reduce image lag to a significantly lower point than the lag experienced by known BDI-current-modulated readout circuitry without Säckinger current mirror.

Abstract: A current mirror includes a bias branch, which includes first and second transistors in series between a voltage source and ground, a voltage divider coupled between the voltage source and ground, an op-amp configured to receive a divided voltage of the voltage divider and a voltage of a node between the first and second transistors, and drive a gate of the second transistor to pull the node to the divided voltage. The current mirror further includes a power amplifier core coupled to the bias branch. The power amplifier core includes first and second drive transistors configured in series between the voltage source and ground. Gates of the first transistor and the first drive transistor are coupled, and gates of the second transistor and the second drive transistor are coupled.

Abstract: A current mirror circuit having formed in a semiconductor: a pair of transistors arranged to produce an output current through an output one of the transistors proportional to a reference current fed to an input one of the pair of transistors; a resistor comprising a pair of spaced electrodes in ohmic contact with the semiconductor, one of such pair of electrodes of the resistor being coupled to the input one of the pair of transistors; and circuitry for producing a voltage across the pair of electrodes of the resistor, such circuitry placing the resistor into saturation producing current through a region in the semiconductor between the pair of spaced ohmic contacts, such produced current being fed to the input one of the transistors as the reference current for the current mirror.

Abstract: There is described an amplification stage comprising: a current mirror circuit comprising a reference transistor arranged to receive a current associated with an input signal and an output transistor providing a current source for an output signal line; a current sink to the output signal line, under the control of the input signal; circuitry arranged to maintain equality between the drain/collector voltages on the transistors of the current mirror circuit.

Abstract: Circuits are disclosed that may include a plurality of transistors having controllable current paths coupled between at least a first and second node, the transistors configured to generate an analog electrical output signal in response to an analog input value; wherein at least one of the transistors has a deeply depleted channel formed below its gate that includes a substantially undoped channel region formed over a relatively highly doped screen layer formed over a doped body region.

Abstract: Techniques for designing a transconductor configurable to have a low transconductance. In one aspect, a voltage to current conversion module is coupled to a 1:N current replication module. The voltage to current conversion module may be implemented as an operational amplifier configured with negative feedback to generate a current through a transistor, wherein such current is proportional to the difference between an input voltage and a common-mode reference. The 1:N current replication module is configured to mirror the generated current in another transistor, to a predetermined ratio, such that the output current is also proportional to the difference between the input voltage and the common-mode reference. In exemplary embodiments, the output stage driving the output current may be configured to operate as a Class A, Class B, or Class AB type amplifier.

Abstract: A high-frequency amplifier module includes a driver-stage amplifier 3 that amplifies an RF signal input thereto from an RF input terminal 1, and a final-stage amplifier 5 that amplifies the signal amplified by the driver-stage amplifier 3 and outputs the signal after the amplification to an RF output terminal 7. The driver-stage amplifier 3 is fabricated on a silicon substrate 11, while the final-stage amplifier 5 is fabricated on a gallium arsenide substrate. This configuration downsizes the cost while maintaining a high-frequency characteristic comparable to that in the case where all components of an entire module are fabricated on a gallium arsenide substrate 71.

Abstract: A low-noise amplifier with high linearity has two common source FET amplifying stages, where the amplifier performance is linearized by use of a second stage active biasing circuit including a current mirror with a feedback network. The linearity improvement technique is employed on a 0.5-2 GHz flat gain amplifier. The improvement causes nodegradation to other RF parameters and allows for the amplifier circuit to be realized in a gallium arsenide microwave monolithic integrated circuit.

Abstract: An amplifier for an integrated circuit has a plurality of ratioed current mirrors connected to each other in a stacked configuration. Each ratio mirror has at least two resistors and at least two bipolar transistors connected to each other via said at least two resistors. Each amplifying transistor, contains a capacitor, and potentially and inductor, to internally match the transistors that make up the amplifying stack. DC, harmonic and s-parameter simulations are performed to provide an optimal impedance for each of the stacked transistors to maximize the RF power output of each stacked layer and the amplifier.

Abstract: A radio frequency (RF) power amplifier is disclosed. The power amplifier includes an output stage circuit, an exponential type bias circuit and a voltage-current transformation circuit. The output stage circuit receives a first system voltage and outputs an output current. The exponential type bias circuit receives a bias current, wherein a relationship between the bias current and output current is exponential, and when the bias current is zero current, and the output current is zero current. The voltage-current transformation circuit transforms the first system voltage into a second current so that the bias current is in proportion to the first system voltage, and thus the relationship between the output current and the first system voltage is exponential. The bias current is equal to times of the sum of the first current and the second current.

Abstract: A circuit and a method for correcting an offset is provided that includes a current amplifier and an adjusting circuit for correcting an offset of an output current of the current amplifier. Wherein the adjusting circuit has a controlled current source, an output of the controlled current source is connected to the current amplifier for impressing an output current of the controlled current source in the current amplifier, an input of the controlled current source to form a regulation element of a control loop is connected by a first switching device of the adjusting circuit to an output of the current amplifier and to form a holding element is disconnected from the output of the current amplifier by the first switching device.

Abstract: A system for pre-charging a current minor includes a controller configured to provide a first current and an additional current to a current minor to rapidly charge a capacitance associated with the current minor based on a reference voltage or control signals. A power amplifier module includes at least one current minor and a controller. A capacitor is coupled to the current minor. The controller provides a bias current in an amount proportional to an input to a voltage-to-current converter. The controller receives a control signal that directs the controller to apply one of a pre-charge voltage and a nominal voltage to the voltage-to-current converter.

Abstract: A voltage regulator for low power operation of digital circuits includes an output node for providing a regulated output voltage, a diode-connected P-channel transistor in series with a second diode-connected N-channel transistor coupled between the output node and ground, and a bias current having a value for biasing the first and second diode-connected transistors in a sub-threshold mode of operation. The low power voltage regulator further includes a buffer amplifier or emitter or source follower stage to provide a low impedance regulated voltage. The bias current may be generated by a bandgap circuit.

Abstract: Amplifiers with voltage and current feedback error correction are provided. In one embodiment, an amplifier includes a first input terminal, a second input terminal, an output terminal, a first stage, and a voltage feedback amplification circuit. The first stage can be used to generate first and second output currents, which can be used to control a voltage level of the output terminal. The first and second output currents can change in response to a current feedback signal and a differential input signal received between the first and second input terminals. The first stage can also generate a voltage feedback signal, which can be used by the voltage feedback amplification circuit to control a voltage level of the second input terminal based on a voltage level of the first input terminal.

Abstract: The disclosure provides an operational amplifier circuit, in which a power supply of an amplifying circuit is coupled to a first voltage clamping circuit, and the first voltage clamping circuit clamps a supply voltage of the amplifying circuit when the supply voltage exceeds a normal-operation allowable voltage of the amplifying circuit. The disclosure also provides a method for implementing the operational amplifier circuit. According to the disclosure, the operational circuit may be avoided from subject to an excessive supply voltage, which may damage devices in the amplifying circuit of the operational amplifier.

Abstract: A current-sensing differential amplifier has a balanced input. Thus, a balanced-input current-sensing differential amplifier has a first signal input terminal, a second signal input terminal, a first signal output terminal and a second signal output terminal. The balanced-input current-sensing differential amplifier includes a first current mirror, the input terminal of the first current mirror being coupled to the first signal input terminal, a second current mirror, the input terminal of the second current mirror being coupled to the second signal input terminal, a third current mirror, one of the output terminals of the third current mirror being coupled to the common terminal of the first current mirror and to the common terminal of the second current mirror, three current sources and an output circuit.

Abstract: Apparatus and methods for reducing load-induced non-linearity in amplifiers are provided. In certain implementations, an amplifier includes a current mirror, a buffer circuit, and an output stage. The buffer circuit can have a relatively high current gain and a voltage gain about equal to 1. The buffer circuit can amplify a mirrored current generated by the current mirror and provide the amplified mirrored current to the output stage, thereby helping to balance or equalize currents in the current mirror and avoiding the impact of load-induced offset error.

Abstract: Offset voltages developed on floating nodes on inputs to high-performance amplifiers that are DC isolated from the data signals input to amplifiers are cancelled by connecting a highly resistive element between the input node and a predetermined potential, particularly useful in proximity communication systems in which two chips are connected through capacitive or inductive coupling circuits formed jointly in the two chips. The resistive element may be an off MOS transistor connected between the node and a desired bias voltage or a MOS transistor with its gate and drain connected to the potential. Multiple bias voltages may be distributed to all receivers and locally selected by a multiplexer for application to one or two input nodes of the receiver. The receiver output can also serve as a predetermined potential when the resistive element has a long time constant compared to the data rate or the resistive element is non-linear.

Abstract: A circuit has a first circuit module including a first resistor and first and second transistors coupled in parallel with the first resistor. The first resistor and the first and second transistors are coupled together at a first node. An equivalent resistance across the first circuit module increases as a voltage of the first node is increased from a first voltage to a second voltage, and the equivalent resistance across the first circuit module decreases as the voltage of the first node is increased from the second voltage to a third voltage.

Abstract: A CMOS current-mode folding amplifier circuit is provided that uses MOSFETs operating in relatively strong inversion. The CMOS current-mode folding amplifier circuit produces a saw-tooth shaped input-output characteristic which provides for relative precision in flash-type analog-to-digital converters. Furthermore, the CMOS current-mode folding amplifier circuit uses a plurality of simple current mirrors, in addition to biasing currents, for defining the switching levels. Accordingly, the current-mode amplifier requires less area on the chip and consumes less power relative to other analog preprocessing circuits. Moreover, the CMOS current-mode folding amplifier circuit is resilient to process, temperature and power supply variations. Tanner simulation tools using 0.35 ?m CMOS technology confirm the functionality of the current-mode folding amplifier.

Abstract: A system for pre-charging a current mirror includes a controller configured to provide a first current and an additional current to a current mirror to rapidly charge a capacitance associated with the current mirror based on a reference voltage or control signals. A power amplifier module includes at least one current minor and a controller. A capacitor is coupled to the current minor. The controller provides a bias current in an amount proportional to an input to a voltage-to-current converter. The controller receives a control signal that directs the controller to apply one of a pre-charge voltage and a nominal voltage to the voltage-to-current converter.

Abstract: A current mirror includes a bias branch, which includes first and second transistors in series between a voltage source and ground, a voltage divider coupled between the voltage source and ground, an op-amp configured to receive a divided voltage of the voltage divider and a voltage of a node between the first and second transistors, and drive a gate of the second transistor to pull the node to the divided voltage. The current mirror further includes a power amplifier core coupled to the bias branch. The power amplifier core includes first and second drive transistors configured in series between the voltage source and ground. Gates of the first transistor and the first drive transistor are coupled, and gates of the second transistor and the second drive transistor are coupled.

Abstract: A trans-impedance amplifier (TIA) for an optical receiver is disclosed, where the TIA stabilizes the cross point in the output thereof independent of the variation of the power supply. The TIA of the invention includes an amplifier section, a source follower, and a bias generator. A transistor in the source follower to define the current flowing in the source follower and another transistor in the bias generator constitute a current-mirror circuit. The operating point of the other transistor in the bias generator depends on the variation of the power supply. The output level of the amplifier section follows the variation of the power supply.

Abstract: A current mirror circuit provided in an emitter follower configuration achieves linearly output over a range of input currents by operating in response to a bias current that is a replica of the input current. The current mirror may include a pair of transistors and a pair of resistors, in which: a first resistor and a base of a first transistor are coupled to a first input terminal for a first input current, an emitter of the first transistor and a base of the second transistor are coupled to a second input terminal for a second input current, the first and second input currents being replicas of each other, an emitter of the second transistor being coupled to the second resistor, a collector of the second transistor being coupled to an output terminal of the current mirror, and a collector of the first transistor and the two resistors are coupled to a common node.

Abstract: A current mirror includes a bias branch, which includes first and second transistors in series between a voltage source and ground, a voltage divider coupled between the voltage source and ground, an op-amp configured to receive a divided voltage of the voltage divider and a voltage of a node between the first and second transistors, and drive a gate of the second transistor to pull the node to the divided voltage. The current mirror further includes a power amplifier core coupled to the bias branch. The power amplifier core includes first and second drive transistors configured in series between the voltage source and ground. Gates of the first transistor and the first drive transistor are coupled, and gates of the second transistor and the second drive transistor are coupled.