Combined With Automatic Amplifier Disabling Switch Means Patents (Class 330/51)
  • Patent number: 9595921
    Abstract: Power amplifier having a common input and a plurality of outputs. In some embodiments, a power amplifier can include a plurality of signal paths having a common input node. Each signal path can include a dedicated amplifier stage, and be configured to be capable of amplifying a radio-frequency (RF) signal received at the common input node. The power amplifier can further include a bias selector configured to provide a bias signal to the dedicated amplifier stage of a selected one of the plurality of signal paths to thereby allow amplification of the RF signal through the selected signal path. Such a power amplifier can be implemented in products such as a die, a module, and a wireless device.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: March 14, 2017
    Assignee: Skyworks Solutions, Inc.
    Inventors: Christophe M. Joly, Xiaodong Xu, Eric Joseph Lai
  • Patent number: 9590499
    Abstract: In accordance with an embodiment, a transformer-less drive circuit is provided that includes a switch control network having an output terminal connected to a first switch and another output terminal connected to a second switch. A driver connected to the second switch. In accordance with another embodiment, a method for generating a drive signal is provided that includes charging a first energy storage element to a first voltage level and a second energy storage element to a second voltage level. The charge stored in the second energy storage element is increased so that the second energy storage element stores a voltage at a third voltage level. The terminals of the second energy storage element are alternately connected to a fourth voltage level. The second energy storage element is used to supply or drive a driver.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: March 7, 2017
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Johan Camiel Julia Janssens
  • Patent number: 9559692
    Abstract: A signal sensing circuit is provided. The signal sensing circuit comprises a first current-to-voltage circuit, a second current-to-voltage circuit and an impedance shifting circuit. The first current-to-voltage circuit converts a first input current into a first voltage that is directly proportional to a first impedance. The second current-to-voltage circuit converts a second input current into a second voltage that is directly proportional to a second impedance. The impedance shifting circuit generates a third voltage according to the first voltage, wherein the first impedance/the second impedance=K(first voltage/third voltage), where K is a real number.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: January 31, 2017
    Assignee: EGALAX_EMPIA TECHNOLOGY INC.
    Inventor: Chin-Fu Chang
  • Patent number: 9553513
    Abstract: A control circuit for switching converter has a chopping amplifier, a sample-hold circuit, a first comparator, an oscillator and a logic circuit. The chopping amplifier generates an amplified error signal based on a reference signal and a feedback signal. The sample-hold circuit generates a sample-hold signal based on the amplified error signal. The first comparator generates a first logic signal based on a comparison result between the sample-hold signal and a current sensing signal representing a current flowing through a power switch in the switching converter. The oscillator generates a clock signal. The logic circuit generates a control signal based on the first logic signal and the clock signal, the control signal is used to control the power switch.
    Type: Grant
    Filed: July 10, 2015
    Date of Patent: January 24, 2017
    Assignee: CHENGDU MONOLITHIC POWER SYSTEMS CO., LTD.
    Inventor: Li Xu
  • Patent number: 9531409
    Abstract: The present disclosure includes switched capacitor transmitter circuits and methods. In one embodiment, the present disclosure includes a plurality of switched capacitor transmitter circuits coupled to inputs of an inductive network. The inductive network combines voltages from the switched capacitor transmitter circuits to produce a combined voltage on an output. In another embodiment, a digital data signal is thermometer encoded and a negative thermo-encoded signal is bit order reversed to control capacitors in a switched capacitor transmitter circuit.
    Type: Grant
    Filed: April 7, 2015
    Date of Patent: December 27, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Daniel Keyes Butterfield, Peiyuan Wang, Jeremy Darren Dunworth
  • Patent number: 9496906
    Abstract: A receiver comprises a passive gain stage having an input to receive an in-going radio frequency (RF) signal and a gain control signal to produce an adjusted in-going RF signal, a sliced LNA stage comprising a plurality of LNAs coupled to receive the in-going RF signal. Each LNA includes an adjustable source degeneration circuit for receiving a plurality of gain selection and control signals and an output port to produce an amplified in-going RF signal. A mixer is coupled to receive at least one of the amplified in-going RF signals produced by the sliced LNA stage and is configured to produce a converted signal at another frequency. A PGA is coupled to receive the down-converted signal and produces an amplified in-going signal.
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: November 15, 2016
    Assignee: SILICON LABORATORIES, INC.
    Inventor: Aslamali A. Rafi
  • Patent number: 9497061
    Abstract: Systems and methods for characterizing an undersampled receiver generally comprise, in one embodiment, providing one or more probe signals to an input of an undersampled receiver. Each of the one or more probe signals has selective frequency components that ensure that aliases in a corresponding output signal of the undersampled receiver are unique. The undersampled receiver is then characterized based on the output signal(s) of the undersampled receiver. The selective frequency components of the one or more probe signals enable un-aliasing of the one or more output signals of the undersampled receiver and, as such, the undersampled receiver can be characterized.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: November 15, 2016
    Assignee: Telefonaktiebolaget L M Ericsson (publ)
    Inventors: Bradley John Morris, Somsack Sychaleun
  • Patent number: 9484150
    Abstract: A multi-mode power amplifying circuit, and a multi-mode wireless transmission module and method thereof are provided. The multi-mode wireless transmission module includes the multi-mode power amplifying circuit and an antenna. In the multi-mode power amplifying circuit and the antenna, a first power amplifier is electrically connected between a signal input end and a first impedance matching circuit, and an output end of the first impedance matching circuit is electrically connected to the antenna. A second power amplifier is electrically connected to the signal input end, and a second impedance matching circuit is electrically connected between the second power amplifier and the first impedance matching circuit. A switching circuit is electrically connected to an input end of the second impedance matching circuit. The switching circuit switches on-off corresponding to an operation of the first power amplifier and an operation of the second power amplifier.
    Type: Grant
    Filed: October 3, 2013
    Date of Patent: November 1, 2016
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Po-Chih Wang, Ya-Wen Yang
  • Patent number: 9483100
    Abstract: According to at least one example embodiment, a semiconductor device is configured to gate power supply to a hardware component through a transistor coupled to the hardware component. The transistor is operated by a controller in a manner to limit electric current dissipated to the hardware component during a transition period. The controller is configured to gradually turn on, or off, the hardware component during a transition period by controlling at least one input signal to the transistor. Gradual turning on, or off, of the hardware component reduces electric current leakage through the hardware component and diminishes any potential disturbance to a ground reference coupled to the hardware component.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: November 1, 2016
    Assignee: Cavium, Inc.
    Inventors: David A. Carlson, Thucydides Xanthopoulos
  • Patent number: 9473097
    Abstract: A resistive ladder has first, second and third resistors coupled in series between first and second voltage terminals. A first node of the first resistor is coupled to the first voltage terminal and a first node of the third resistor is coupled to the second voltage terminal. A voltage selection unit has a first input coupled to a first node of the second resistor and a second input coupled to a second node of the second resistor and is adapted to selectively couple one of the first and second inputs to an output node of said resistive ladder. The resistive ladder also includes a first switch coupled between a second node of the third resistor and the second voltage terminal.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: October 18, 2016
    Assignee: STMicroelectronics SA
    Inventor: Emmanuel Rouat
  • Patent number: 9438185
    Abstract: Devices and methods for improving reliability of sealable periphery amplifiers is described. Amplifier segments of the sealable periphery architecture can be rotated to distribute wear. Further, extra amplifier segments can be implemented on amplifier dies to extend the overall lifetime of amplifiers.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: September 6, 2016
    Assignee: Peregrine Semiconductor Corporation
    Inventor: Chris Olson
  • Patent number: 9432800
    Abstract: A wireless magnetic field communication system working within the range of less than 1.5 m without induction induced interference during listening mode is proposed. The system comprises at least a transmitter and a receiver. Several novel transmitter designs using either active-connection-control solenoid or spin-orbit torque (SOT) based patterned thin film element(s) are proposed. The system has intrinsic high data security level due to its limited working range, as well as large data transfer rate. The system is suitable to establish a temporary off-the grid magnetic field communication network. It also provides a new data communication approach among modules instead of data cable in industry equipment. The system can be used as a standalone or built-in system for communication between devices or modularized components of a system.
    Type: Grant
    Filed: April 7, 2015
    Date of Patent: August 30, 2016
    Inventors: Ge Yi, Jinwen Wang, Dujiang Wan, Shaoping Li
  • Patent number: 9425813
    Abstract: This application relates to analogue-to-digital converters (ADCs). An ADC 200 has a first converter (201) for receiving an analogue input signal (AIN) and outputting a time encode signal (DT), such as a pulse-width-modulated (PWM) signal, based on input signal and a first conversion gain setting (GIN). In some embodiments the first converter has a PWM modulator (401) for generating a PWM signal such that the input signal is encoded by pulse widths that can vary continuously in time. A second converter (202) receives the time encoded signal and outputs a digital output signal (DOUT) based on the time encoded signal (DT) and a second conversion gain setting (GO). The second converter may have a first PWM-to-digital modulator (403). A gain allocation block (204) generates the first and second conversion gain settings based on the time encoded signal (DT).
    Type: Grant
    Filed: November 3, 2015
    Date of Patent: August 23, 2016
    Assignee: Cirrus Logic International Semiconductor Ltd.
    Inventors: John Paul Lesso, Emmanuel Philippe Christian Hardy
  • Patent number: 9425746
    Abstract: A device includes an amplifier circuit comprising a plurality of amplification paths, and at least one switchable bypass capacitance coupled to an associated shared power distribution network, the at least one switchable bypass capacitance and at least one of the plurality of amplification paths responsive to a control signal configured to selectively ground the at least one switchable bypass capacitance and selectively enable the at least one of the amplification paths based on a selected operating mode.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: August 23, 2016
    Assignee: Qualcomm Incorporated
    Inventors: Mehmet Uzunkol, Rui Xu, Ahmed Abdel Monem Youssef, Wingching Vincent Leung, Ehab Ahmed Sobhy Abdel Ghany, Allen He, Sang Hyun Woo, Li-Chung Chang
  • Patent number: 9413377
    Abstract: A switched capacitor circuit with feedback compensation is provided. First terminals of a feedback capacitor and at least one capacitor are coupled to a first input terminal of a differential amplifier. Second terminals of the feedback capacitor and the capacitor are coupled to an input terminal during a first period. A feedback compensation circuit amplifies a first voltage on the first input terminal of the differential amplifier by a gain greater than one to generate a second voltage. The second terminal of the feedback capacitor is coupled to the output terminal of the differential amplifier, and the feedback compensation circuit applies the second voltage to the second terminal of the capacitor during a second period.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: August 9, 2016
    Assignees: LNCKU RESEARCH AND DEVELOPMENT FOUNDATION, HIMAX TECHNOLOGIES LIMITED
    Inventors: Soon-Jyh Chang, Tz-Jing Shau, Chung-Ming Huang
  • Patent number: 9407212
    Abstract: Device and methods for improving consistency of operation and therefore yield of sealable periphery amplifiers is described. Amplifier size of the scalable periphery architecture can be adjusted to obtain part-to-part consistency of operating performance as per a defined/desired set of criteria. Amplifier segments of the scalable periphery architecture can be rotated to distribute wear. Further, extra amplifier segments can be implemented on amplifier dies to extend the overall lifetime of amplifiers.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: August 2, 2016
    Assignee: Peregrine Semiconductor Corporation
    Inventor: Dan William Nobbe
  • Patent number: 9374114
    Abstract: A receiver apparatus includes a receiver path and a blocker detection path. The receiver path includes a down-converting stage. The blocker detection path includes a sensing circuit and a blocker detection circuit. The sensing circuit is arranged to sense a received radio frequency signal which has not yet been processed by the down-converting stage and generate a sensed signal accordingly. The blocker detection circuit is arranged to detect existence of a blocker signal according to the sensed signal and generate a blocker detection result indicative of the existence of the blocker signal when receiving the sensed signal.
    Type: Grant
    Filed: April 15, 2014
    Date of Patent: June 21, 2016
    Assignee: MEDIATEK INC.
    Inventors: Tzung-Han Wu, Chinq-Shiun Chiu
  • Patent number: 9350306
    Abstract: According to one embodiment, an amplification circuit includes first and second differential amplification circuits, each having an output connected to an output terminal and a feedback resistor connected between the output and a negative input of the respective differential amplification circuit. The amplification circuit includes a switching circuit that receives a first signal on first input terminal and a second signal on a second input terminal and includes set of switches that is configured to apply the first and second signals to the first and second differential amplification circuits such that in a first switching state an amplified voltage difference of the first and second signals is available between the two output terminals, and in a second switching state an amplified current difference of the first and second signals is available between the two output terminals.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: May 24, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeo Imai, Shinji Nakatsuka
  • Patent number: 9331643
    Abstract: Methods of turning on and/or turning off amplifier segments in a scalable periphery amplifier architecture are described in the present disclosure. The turning on and/or turning off the amplifier segments according to the various embodiments of the present can reduce spectral splatter in adjacent channels. In some embodiments, amplifier performance and efficiency can be improved by dissipating heat more uniformly.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: May 3, 2016
    Assignee: Peregrine Semiconductor Corporation
    Inventor: Michael P. Gaynor
  • Patent number: 9331696
    Abstract: A signal sensing circuit is provided. The signal sensing circuit comprises a first current-to-voltage circuit, a second current-to-voltage circuit and an impedance shifting circuit. The first current-to-voltage circuit converts a first input current into a first voltage that is directly proportional to a first impedance. The second current-to-voltage circuit converts a second input current into a second voltage that is directly proportional to a second impedance. The impedance shifting circuit generates a third voltage according to the first voltage, wherein the first impedance/the second impedance=K(first voltage/third voltage), where K is a real number.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: May 3, 2016
    Assignee: EGALAX—EMPIA TECHNOLOGY INC.
    Inventor: Chin-Fu Chang
  • Patent number: 9325535
    Abstract: To maintain linear operation of a signal processing circuit, such as a low noise amplifier, a peak detector detects a peak of a signal associated with the signal processing circuit and compares the detected peak signal with a threshold. When the detected peak signal is greater than the threshold, a variable current source biases the signal processing circuit to place the signal processing circuit in a different mode of operation. The signal processing circuit may thereby process a larger input signal while operating in an acceptable linear region.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: April 26, 2016
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventor: George Khoury
  • Patent number: 9306502
    Abstract: System providing switchable impedance transformer matching for power amplifiers. In an exemplary implementation, an amplifier providing switchable impedance matching includes an output inductor (L1) that is part of an output path of the amplifier and a first amplifier stage comprising a first inductor (L4) coupled to the output inductor, the first inductor configured to couple a signal amplified by the first amplifier stage at a first power level to the output inductor in response to a first enable signal. The amplifier also includes a second amplifier stage comprising a second inductor (L5) coupled to the output inductor, the second inductor configured to couple the signal amplified by the second amplifier stage at a second power level to the output inductor in response to a second enable signal.
    Type: Grant
    Filed: May 9, 2011
    Date of Patent: April 5, 2016
    Assignee: QUALCOMM Incorporated
    Inventor: Ngar Loong Alan Chan
  • Patent number: 9306503
    Abstract: A system for combining power includes a plurality of branches and a secondary winding. The plurality of branches are configured to provide branch power. Each of the branches contribute to the branch power at non-peak power. The secondary winding is configured to combine the branch power from the plurality of branches into an output power.
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: April 5, 2016
    Assignee: Intel Corporation
    Inventors: Hongtao Xu, Georgios (Yorgos) Palaskas, Parmoon Seddighrad
  • Patent number: 9294073
    Abstract: According to certain aspects, a method includes determining whether to amplify a radio frequency (RF) signal by a first gain achievable by a first circuit or a second gain achievable by a second circuit, amplification of the first and second circuits respectively configured to be turned on or off by first and second switches, the first switch in the on state and the second switch in the off state resulting in the RF signal being amplified by the first gain, and the first switch in the off state and the second switch in the on state resulting in the RF signal being amplified by the second gain; and applying or inducing application of a first bias voltage or a second bias voltage to an isolated well of the first switch upon determination that the RF signal is to be amplified by the first gain or the second gain, respectively.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: March 22, 2016
    Assignee: Skyworks Solutions, Inc.
    Inventors: David K. Homol, Hua Wang
  • Patent number: 9294290
    Abstract: Optical cable assemblies, optical engines, and methods for transitioning into and out of a sleep mode are disclosed. In one embodiment, a method of operating a sleep mode of an optical cable assembly includes receiving a sleep trigger, and for a time T1, turning a laser of an optical transmit (Tx) lane of an optical transceiver device on or off, and providing a fixed logical high or a fixed logical low on low-speed receive (Rx) line of the optical cable assembly based on a connection state of an electrical connector of the optical cable assembly. The method further includes, after the time T1, turning off the laser of the optical Tx lane, placing one or more components of the optical transceiver device into a low-power state, and periodically transmitting an optical intra-cable signal from the optical transceiver device over optical fiber to a far end of the optical cable assembly.
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: March 22, 2016
    Assignee: CORNING OPTICAL COMMUNICATIONS LLC
    Inventors: Mathieu Charbonneau-Lefort, Michael John Yadlowsky
  • Patent number: 9281786
    Abstract: An amplifier circuit with an input power detector and a related method are described. With the input power detector and related control network, the arrangement enables and/or disables a number of unit cells in power amplifiers.
    Type: Grant
    Filed: August 2, 2013
    Date of Patent: March 8, 2016
    Assignee: Peregrine Semiconductor Corporation
    Inventor: David Kovac
  • Patent number: 9276527
    Abstract: Methods of turning on and/or turning off amplifier segments in a scalable periphery amplifier architecture are described in the present disclosure. The turning on and/or turning off the amplifier segments according to the various embodiments of the present can reduce spectral splatter in adjacent channels. In some embodiments, amplifier performance and efficiency can be improved by dissipating heat more uniformly.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: March 1, 2016
    Assignee: Peregrine Semiconductor Corporation
    Inventor: Michael P. Gaynor
  • Patent number: 9257942
    Abstract: An audio amplifier apparatus for driving a loudspeaker is provided. The audio amplifier apparatus includes a soft charge unit, a first amplification module, and a second amplification module. The soft charge unit is coupled to the loudspeaker through an output terminal and supplies a driving current according to a first control signal to soft charge the loudspeaker, so as to gradually increase a voltage level on the output terminal. The first amplification module receives an audio signal according to the first control signal and amplifies the audio signal to output a first amplified signal for driving the loudspeaker. The second amplification module receives the audio signal according to a second control signal and amplifies the audio signal to output a second amplified signal for driving the loudspeaker. The soft charge unit generates the second control signal by comparing the voltage level on the output terminal with a predetermined voltage level.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: February 9, 2016
    Assignee: MICROCHIP TECHNOLOGY INCORPORATED
    Inventors: Yi-Lung Chen, Hsin-Chieh Huang
  • Patent number: 9257835
    Abstract: An output-stage circuit is disclosed. The output-stage circuit includes high-side output driver, first body selector, low-side output driver, second body selector and inductance. When output current is larger than current threshold value so as to make the low-side output driver generate overcurrent, the low-side output driver controlled by second control signal is disabled, and the high-side output driver controlled by first control signal is enabled so as to create first current channel. When output current is larger than current threshold value so as to make the high-side output driver generate overcurrent, the high-side output driver controlled by the first control signal is disabled, and the low-side output driver controlled by the second control signal is enabled so as to create second current channel to avoid current flowing through low-side output driver's body, and thus reduce the output current and voltage spiking of the output voltage.
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: February 9, 2016
    Assignee: Anpec Electronics Corporation
    Inventors: Ming-Hung Chang, Chia-Pauo Wu
  • Patent number: 9257947
    Abstract: A semiconductor device includes a power amplifier for amplifying RF signals in multiple frequency bands, an output matching circuit connected to an output of the power amplifier, a first capacitor connected at a first end to an output of the output matching circuit, multiple output paths, a switch connected to a second end of the first capacitor and directing each of the RF signals to a respective one of the output paths in accordance with frequency band of the each of the RF signals, and multiple second capacitors. Each second capacitor is connected in series to a respective one of the output paths. The switch and either the first capacitor or the second capacitors, or both the first and second capacitors, are integrated as a single monolithic microwave integrated circuit.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: February 9, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kenichi Horiguchi, Masakazu Hirobe, Satoshi Miho, Yoshinobu Sasaki, Kazuya Yamamoto
  • Patent number: 9246451
    Abstract: A differential power amplifier including a push-pull pair of transistors, a capacitance, a first inductance, and a second inductance. The push-pull pair of transistors includes first and second transistors. The first transistor includes control and output terminals. The second transistor includes input and control terminals. The control terminals of the first and second transistors collectively receive a differential input signal. The output and input terminals collectively provide a differential output signal. The capacitance is connected to the output and input terminals. The first capacitance cancels first harmonics at the output terminal of the first transistor with second harmonics at the input terminal of the second transistor. The first transistor and the first inductance are connected in series between a voltage source and a reference terminal. The second transistor and the second inductance are connected in series between the voltage source and the reference terminal.
    Type: Grant
    Filed: March 25, 2014
    Date of Patent: January 26, 2016
    Assignee: Marvell World Trade Ltd.
    Inventors: Sehat Sutardja, Poh Boon Leong, Ping Song, Nuntha Kumar Krishnasamy Maniam
  • Patent number: 9246447
    Abstract: A multipath power amplifier device, configured to operate in a high power mode and a low power mode, includes a high power path, a low power path and an output switch. The high power path includes a high power mode (HPM) amplifying circuit for amplifying an input signal in the high power mode. The low power path includes a low power mode (LPM) amplifying circuit for amplifying the input signal in the low power mode. The output switch is configured to isolate the low power path from the high power path in the high power mode.
    Type: Grant
    Filed: March 29, 2013
    Date of Patent: January 26, 2016
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventor: Michael Wendell Vice
  • Patent number: 9231536
    Abstract: A power amplifier (PA) system is provided for multi-mode multi-band operations. The PA system includes one or more amplifying modules, each amplifying module including one or more banks, each bank comprising one or more transistors; and a plurality of matching modules, each matching module being configured to be adjusted to provide impedances corresponding to frequency bands and conditions. A controller dynamically controls an input terminal of each bank and adjusts the matching modules to provide a signal path to meet specifications on properties associated with signals during each time interval.
    Type: Grant
    Filed: July 24, 2012
    Date of Patent: January 5, 2016
    Assignee: ETHERTRONICS, INC.
    Inventors: Laurent Descios, Alexandre Dupuy
  • Patent number: 9225294
    Abstract: An amplifier with improved noise reduction is disclosed. In an exemplary embodiment, an apparatus includes at least one capacitor configured to receive an adjustable current and generate a corresponding ramp voltage configured to control coupling between a main amplifier output and a secondary amplifier output. The apparatus also includes at least one comparator configured to adjust the adjustable current to generate the ramp voltage with selected ramp-up or ramp-down voltage characteristics.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: December 29, 2015
    Assignee: Qualcomm Incorporated
    Inventors: Wenchang Huang, Vijayakumar Dhanasekaran
  • Patent number: 9214906
    Abstract: Disclosed are circuits, devices, systems and methods related to an enable circuit for a radio-frequency (RF) amplifier. In some embodiments, the enable circuit can be configured to control a low-noise amplifier (LNA). The enable circuit includes a plurality of input ports, with each input ports being configured to receive a control signal. The enable circuit further includes a logical section connected to the input ports and configured to be capable of generating a plurality of output signals based on different combinations of the plurality of control signals. The output signals include either or both of enable and power shut-off signals for the LNA.
    Type: Grant
    Filed: July 2, 2013
    Date of Patent: December 15, 2015
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Eric Marsan, Ambarish Roy
  • Patent number: 9185656
    Abstract: An integrated circuit chip includes an output node, receiver front ends, and control logic. The receiver front ends are configured to receive an input signal. Each of the receiver front ends is configured to receive the input signal and provide an output signal at the output node. At least one of the receiver front ends is configured to selectively consume less power. The control logic is configured to select the number of receiver front ends providing an output signal to the output node based on a received signal strength indication.
    Type: Grant
    Filed: March 20, 2012
    Date of Patent: November 10, 2015
    Assignee: Infineon Technologies AG
    Inventors: Martin Flatscher, Manfred Greschitz, Thomas Herndl, Markus Dielacher
  • Patent number: 9178555
    Abstract: The present disclosure relates to a World Band Radio Frequency Power Amplifier and a World Band Radio Frequency Front End Module. The World Band Power Amplifier can contain at least one broadband power amplifier connected to a switch which can direct an RF input signal to a plurality of transmission paths, each transmission path configured for a different frequency. The World Band RFFE Module is more integrated version of the World Band Power Amplifier that can contain broadband RF PA(s), switches, logic controls, filters, duplexers and other active and passive components.
    Type: Grant
    Filed: June 16, 2013
    Date of Patent: November 3, 2015
    Assignee: Micro Mobio Corporation
    Inventors: Ikuroh Ichitsubo, Shinsuke Inui, Guan-Wu Wang, Weiping Wang, Zlatko Aurelio Filipovic
  • Patent number: 9172474
    Abstract: Methods and systems for a photonically enabled complementary metal-oxide semiconductor (CMOS) chip are disclosed and may comprise in an integrated circuit comprising a driver: amplifying a received signal in a plurality of partial voltage domains, and generating the partial voltage domains in a domain splitter in the driver. A voltage domain boundary value between two partial voltage domains may be controlled utilizing a differential amplifier that samples an output voltage of a cascade amplifier that is an input to the driver and controls a current supplying said cascade amplifier. A series of diodes may be driven in differential mode via the amplified signals. An optical signal may be modulated via the diodes, which may be integrated in a Mach-Zehnder modulator or a ring modulator. The diodes may be connected in a distributed configuration. The amplified signals may be communicated to the diodes via transmission lines, which may be even-mode coupled.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: October 27, 2015
    Assignee: Luxtera, Inc.
    Inventors: Brian Welch, Daniel Kucharski
  • Patent number: 9166537
    Abstract: An amplifier arrangement for amplifying a radio signal comprising at least a first amplifier module and a second amplifier module is presented wherein a splitter stage for dividing an amplifier stage input signal into several signal portions. The signal portions are amplified in the at least two parallel amplifier modules. A combiner stage combines the separate amplifier output signals into a single amplifier arrangement output signal.
    Type: Grant
    Filed: May 6, 2013
    Date of Patent: October 20, 2015
    Assignee: KATHREIN-WERKE KG
    Inventor: Lothar Schmidt
  • Patent number: 9160292
    Abstract: Methods and systems for reducing parasitic loading on a power supply output in RF amplifier arrangements used in multiband and/or multitude RF circuits are presented. Such RF circuits can comprise a plurality of RF amplifiers of which only one is activated for a given desired transmission mode and/or band.
    Type: Grant
    Filed: October 8, 2013
    Date of Patent: October 13, 2015
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Chris Olson, Dan William Nobbe, Jeffrey A. Dykstra
  • Patent number: 9160279
    Abstract: An amplifier circuit includes a input point, an output point, and an amplifying path from the input point to the output point. The amplifying path includes a first switch and an amplifier in series with the first switch. The first switch includes a first transistor having a first gate, a first source, and a first drain, the first gate coupled to a control point. The first source or drain is coupled to the signal input point and the other is coupled to the amplifier. The amplifier includes a second transistor having a second gate, a second source, and a second drain. The second gate is coupled to the second switch in the signal amplifying path. The second source or drain is coupled to the signal output point. A third transistor may be coupled to the signal output point through the second transistor in a cascade amplifying configuration.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: October 13, 2015
    Assignee: Guerrilla RF, Inc.
    Inventor: Ryan Michael Pratt
  • Patent number: 9148091
    Abstract: In a power amplifier including an amplifier circuit unit for high power mode and an amplifier circuit unit for low power mode provided in parallel thereto between input and output of the amplifier and where, when one amplifier circuit unit is in an operating state, the other amplifier circuit unit is in a non-operating state, a cross-coupled capacitor is provided between a drain of one of two transistors in output side and a gate of the other transistor in the amplifier circuit unit for high power mode, and a series circuit where a switch and a capacitor are coupled in series is coupled between a drain of the transistor of output side in the amplifier circuit unit for low power mode and a ground, the switch being in a conducting state in high power mode operation and being in a non-conducting state in low power mode operation.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: September 29, 2015
    Assignee: SOCIONEXT INC.
    Inventors: Tomoaki Sato, Shinji Yamaura
  • Patent number: 9143092
    Abstract: A method of differential signal transfer from a differential input Vinp and Vinn having a common mode input voltage that can be higher than the power supply voltage by providing an input chopper having Vinp and Vinn as a differential input, providing an output chopper, capacitively coupling a differential output Voutp and Voutn of the input chopper to a differential input of the output chopper, capacitively coupling a clock to the input chopper and coupling the clock to the output chopper, the clock having a first phase and a second phase opposite from the first phase, the first phase being coupled to the gates of the first and second transistors and the second phase being coupled to the gates of the third and fourth transistors, and providing protection of the gates of the first through fourth transistors from excessive voltages. Various embodiments are disclosed.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: September 22, 2015
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Johan Hendrik Huijsing, Qinwen Fan, Kofi Afolabi Anthony Makinwa
  • Patent number: 9143157
    Abstract: A digital to analog converter that may include a digital gain block; an analog gain block; a digital to analog conversion (DAC) block and a controller that is configured to: determine a digital gain factor, selected out of multiple digital gain factors, of the digital gain block and an analog gain factor, selected out of multiple analog gain factors of the analog gain block; wherein the DAC block is preceded by the digital gain block and is followed by the analog gain block; wherein the digital gain block is configured to multiply a digital input signal by the digital gain factor to provide an intermediate digital signal; wherein the DAC block is configured to convert the intermediate digital signal to a converted analog signal; and wherein the analog gain block is configured to multiply the converted analog signal by the analog gain factor to provide an output signal; wherein an increment of the analog gain factor results in a decrement of the digital gain factor.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: September 22, 2015
    Assignee: DSP GROUP LTD.
    Inventor: Ori Elyada
  • Patent number: 9130636
    Abstract: A radio that includes a transceiver to transmit and receive RF signals. The transceiver including a transmitter, a transformer, and a receiver, the transformer is coupled to and shared between the transmitter and the receiver. A resonator is formed by the combination of the transformer and capacitive elements of the transmitter and receiver.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: September 8, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sudipto Chakraborty, David Le Deaut, Josef Einzinger, Jens Graul
  • Patent number: 9130530
    Abstract: A multi-stage radio frequency (RF) power amplifier includes a high-power amplifier path and a low-power amplifier path. The low-power amplifier path includes gain synchronization circuitry in order to synchronize the gain response of the high-power amplifier path and the low-power amplifier path. By synchronizing the gain response of the high-power amplifier path and the low-power amplifier path, the gain linearity of the multi-stage RF amplifier is improved.
    Type: Grant
    Filed: October 1, 2013
    Date of Patent: September 8, 2015
    Assignee: RF Micro Devices, Inc.
    Inventors: Bin Jia, Yuan Wei, William Lam
  • Patent number: 9130522
    Abstract: A first signal path has one or a plurality of coils arranged in series, the coils being connected to the output of a first amplifier. A second signal path has the same number of coils as the coils of the first signal path, the coils being arranged in series and connected to the output of a second amplifier. Coupling paths have capacitors and couple the first signal path and the second signal path at both ends of the corresponding coils on the first signal path and the second signal path. A SW controlling unit switches a switch to a contact when a signal is input from the first amplifier and switches the switch to a contact when a signal is input from the second amplifier.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: September 8, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Kazushige Kishigami, Kenji Iwai, Atsushi Kudo, Nobuhide Hachiya, Masahiko Hirao
  • Patent number: 9130516
    Abstract: A POP noise suppression circuit includes a power source terminal, a clock signal input terminal, a charge unit, a discharge unit, a common-mode voltage judging and switching control unit, a charge and discharge capacitor, and a ground terminal. The charge unit includes a first clock generation circuit for generating a first pair of non-overlapped clock signal, and a first equivalent resistor. The discharge unit includes a second clock generation circuit for generating a second pair of non overlapped clock signals, and a second equivalent resistor. The charge unit generates a charge voltage changing slowly to the charge and discharge capacitor. The discharge unit generates a discharge voltage changing slowly to the charge and discharge capacitor. A POP noise suppression system is further provided.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: September 8, 2015
    Assignee: IPGoal Microelectronics (Sichuan) Co., Ltd.
    Inventor: Baoding Yang
  • Patent number: 9106185
    Abstract: Amplifiers with inductive degeneration and configurable gain and input matching are disclosed. In an exemplary design, an apparatus includes a gain transistor, an inductor, and an input matching circuit for an amplifier. The gain transistor has a variable gain determined based on its bias current. The inductor is coupled between the gain transistor and circuit ground. The input matching circuit is selectively coupled to the gain transistor based on the variable gain of the gain transistor. For example, the input matching circuit may be coupled to the gain transistor in a low-gain mode and decoupled from the gain transistor in the high-gain mode. In an exemplary design, the input matching circuit includes a resistor, a capacitor, and a second transistor coupled in series. The resistor is used for input matching of the amplifier. The second transistor couples or decouples the resistor to or from the gain transistor.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: August 11, 2015
    Assignee: Qualcomm Incorporated
    Inventors: Ahmed A Youssef, Sherif Abdelhalem, Ehab A Abdel Ghany, Li-Chung Chang
  • Patent number: 9093961
    Abstract: There is provided an operational amplifier capable of detecting that an input terminal has been open circuited without restricting the voltage range of an input signal. The operational amplifier includes a first comparator which detects that an inverting input terminal of an operational amplifier has been open circuited, a second comparator which detects that a non-inverting input terminal of the operational amplifier has been open circuited, a first resistor and a first switch which are controlled by output signals of the first comparator and the second comparator and which are connected in series between the non-inverting input terminal and a ground terminal of the operational amplifier, and a second resistor and a second switch which are connected in series between the inverting input terminal and a supply terminal of the operational amplifier.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: July 28, 2015
    Assignee: SEIKO INSTRUMENTS INC.
    Inventor: Toshiyuki Tsuzaki