Abstract: A first amplifier is connected between an input terminal and an output terminal. A first junction point is located between the input terminal and an input of the first amplifier. A second junction point is located between the output terminal and an output of the first amplifier. A second amplifier is connected in parallel with the first amplifier, between the first junction point and the second junction point. A third junction point is located between an output of the second amplifier and the second junction point. A first capacitor and a switch are connected in series between the third junction point and ground. The second junction point is the lowest impedance point along a power amplification path that includes the input terminal, the first amplifier, and the output terminal. The switch is turned off/on when the second/first amplifier is turned on.

Abstract: In one embodiment, a Doherty amplifier having a main amplifier branch and one or more peak amplifier branches, where at least one peak amplifier branch has RF conditioning applied to its peak branch input signal such that the peak amplifier branch is active only when the peak branch input signal is greater than a specified threshold level. In one implementation, a reverse-biased diode is configured between the peak branch input signal and a peak amplifier device, where the bias signal applied to the diode establishes the specified threshold level. Depending on the implementation, the bias signal may be static or dynamic, and multiple peak amplifier branches may have diodes with independently or dependently generated bias signals applied.

Abstract: Expandable transceivers and receivers support operation on multiple frequency bands and multiple carriers. In an exemplary design, an apparatus (e.g., a wireless device, an integrated circuit (IC) chip, or circuit module) includes a low noise amplifier (LNA) and interface circuit. The LNA resides on an IC chip and includes a first/on-chip output and a second/off-chip output. The interface circuit also resides on the IC chip, is coupled to the second output of the LNA, and provides an amplified RF signal outside of the IC chip. The apparatus may further include a buffer, load circuit, and downconverter circuit. The buffer resides on the IC chip, is coupled to the first output of the LNA, and receives a second amplified RF signal from outside of the IC chip. The load circuit is coupled to the first output of the LNA. The downconverter circuit is coupled to the load circuit.

Abstract: Split amplifiers with configurable gain and linearization circuitry are disclosed. In an exemplary design, an apparatus includes first and second amplifier circuits and a linearization circuit, which may be part of an amplifier. The first and second amplifier circuits are coupled in parallel and to an amplifier input. The linearization circuit is also coupled to the amplifier input. The first and second amplifier circuits are enabled in a high-gain mode. One of the first and second amplifier circuits is enabled in a low-gain mode. The linearization circuit is enabled in the second mode and disabled in the first mode. The amplifier is split into multiple sections. Each section includes an amplifier circuit and is a fraction of the amplifier. High linearly may be obtained using one amplifier circuit and the linearization circuit in the low-gain mode.

Abstract: A method for an electronic device includes amplifying a signal by a first power amplifier, obtaining a temperature of the first power amplifier during the amplification of the signal, comparing the temperature of the first power amplifier to a predetermined threshold value, and switching the first power amplifier to a second power amplifier for amplifying a signal if the temperature of the first power amplifier is higher than a threshold value. An electronic device for switching power amplifiers are also disclosed.

Abstract: A loudspeaker drive circuit comprises an input for receiving an audio signal and a signal processor for processing the audio signal before application to the loudspeaker. The signal processor processes the audio signal to derive a loudspeaker drive signal which results in the loudspeaker membrane reaching its maximum displacement in both directions of diaphragm displacement.

Abstract: The present invention concerns an audio amplifier circuit designed to provide an output signal to an audio transducer, said audio amplifier circuit comprising an audio power amplifier designed to receive an audio signal and designed to generate said output signal, a sensor designed to detect an audible sound having at least one noise component, to generate a detected signal. The audio amplifier circuit also includes a processing block configured to receive said detected signal at its input and to generate an off signal at its output, the latter being located at the input of said audio power amplifier. The processing block processes the detected signal according to said input signal to identify said noise component of said detected signal to generate a reference signal. The processing block generates the off signal when the value of said input signal is lower than the value of said reference signal.

Abstract: A technique for a reconditioning equalizer filter for non-constant envelope signals is described. The input to a transmitter chain is modified by a reconditioning equalizer filter, prior to being applied to the transmitter. The reconditioning equalizer filter modifies and smoothens the amplitude of the signal. The modified and smoothened signal has its peaks reduced which results in lower Crest Factor. The input to the reconditioning equalizer filter could be a baseband, intermediate frequency (IF) or radio frequency (RF) signal. When the signal is an IF or RF signal, it needs to be down-converted to baseband before being applied to the reconditioning equalizer filter. The reconditioning equalizer filter could be performed in a digital or analog domain.

Abstract: Circuits for reducing power consumption in power amplifier circuits are disclosed. In certain embodiments, a circuit for power control in the transmitter includes a coupling circuit, a first power amplifier circuit and a second power amplifier circuit. The coupling circuit includes a primary winding inductively associated with a first secondary winding and a second secondary winding. The coupling circuit provides a signal at output terminals of the first secondary winding and the second secondary winding in response to a signal at the primary winding. A first power amplifier circuit is coupled with output terminals of the first secondary winding, and a second power amplifier is coupled with output terminals of the second secondary winding. The first power amplifier circuit and second power amplifier circuit are configured to be enabled or disabled based on a bias voltage.

Abstract: An amplifying circuit for receiving a signal in a wireless network includes an amplifier and two switches. The amplifier includes an isolation switch having a gate connected to a control signal for activating the isolation switch transistor in a bypass mode and a source/drain connected to the input for receiving the signal and the other source/drain connected to the gate of an amplifier transistor. The amplifier also includes a bypass transistor having a gate connected to a control signal for activating the bypass transistor in a bypass mode. The bypass switch is connected in parallel with the series combination of the isolation switch and amplifier between the input and output, enabling the received signal to bypass the amplifier. In the bypass mode, the isolation switch prevents RF energy from voltage modulating the gate of the amplifier transistor gate thus reducing undesirable distortion and harmonics from the amplifier.

Abstract: In accordance with an embodiment, an audio amplification circuit includes an input stage switchably connected to a switching network through a signal generator and a signal generator stage having a first input and a first output, the first input of the signal generator stage coupled to the first output of the input stage. An output stage is connected to the signal generator stage. In accordance with another embodiment, a method for inhibiting audible transients in an audio signal comprises providing an audio amplification circuit having at least one input and at least one output and coupling a first output to a first source of operating potential in response to one of starting or turning off the audio amplification circuit.

Abstract: A charge pump of a power amplifier (PA) bias power supply and a process to prevent undershoot disruption of a bias power supply signal of the PA bias power supply are disclosed. The charge pump operates in one of multiple bias supply pump operating modes, which include at least a bias supply pump-up operating mode and a bias supply bypass operating mode. The process prevents selection of the bias supply pump-up operating mode from the bias supply bypass operating mode before charge pump circuitry in the charge pump is capable of providing adequate voltage to prevent undershoot disruption of the bias power supply signal.

Abstract: A system and method for modulating the sound pressure that is output from an audio transducer is disclosed. In one embodiment, the method includes receiving an audio signal and placing the audio signal across a voice coil of the transducer. In addition, a voltage is applied across a field coil of the transducer, the field coil being separate from the voice coil. And the voltage that is applied across the field coil is adjusted so as to modulate the sound pressure output from the audio transducer.

Abstract: In accordance with some embodiments of the present disclosure, an oscillator circuit comprises, a first pad associated with a first terminal of an oscillator and a second pad associated with a second terminal of the oscillator. The oscillator is configured to generate an oscillating signal and communicate the oscillating signal from the second terminal to a clock distributor coupled to the second pad. The oscillator circuit further comprises an oscillator gain element comprising an output node coupled to the first pad and an input node coupled to the second pad. The oscillator circuit also comprises a digital-to-analog converter (DAC) coupled to the first pad. The oscillator circuit additionally comprises a switching circuit coupled to the gain element. The switching circuit is configured to enable the gain element when the oscillator comprises a resonator and disable the gain element when the oscillator comprises a voltage controlled oscillating module.

Abstract: According to one embodiment, a semiconductor switch includes a voltage generator, a voltage controller, a driver, and a switch unit. The voltage generator generates a negative first potential. The voltage controller controls the first potential according to a terminal switch signal input from an outside. The driver is input the terminal switch signal, and outputs at least one selected from the first potential and the second potential based on the terminal switch signal. The second potential is a power supply voltage or is higher than the power supply voltage. The switch unit is provided on an SOT substrate, switches a connection between an antenna terminal and any one of high frequency terminals based on the output of the driver.

Abstract: A transmitter front-end for wireless chip-to-chip communication, and potentially for other, longer range (e.g., several meters or several tens of meters) device-to-device communication, is disclosed. The transmitter front-end includes a distributed power amplifier capable of providing an output signal with sufficient power for wireless transmission by an on-chip or on-package antenna to another nearby IC chip or device located several meters or several tens of meters away. The distributed power amplifier can be fully integrated (i.e., without using external components, such as bond wire inductors) on a monolithic silicon substrate using, for example, a complementary metal oxide semiconductor (CMOS) process.

Abstract: A power amplifier includes: an amplification element amplifying an input signal; and a bias circuit supplying a bias current to an input of the amplification element. The bias circuit includes a reference voltage terminal to which a battery voltage is applied from a battery, a first resistor having a first end connected to the reference voltage terminal, a second resistor connected between a second end of the first resistor and ground, and a first transistor. The first transistor has a control terminal connected to a connection point between the first resistor and the second resistor, a first terminal connected to a power supply, and a second terminal connected to the input of the amplification element. The first and second resistors are the same material.

Abstract: An apparatus and method for enhancing the whole efficiency of power amplification in a supply modulated amplifier are provided. The power amplification apparatus includes a controller, a Doherty power amplifier, and a supply modulated amplifier. The controller selects a power amplifier among the Doherty power amplifier and the supply modulated amplifier. The Doherty power amplifier amplifies a power of a transmission signal when the Doherty power amplifier is selected by the controller. The supply modulated amplifier amplifies the power of the transmission signal using a supply voltage determined considering the amplitude of the transmission signal, when the supply modulated amplifier is selected by the controller.

Abstract: A traveling wave amplifier (TWA) with suppressed jitter is disclosed. The TWA includes a plurality of unit amplifiers with the differential arrangement comprised of a pair of transistors and a cascade transistors connected in series to the switching transistors. The unit amplifiers further includes current sources to provide idle currents to the cascade transistors. Even when the switching transistors fully turn off, the idle currents are provided to the cascade transistors, which set the operating point of the cascade transistor in a region where an increase of the base-emitter resistance is suppressed.

Abstract: An audio-output amplifier circuit for an audio device includes an output amplifier and a switching element connected between an amplifier-output terminal of the output amplifier and ground, to short-circuit the amplifier-output terminal of the output amplifier after transition to ground-level voltage is finished.

Abstract: Circuits for reducing power consumption in power amplifier circuits are disclosed. In certain embodiments, a circuit for power control in the transmitter includes a coupling circuit, a first power amplifier circuit and a second power amplifier circuit. The coupling circuit includes a primary winding inductively associated with a first secondary winding and a second secondary winding. The coupling circuit provides a signal at output terminals of the first secondary winding and the second secondary winding in response to a signal at the primary winding. A first power amplifier circuit is coupled with output terminals of the first secondary winding, and a second power amplifier is coupled with output terminals of the second secondary winding. The first power amplifier circuit and second power amplifier circuit are configured to be enabled or disabled based on a bias voltage.

Abstract: Disclosed is a multi-band power amplifier capable of operating at multiple frequency bands. The multi-band power amplifier includes: a power amplification unit which amplifies an input signal; a matching network circuit which provides impedance matching between the power amplification unit and a load; and an auxiliary amplification unit which additionally supplies a certain magnitude of electric current to the load.

Abstract: Disclosed are CMOS-based devices for switching radio frequency (RF) signals and methods for biasing such devices. In certain RF devices such as mobile phones, providing different amplification modes can yield performance advantages. For example, a capability to transmit at low and high power modes typically results in an extended battery life, since the high power mode can be activated only when needed. Switching between such amplification modes can be facilitated by one or more switches formed in an integrated circuit and configured to route RF signal to different amplification paths. In certain embodiments, such RF switches can be formed as CMOS devices, and can be based on triple-well structures. In certain embodiments, an isolated well of such a triple-well structure can be provided with different bias voltages for on and off states of the switch to yield desired performance features during switching of amplification modes.

Abstract: An amplifier circuit includes a digital amplifier configured to amplify an input signal to output a first output signal, an analog amplifier configured to amplify the input signal to output a second output signal, a check circuit configured to produce a check signal responsive to frequencies of the input signal, and a selector circuit configured to select and output one of the first output signal and the second output signal in response to the check signal.

Abstract: There is provided an amplifying apparatus which can prevent characteristic deterioration while reducing costs. The amplifying apparatus includes a first amplifier connected between an input terminal to which a high-frequency signal is input and an output terminal through which the high-frequency signal is output, including a bipolar transistor, and amplifying the high-frequency signal input from the input terminal; a second amplifier including a bipolar transistor, amplifying the high-frequency signal input from the input terminal, and having a lower maximum output power than that of the first amplifier; and a switching unit connected between the second amplifier and the output terminal, and selectively outputting the high-frequency signal amplified by the second amplifier through the output terminal.

Abstract: A sound output device is provided. The sound output device includes a vacuum tube for amplifying an audio signal; a power supply that supplies power to the vacuum tube; a first switch circuit that selectively connects the power supply to the vacuum tube; and a controller that controls the first switch circuit according to whether the vacuum tube is used.

Abstract: In a representative embodiment, a multiple mode power amplifier that is operable in a first power mode and a second power mode. The multiple mode power amplifier comprises a first amplifying unit; a second amplifying unit; a first impedance matching network connected to an output port of the first amplifying unit; a second impedance matching network connected to an output port of the second amplifying unit and to the first impedance matching network; and a third impedance matching network connected to the output ports of the first and the second amplifying units. The third impedance matching network reduces a phase difference between signals amplified by the first and the second amplifying units in the first mode.

Abstract: The invention provides an analog circuit that decreases an effect of variation of a transistor. By flowing a bias current in a compensation operation, a voltage between the gate and source of the transistor to be compensated is held in a capacitor. In a normal operation, the voltage stored in the compensation operation is added to a signal voltage. As the capacitor holds the voltage according to the characteristics of the transistor to be compensated, the effect of variation can be decreased by adding the voltage stored in the capacitor to the signal voltage. Further, an analog circuit which decreases the effect of variation can be provided by applying the aforementioned basis to a differential circuit, an operational amplifier and the like.

Abstract: A switchplexer is described. The switchplexer includes switches that are coupled to an antenna. The switchplexer also includes ports. Each of the switches is separately coupled to one of the ports. The switchplexer also includes controlling circuitry coupled to the switches. The controlling circuitry concurrently closes at least two of the switches when indicated by a control signal.

Abstract: An Extremely High Frequency (EHF) dual-mode PA with a power combiner is designed using 40-nm bulk CMOS technology. One of the unit PAs can be switched off for the low power applications. In the design, circuit level optimization and trade-off are performed to ensure the good performance in both modes. The PA achieves a PSAT of 17.4 dBm with 29.3% PAE in high power mode and a PSAT of 12.6 dBm with 19.6% PAE in low power mode. The reliability measurements are also conducted and a lifetime of 80613 hours is estimated based on a commonly used empirical model. The excellent performance (e.g., highest reported PAE) achieved in this design further confirms the scaling of CMOS technology will continue to benefit the mm-wave transceiver design.

Abstract: A low noise amplifier (LNA) includes a bank of selectable first transistors and a bank of selectable second transistors complementary to the first transistors. The LNA also includes a plurality of switches to select one or more of the first transistors and to select one or more of the second transistors, the selected first transistors positioned in series with respect to the selected second transistors. The LNA also includes switching logic to control the plurality of switches, to simultaneously vary selection of the first transistors and the second transistors during calibration to substantially match output second-order distortion of the selected first transistors with that of the selected second transistors, to create high second-order intercept points.

Abstract: Embodiments include but are not limited to apparatuses and systems including a quadrature lattice matching network including first path having a series inductor and a shunt inductor, and a second path having a series capacitor and a shunt capacitor. Other embodiments may be described and claimed.

Abstract: Apparatus for generating a first signal (e.g., a pulse) including a current source adapted to generate a current based on a second signal that defines an amplitude of the current and a third signal that defines the timing of an amplitude change of the current, and an impedance element through which the current flows to generate the first signal. The impedance element may comprise a resonator having a resonant frequency approximate the center of the first signal frequency spectrum. An LO may be used to generate the third signal to control the timing of the amplitude change of the current. A detector may enable the current source in response to detecting a defined steady-state condition of the LO clock signal, and may disable the current source in response to the completion of the first signal. A controller may generate the second signal to control the current amplitude so as to perform power control and/or other functions.

Abstract: An apparatus for amplifying power is provided. The apparatus includes a supply modulator for generating a supply voltage based on an amplitude component of a transmission signal, and a power amplify module for amplifying power of the transmission signal using the supply voltage, wherein the power amplify module includes a first power amplifier and a second power amplifier, and when an output power of the transmission signal is greater than a reference power, the first power amplifier amplifies the power of the transmission signal using the supply voltage, and when the output power of the transmission signal is equal to or less than the reference power, the second power amplifier amplifies the power of the transmission signal using the supply voltage.

Abstract: A circuit includes a first circuit module with a first input node, a second input node and an output node. The first circuit module receives an input signal at the first input node and generates an amplified signal at the output node. The circuit further includes a second circuit module coupled between the output node and a reference potential line. The second circuit selectively draws a current from the output node in response to a first control signal. The first control signal is generated in response to sensing a voltage fluctuation at a power supply node which supplies power to the first circuit module.

Abstract: The amplifying circuit includes: an input transistor having a gate electrode connected to a signal input terminal inputting a wireless signal, a drain electrode connected to a power supply terminal, and a source electrode connected to a ground terminal; a first switch installed between the signal input terminal and the gate electrode; and a second switch installed between the power supply terminal and the drain electrode, wherein the input transistor has a predetermined bias voltage applied to the gate electrode thereof to simultaneously turn the first and second switches on during reception of the wireless signal and simultaneously turn the first and second switches off while applying the predetermined bias voltage to the gate electrode during transmission of the wireless signal.

Abstract: The present invention discloses a Doherty power amplifier and an implementation method thereof. A peak amplifying circuit of the Doherty power amplifier comprises a radio frequency switching circuit configured to control turn-on of the peak amplifying circuit; wherein a last stage carrier amplifier of a carrier amplifying circuit of the power amplifier uses a HVHBT device, and a last stage peak amplifier of the peak amplifying circuit of the power amplifier uses a GaN device. The present invention avoids the shortcoming when the peak branches in the Doherty power amplifier are turned on ahead of time, decreases power consumption of the peak amplifier and improves the batch efficiency of the whole Doherty power amplifier.

Abstract: The invention provides an analog circuit that decreases an effect of variation of a transistor. By flowing a bias current in a compensation operation, a voltage between the gate and source of the transistor to be compensated is held in a capacitor. In a normal operation, the voltage stored in the compensation operation is added to a signal voltage. As the capacitor holds the voltage according to the characteristics of the transistor to be compensated, the effect of variation can be decreased by adding the voltage stored in the capacitor to the signal voltage. Further, an analog circuit which decreases the effect of variation can be provided by applying the aforementioned basis to a differential circuit, an operational amplifier and the like.

Abstract: A circuit and a method for correcting an offset is provided that includes a current amplifier and an adjusting circuit for correcting an offset of an output current of the current amplifier. Wherein the adjusting circuit has a controlled current source, an output of the controlled current source is connected to the current amplifier for impressing an output current of the controlled current source in the current amplifier, an input of the controlled current source to form a regulation element of a control loop is connected by a first switching device of the adjusting circuit to an output of the current amplifier and to form a holding element is disconnected from the output of the current amplifier by the first switching device.

Abstract: The present invention discloses a Doherty power amplifier and a method for implementing the Doherty power amplifier. The Doherty power amplifier includes a peak amplifying branch and a carrier amplifying branch, wherein, the peak amplifying branch includes a radio frequency switch, and the radio frequency switch is configured to control on/off of a last stage peak power amplifier in the peak amplifying branch; wherein, a high voltage heterojunction bipolar transistor (HVHBT) device is adopted for a last stage carrier power amplifier of the carrier amplifying branch, and a laterally diffused metal oxide semiconductor (LDMOS) device is adopted for the last stage peak power amplifier of the peak amplifying branch of the power amplifier. By the present invention, it avoids that the peak power consumption is increased when the peak power amplifier is on ahead of time and enhances the efficiency of the whole power amplifier.

Abstract: The switching arrangement is used for the redundant power supply for a power amplifier, especially a high-frequency power amplifier. The power amplifier in this context provides several output-stage components and several power-supply units. The power-supply units are connected together at their load-end connections and supply the output-stage components jointly with energy. If a power-supply unit fails, at least two output-stage components are actively switched off, so that the power amplifier can continue to operate although with reduced output power.

Abstract: Exemplary embodiments are directed to a transmitter with a power amplifier and a switched output matching circuit implementing a plurality of output paths for a plurality of operating modes is described. The power amplifier receives an input RF signal and provides an amplified RF signal. An output matching network performs impedance transformation from low impedance at the power amplifier output to higher impedance at the matching network output. The plurality of output paths are coupled to the output matching network. Each output path provides a different target output impedance for the power amplifier and routes the amplified RF signal from the power amplifier to an antenna when that output path is selected. Each output path may include a matching network coupled in series with a switch. The matching network provides the target output impedance for the power amplifier when the output path is selected. The switch couples or decouples the output path to/from the power amplifier.

Abstract: An apparatus and method amplify a signal for use in a wireless network. The apparatus includes a power amplifier, an envelope modulator, a tunable matching network (TMN), and a controller. The power amplifier outputs the signal at an output power. The envelope modulator controls a bias setting for the power amplifier. The TMN includes a plurality of immittance elements. The controller is operably connected the envelope modulator and the TMN. The controller identifies a desired value for the output power of the power amplifier, controls the output power of the power amplifier by modifying the bias setting of the power amplifier, and sets a number of the plurality of immittance elements based on the bias setting of the power amplifier.

Abstract: The embodiments disclosed in the detailed description include a power amplifier having a low power mode amplifier, a medium power mode amplifier, and a high power mode amplifier in communication with a radio frequency (RF) output load. The exemplary embodiments of the power amplifier permit a wireless device to select the most power efficient means to transmit an RF signal based upon the desired output power level.

Abstract: A power amplifier architecture includes high and low power paths. The high power path may include a number of different amplifier structures. The low power path includes a switching element configured to short a signal line to ground or provide an open between the signal line and ground. The low power path and an output of the high power path are summed at a summing junction. Circuitry, responsive to one or more control signals, is configured in a high power mode to turn on amplifier(s) in the amplifier structure, route an input signal through a driver amplifier to the high power path and place the switching element in one of the open/closed positions; the circuitry is configured in a low power mode to turn off the amplifier(s), route the input signal through a driver amplifier to the low power path and place the switching element in the other position.

Abstract: An electronic circuit has a differential amplifier with a differential transistor pair having two transistors. The electronic circuit also has two digital-to-analog converters, a respective one of the two digital-to-analog converters coupled to each respective one of the two transistors. Control bits adjust the DACs to provide an offset voltage adjustment of the differential amplifier.

Abstract: A circuit for optimizing a power management system. The circuit includes a first amplifier. The first amplifier is responsive to a first reference signal and operable to supply a first load current. The circuit also includes a second amplifier coupled to the first amplifier. The second amplifier is responsive to a second reference signal and operable to supply a second load current. The second load current is lower in magnitude than the first load current, thereby enabling the first amplifier to operate during a first load condition, and the second amplifier to operate during the first load condition and a second load condition. Further, the circuit includes a resistive element coupled to the first amplifier and the second amplifier, to isolate the first amplifier from the second amplifier.

Abstract: A circuit breaker comprising first and second JFETs, each comprising a gate, drain and source connection, the JFETs sources being operatively connected to each other to form a common-source connection and adapted to be connected to and operating to open an external circuit when the current flowing through the JFETs exceeds a predetermined threshold, the JFETs' gates, and common-source connection being operatively connected to a gate driver circuit which causes the JFETs to turn off when the predetermined threshold is exceeded; whereupon the current flows through the common-source connection into the second gate and into the gate driver circuit which causes the gate driver circuit to turn off the first and second JFETs and open the circuit breaker. Also claimed is a method of sensing an overloaded circuit comprising leading and trailing JFETs in a circuit that open the circuit and prevent current flow when a predetermined threshold is exceeded.

Abstract: According to the present invention, a switched capacitor circuit comprises: an inverting amplifier for removing the offset by using a chopper stabilization circuit; a sampling unit which is connected between an input terminal and the inverting amplifier; and a feedback unit which is connected to the inverting amplifier in parallel.

Abstract: A multi-band, multi-standard programmable power amplifier having tunable impedance matching input and output networks and programmable device characteristics. The impedance of either or both of the impedance matching input and output networks is tunable responsive to one or more control signals. In one example, the programmable power amplifier incorporates a feedback control loop and the control signal(s) are varied responsive to the feedback loop.