Abstract: Provided is a detector device including: an amplifier (AMP1) for amplifying a voltage of an input electric signal and outputting the amplified electric signal; a first detector circuit (Det1) for outputting a first detection signal having a current corresponding to the voltage of the input electric signal; a second detector circuit (Det2) for outputting a second detection signal having a current corresponding to the voltage of the input electric signal; and a current summing circuit (SUM1) to which the first detection signal and the second detection signal are input, for outputting a third detection signal having a current value obtained by summing current values of the first detection signal and the second detection signal, in which an input signal to be detected is divided into two, one of the divided signals being input to the first detector circuit (Det1) and the other of the divided signals being input via the amplifier (AMP1) to the second detector circuit (Det2).

Abstract: A voltage detection circuit including a comparator circuit, a tunable gain circuit and a switch circuit is disclosed. The comparator circuit has a first input terminal and a second input terminal. The tunable gain circuit is coupled between the first input terminal and a reference signal. The tunable gain circuit has a plurality of gain configurations. The tunable gain circuit adjusts the reference signal and transmits the adjusted reference signal to the first input terminal. The switch circuit selectively transmits a signal under test or the reference signal to the second input terminal. When the voltage detection circuit is in an auto-trimming mode, the switch circuit transmits the reference signal to the second input terminal and the tunable gain circuit sequentially adopts the gain configurations until the comparator circuit detects that voltage levels of the first input terminal and the second input terminal are substantially equal.

Abstract: An adaptive amplification circuit is disclosed, which includes an operational amplifier including a variable bias current source for providing a variable bias current for the operational amplifier, a simulation unit for simulating operational characteristics of the operational amplifier and transforming a simulation input voltage to a simulation output voltage, and a bias control unit for generating a bias control signal to the variable bias current source according to the simulation output voltage so as to adjust the variable bias current.

Abstract: An audio amplification circuit is provided having an amplifier that receives an input signal, an output, and a digital control input for receiving a control value in a number n of bits; a comparator having a first input that receives the amplifier's output signal image, a second input that receives a reference potential, and an output; and a thermometer counter having a selection input coupled to the comparator output, and an output delivering an n-bit digital value to the amplifier control input. The amplifier comprises a differential input stage having a first and a second differential branch, each traversed by a bias current, the current in the first branch being modifiable by n basic current sources which each deliver either a current identical for all current sources, or no current, as a function of one respective bit of the digital control value received at the control input.

Abstract: In order to realize a wider bandwidth of a frequency characteristic of a power amplification circuit, outputs of differential push-pull amplifiers which are matched at respectively different frequencies are combined together by secondary inductors, and the combined signal is outputted.

Abstract: A circuit includes a first input terminal for receiving a first pulsed voltage and a second input terminal for receiving a second pulsed voltage. The circuit further includes a load and an LC filter. The LC filter includes a coupled inductor pair that includes a first winding and a second winding magnetically coupled to each other. The first winding is coupled between the first input terminal and the load, and the second winding is coupled between the second input terminal and the load. A frequency of a first current flowing through the first winding is increased by the second pulsed voltage applied to the second winding.

Abstract: A non-inverting amplifier includes an operational amplifier, an input resistor, and a feedback resistor. The operational amplifier amplifies and outputs a difference between an input voltage and a voltage of a control node. The input resistor is connected between a reference voltage port and the control node. The feedback resistor is connected to an output port of the operational amplifier and the control node. The non-inverting amplifier supplies a control current to the control node for controlling an offset voltage of the output port.

Abstract: A switched-capacitor circuit including at least one first capacitor and a circuit for switching at least one armature of the first capacitor alternately to one and the other of two terminals at a switching frequency. The circuit further includes a second capacitor connected to the first capacitor at a node; and a filtering circuit connecting the node to a virtual ground only for frequencies belonging to a frequency range.

Abstract: Signal processing circuit for voltage signals from electrodes of a magneto-inductive, flow measuring device, wherein two measuring electrodes are connected with a fully differentially working amplifier having two inputs and two outputs.

Abstract: To efficiently obtain two outputs including one at a normal level and the other at an excessive level. An input signal input to the negative input terminal of an operational amplifier (14) having a negative feedback path is amplified to output an output signal. Signal combining units (18, 20, 22) are provided for adding in a weighted manner a negative input terminal side signal obtained by combining the input signal input to the negative input terminal of the operational amplifier (14) and a feedback signal from the negative feedback path and the output signal from the operational amplifier to output a combined signal, so that two signals, namely the output signal from the operational amplifier (14) and the combined signal, are obtained.

Abstract: The present invention relates to an amplifying unit comprising: a pull up down unit pulling up or pulling down a positive GMR signal and a negative GMR signal provide by a GMR sensor; a GMR amplifying unit including a plurality of amplifying units generating a GMR signal by amplifying a difference between the stand-alone type signal and the negative GMR signal according to the GMR sensor; a low pass filtering unit attenuating noise of the GMR signal; a reference converting unit generating a reference voltage having a predetermined range for generating a GMR signal; and a gain converting unit amplifying the GMR signals inputted to the plurality of amplifying units by several ten or hundred times.

Abstract: An audio host device has an electrical interface having a speaker contact, a microphone contact, and a reference contact. The reference contact is shared by a microphone and a speaker. The reference contact is also directly coupled to a power return plane of the audio host device. A difference amplifier is provided, having a cold input and a hot input. The hot input is coupled to the microphone contact. A switched attenuator circuit is also provided that has first and second states. In the first state, the attenuator circuit couples a sense point of the reference contact to the cold input, while in the second state the cold input is isolated from the reference sense point. Other embodiments are also described and claimed.

Abstract: Techniques for providing an instrumentation amplifier having a plurality of selectable gain settings. In an exemplary embodiment, a gain adjustment block for accepting a differential input voltage is coupled to a differential-to-single-ended conversion block for generating a single-ended output voltage. The gain adjustment block may have a plurality of gain settings selectable by one or more switches. The instrumentation amplifier advantageously offers precise gain control without the need for external calibration, while being robust and simple to design.

Abstract: A signal generating apparatus comprises an amplifier, which comprises differential input terminals for receiving a first input signal, a common mode output signal adjusting terminal for receiving a second input signal, and an output terminal. The signal generating apparatus may provide two or more differential output signals according to the first input signal, and provide two or more common mode output signals according to the second input signal. The amplifier provides an output signal comprising one of the differential output signals and one of the common mode output signals at the output terminal.

Abstract: A nanothermocouple detector includes a nanowire coupled across two electrodes. The two electrodes are electrically connected to an amplifier. The two electrodes generally have a separation of about five micrometers to about thirty micrometers across which the nanowire is coupled. A focusing element is disposed to admit photons that fall on the focusing element onto the nanowire to heat it. A voltage change across the nanowire caused by the heating of the nanowire by the light is detected by the amplifier. The voltage change corresponds to the energy absorbed from the light by the nanowire. The color of a single photon can be detected using such device. An array of such devices can be used for sensing light on a two-dimensional scale, thereby providing an image showing small variances in the energies of the light impinging upon the detector array.

Abstract: A differential chopper comparator compares an input signal voltage and a first voltage, and includes a first capacitor, a second capacitor, and a differential amplification unit including a differential amplification circuit. Either the input signal voltage or the first voltage is applied to one end of the first capacitor via a first switch unit. A fixed voltage is applied to one end of the second capacitor via a second switch unit. Either a non-inverting input terminal or an inverting input terminal of the differential amplification circuit is connected to the other end of the first capacitor, and the other terminal is connected to the other end of the second capacitor. An impedance of the first switch unit side viewed from one end of the first capacitor and an impedance of the second switch unit side viewed from one end of the second capacitor are substantially same.

Abstract: The invention relates to systems and methods for high-sensitivity detection of input bias current. The invention more particularly relates to platforms and techniques for the calibration and measurement of input bias current in op amps or other devices. In embodiments, the platform can incorporate a servo loop connected to a high-sensitivity test amplifier, such as an instrumentation amplifier. The test amplifier can complete a switchable circuit with the servo loop and detect a calibration input bias current for the test platform, without a production device in place. The device under test can be switched into the servo loop, and the total bias current measured with both the device under test and test amplifier in-circuit. The difference between the measured current with the device inserted and the previously measured calibration current represents the bias current for the subject device, without attaching external meters or requiring reference parts of the production type.

Abstract: The embodiments of the present invention disclose a high power-supply rejection ratio (PSRR) amplifier circuit. The amplifier circuit comprises a low dropout regulator, a negative charge pump and an amplifier. The output voltages of the negative charge pump and the low dropout regulators don't track the change of input voltage. Therefore the amplifier circuit has high PSRR.

Abstract: An amplifier system providing improved Cartesian feedback is provided. A complex band pass error amplifier is provided. A quadrature up converter is connected to the complex band pass error amplifier so as to receive as input, output from the complex band pass error amplifier. An amplifier is connected to the quadrature up converter so as to receive as input, output from the quadrature up converter. A quadrature down converter is connected at or beyond the amplifier output so as to receive as input a signal proportional to that delivered by the amplifier as output to a load, wherein the complex band pass error amplifier is connected to the quadrature down converter so as to receive as a first input, output from the quadrature down converter and as a second input, a quadrature reference signal.

Abstract: An amplifier has an input section with one or more input cells and an output section with one or more output cells. Either the input section or the output section includes at least two cells that may be selected to provide discrete gain settings. A loop amplifier is configured in a feedback arrangement with the input section. The input and output sections may have multiple selectable cells to provide coarse and fine gain steps. The gain of the loop amplifier may be coordinated with the gain of the input section to provide constant bandwidth operation.

Abstract: According to one embodiment, an improved preamplification chain for implementation in a transmitter comprises a frequency conversion stage for up-converting a baseband signal to a transmit signal, a variable gain control power amplifier driver for preamplifying the transmit signal, and a differential feedback calibration stage receiving first and second differential outputs of a current steering unit of the power amplifier driver and providing calibration feedback to a baseband signal generator of the transmitter. In one embodiment, the frequency conversion stage includes an adjustable low-pass filter for filtering the baseband signal, a passive mixer for up-converting the baseband signal to the transmit signal, and a clock conversion unit configured to convert a fifty percent (50%) duty cycle clock input to a twenty-five percent (25%) duty cycle clock output for driving the passive mixer.

Abstract: An operational amplifier with two pairs of differential inputs for use with an input switch capacitor network. The operational amplifier has reset devices for resetting the second pair of differential inputs while amplifying the first pair of differential inputs, and for resetting the first pair of differential inputs while amplifying the second pair of differential inputs for reducing memory effect in electronic circuits. In an embodiment, the amplifier has an additional reset device for resetting the outputs during a prophase of amplifying the first pair of differential inputs and a prophase of amplifying the second pair of differential inputs.

Abstract: An amplifier circuit on a single die comprises a low voltage amplifier with a first common mode voltage and having an input and an output. A power amplifier has a second common mode voltage whose input is operably coupled to an output of the low voltage amplifier. The first common mode voltage and second common mode voltage are unequal. A compensation circuit is operably coupled to an input of the power amplifier and arranged to inject a DC-current or apply a common mode voltage into the power amplifier that is representative of a difference between the first common mode voltage and the second common mode voltage.

Abstract: The present invention covers novel approaches to the differential amplification of an input signal. Embodiments of the present invention have precise gain, swing to within micro-volts (?V) of ground, and have high CMRR without the need for precision resistors or tuned potentiometers. Embodiments of the present invention are particularly suited for the amplification of an instrumentation signal for delivery to an analog-to-digital converter. Examples of such signals include the product of a strain-gauge front end, a temperature sensor front end, and certain devices for bioelectronics detection.

Abstract: According to one embodiment of the invention, a summing circuit comprises a first transmitter, a second transmitter, a first current offset circuit and a first transconductance amplifier. The first current offset circuit is coupled to the emitters of the first and second transistors. The first transconductance amplifier is coupled to the first current offset circuit.

Abstract: A chopper-stabilized circuit (1) includes pre-chopping circuitry (26) for chopping an input signal (Vin) at a first frequency to generate a first signal. Input chopping circuitry (9) chops the first signal at a second frequency substantially greater than the first frequency to produce a second signal. The first frequency is a sub-harmonic of the second frequency. Post-chopping circuitry (30) chops the second chopped signal at the first frequency to produce a third signal that is applied to an input of a signal conditioning circuit (2). The output chopping circuitry (10) chops an output of the signal conditioning circuit at the second frequency to generate a fourth signal. The fourth signal is filtered.

Abstract: A device and a method for eliminating feedback common mode signals are provided, which belong to the electronic technology field. The device includes an operational amplifier circuit with two output ends. The two output ends are a first output end and a second output end. The device also includes a feedback unit. The feedback unit is configured to receive level signals of the first output end and the second output end of the operational amplifier circuit, and superpose feedback common mode signals to input ends of the operational amplifier circuit according to states of the level signals. The method includes: the feedback unit receives level signals of a first output end and a second output end of an operational amplifier circuit, and superposes feedback common mode signals to the input ends of the operational amplifier circuit according to the states of the level signals.

Abstract: A differential Low Noise Amplifier (LNA) includes a first stage of resistive feedback amplifiers and second stage of complementary amplifiers, where the outputs of the first stage are coupled to the inputs of the second stage in a cross-coupled fashion. An inductive load, such as a transformer, combines signals output from the complementary amplifiers of the second stage. In one example, the LNA has an input impedance of less than 75 ohms, a noise factor of less than 2 dB, and a gain of more than 20 dB. Due to the low input impedance, the LNA is usable to amplify a signal received from a source having a similar low impedance without the use of an impedance matching network between the output of the source and the input of the LNA.

Abstract: For headphone subsystems that employ common ground switches for speaker outputs (for example), there can be a significant issue with cross-talk and ground noise. Here, configurations for an amplifier and switch network are provided, which generally cancel noise from the “ground switch,” so as to provide an improvement over conventional configurations with little overhead. Additionally, the cross-talk for these configurations are not generally dependent on the “ground switch” or speaker impedance.

Abstract: An n-channel integrated circuit device (n is an integer of 1 or greater) for muting an audio signal includes a control circuit configured to generate a control signal and a delayed control signal, a charging and discharging circuit configured to charge and discharge a time constant control terminal according to the control signal and the delayed control signal, an N-th voltage-to-current converting circuit (N is an integer from 1 to n) configured to generate a (2N?1)-th current corresponding to a voltage on the time constant control terminal and a (2N)-th current corresponding to an intermediate voltage, a (2N?1)-th mirror circuit configured to copy the (2N?1)-th current to generate (4N?3)-th and (4N?2)-th intermediate currents, a (2N)-th mirror circuit configured to copy the (2N)-th current to generate (4N?1)-th and (4N)-th intermediate currents, a (2N?1)-th selecting and combining circuit configured to combine a (2N?1)-th mute control current using the (4N?3)-th intermediate current and the (4N?1)-th interm

Abstract: A first low-pass filter circuit includes a first input terminal which receives a sensor signal, a second input terminal, and an output terminal which outputs a first output signal. A second low-pass filter circuit includes an input terminal connected to the second input terminal of the first low-pass filter circuit, and an output terminal. A third low-pass filter circuit includes an input terminal connected to the output terminal of the second low-pass filter circuit, and an output terminal which outputs a second output signal.

Abstract: An amplifier processes a differential input received at a differential input port. The amplifier includes a first amplifier circuit and a second amplifier circuit. The first amplifier circuit is disposed in a first signal path between a first input node and a first output node of the amplifier, and arranged to amplify a first input signal received at the first input node and accordingly generate a first amplified signal to the first output node. The second amplifier circuit is disposed in a second signal path between a second input node and a second output node of the amplifier, and arranged to amplify a second input signal received at the second input node and accordingly generate a second amplified signal to the second output node. A driving capability of the first amplifier circuit is different from a driving capability of the second amplifier circuit.

Abstract: A multistage amplifying circuit includes a first amplifying circuit that either samples a first analog voltage input or amplifies a difference between the first analog voltage and a first digital voltage converted from the first analog voltage, in response to a control signal. A second amplifying circuit either samples a second analog voltage input or amplifies a difference between the second analog voltage and a second digital voltage converted from the second analog voltage, in response to the control signal. A common amplifier receives output voltages of the first amplifying circuit and the second amplifying circuit and either resets the output voltage of the first amplifying circuit and determines an output voltage by using the second amplifying circuit, or resets the output voltage of the second amplifying circuit and determines an output voltage by using the first amplifying circuit, in response to the control signal.

Abstract: A current boost circuit acts as an “eye opener” for a digital bus line. A controlled current injects a fraction of the normal signaling current magnitude from a source driver onto the bus line, after a transition between the two logical states on the bus line is detected. The duration of the additional current injection is a fraction of the unit interval. In one embodiment, a linear system uses the summation of a proportional boost current and a delayed and negated proportional boost current. In another embodiment, a positive or negative edge detection circuit triggers a monostable pulse generator that controls the injection of short bursts of additional current into the bus lines. In some embodiments the boost current is suppressed when the bus line is driven from a driver other than the source driver.

Abstract: A differential voltage sensing method for achieving input impedance matching comprises the steps of: providing a first bio-potential signal to a first variable resistor for generating a first signal; providing a second bio-potential signal to a second variable resistor for generating a second signal; differentially amplifying first and second signals for generating a third signal; selecting an operation band of the third signal for generating first and second logic signals; and dynamically adjusting one of the impedances of the first and second variable resistors according to the first and second logic signals, wherein each of the first and second bio-potential signals has a common signal voltage level and a differential signal voltage level.

Abstract: An operational amplifier includes an input stage for generating a first differential output signal pair according to a first differential input signal pair, an output stage for generating a second differential output signal pair according to at least a second differential input signal pair, and a high-pass filtering circuit coupled between the input stage and the output stage for performing high-pass filtering on the first differential output signal pair, for generating the at least a second differential input signal pair.

Abstract: An electronic system generates at least one floating supply voltage, wherein during operation of the circuit the floating supply voltage tracks a common mode voltage of first and second differential input signals. By tracking the common mode voltage, in at least one embodiment, the floating supply voltage adjusts as the common mode voltage changes. Thus, the floating supply voltages can be based upon the peak-to-peak values of the first and second output signals without factoring in the common mode voltage. In at least one embodiment, the electronic system provides the floating supply voltages to an amplifier. The amplifier amplifies the first and second differential input signals and generates differential output signals. A differential sampling circuit samples the differential output signals to cancel the common mode voltage from the differential output signals. In at least one embodiment, an analog-to-digital converter converts the sampled differential output signals into a digital output signal.

Abstract: A receiving circuit in accordance with an exemplary aspect of the present invention includes a first voltage-dividing circuit that outputs a first input signal obtained by voltage division of one of differential signals based on the resistance ratio between first and second resistors, a second voltage-dividing circuit that outputs a second input signal obtained by voltage division of the other of the differential signals based on the resistance ratio between third and fourth resistors, a differential amplifier that amplifies the differential component between the first and second input signals, a common-mode voltage detection circuit that detects the common-mode voltage of the differential signals, and a bias voltage switching circuit that switches the voltage value of a bias voltage based on the common-mode voltage.

Abstract: A voltage detection circuit includes operational amplifiers, a battery, and a voltage circuit. The voltage circuit offsets the inverting input terminals and non-inverting input terminals of the operational amplifiers to the positive side with reference to a ground GND.

Abstract: Conventional multistage amplifiers oftentimes employ trim circuits or highly matched components to combat noise and offset contributions. Having trim circuitry or highly matched components increases the overall size, cost, and power consumption, so it is desirable to have a circuit that reduces any need for better matching components or trim circuitry. Here, a multistage amplifier system is provided that generally accounts for some noise and offset contributions, reducing the need for better matching components and/or trim circuitry.

Abstract: An amplifier circuit, includes: a first amplifier; a second amplifier; a first capacitor connected to the first amplifier; a second capacitor having one terminal connected to the first amplifier, another terminal connected to the second input terminal; and a first switch circuit switching a connection of the output terminal, the another terminal of the first capacitor, the first input terminal and the second input terminal, and switching supplying a reference potential supply, the first switch circuit including: a first state connecting the first input terminal to the second input terminal, connecting the output terminal to the another terminal of the first capacitor, and supplying the second input terminal with the reference potential, a second state connecting the first input terminal to the another terminal of the first capacitor and providing the output terminal and the second input terminal in an open state.

Abstract: A signal amplifier circuit includes peak value holding circuit 11 receiving positive-phase input signal, peak value holding circuit 12 receiving negative-phase input signal, adder 13 adding the positive-phase input signal and output signal of peak value holding circuit 12, adder 14 adding the negative-phase input signal and output signal of the peak value holding circuit 11, non-inverting amplifier 15 amplifying output signal of adder 13, non-inverting amplifier 16 amplifying output signal of adder 14, peak value holding circuit 21 receiving positive-phase output signal of non-inverting amplifier 15, peak value holding circuit 22 receiving negative-phase output signal of non-inverting amplifier 16, adder 23 adding the positive-phase output signal and output signal of peak value holding circuit 22, adder 24 adding the negative-phase output signal and output signal of peak value holding circuit 21, and differential amplifier 29 amplifying difference between output signals of adders 23 and 24.

Abstract: A circuit in accordance with an embodiment of the present invention includes an instrumentation amplifier, a dynamically adjustable low pass filter, at least one monitor and a controller. The instrumentation amplifier includes a pair of buffered operational amplifiers that accept a pair of input signals, and a differential operational amplifier that outputs an output signal indicative of a difference between the pair of input signals. The dynamically adjustable low pass filter is configured to provide band limiting of the output signal at frequencies greater than a cutoff frequency. The monitor, or monitors, is/are configured to monitor a signal upstream of the instrumentation amplifier and/or a signal downstream of the instrumentation amplifier and output a monitor signal.

Abstract: Cascaded amplifiers with a transformer-based bypass mode are described. In an exemplary design, an apparatus includes first and second amplifiers and a circuit. The first amplifier (e.g., a driver amplifier) provides amplification in a high gain mode and a bypass mode. The second amplifier (e.g., a power amplifier) provides amplification in the high gain mode. The circuit is coupled between the first and second amplifiers and includes a transformer having (i) a primary coil coupled to the first amplifier and (ii) a secondary coil that provides an output signal in the bypass mode. The primary coil may be a load inductor for the first amplifier. The circuit may further include a series combination of a capacitor and a switch coupled in parallel with the primary coil, a switch coupled in series with the secondary coil, and/or a capacitor coupled in parallel with the secondary coil.

Abstract: Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.

Abstract: An output amplifier includes a differential stage having a reference voltage supplied to a first input, a first output stage that receives an output of the differential stage, a second output stage whose output is connected to a load, a capacitor element having a first end connected to a second input of the differential stage, and connection control circuits that control switching of first and second connection modes. In the first connection mode, there are provided a non-conductive state between output of the differential stage and input of the second output stage, a non-conductive state between output of the first output stage and output of the second output stage, a conductive state between output of the first output stage and the second input of the differential stage, and voltage of a second end of the capacitor element is an input voltage from the input terminal.

Abstract: A buffer circuit is driven with a low voltage and operates at a high speed has first and second comparators constituted by P channel and N channel MOS transistors provided between an input terminal and an output terminal of a buffer amplifier. A predetermined offset voltage is set for the comparing operation, and a switch circuit turns ON/OFF in response to an output signal from the first comparator and the output signal of the second comparator. A leading up of an output voltage from the buffer amplifier is accelerated by the current flowing from a power source line to the output terminal. The buffer circuit also includes an operation restricting circuit for restricting the comparing operation of the second comparator in a range of a dead band of the transistors.

Abstract: A feedback amplifier comprises a differential amplifier equipped with differential input terminals and differential output terminal and a first amplifier, wherein the differential output terminal is connected to input terminal of the first amplifier, wherein output terminal of the first amplifier is connected to one of the differential input terminals, and wherein the gain of the first amplifier decreases for lower frequency component of the signal which the differential amplifier outputs than a predetermined frequency when the output voltage of the differential output exceeds a predetermined value.

Abstract: Techniques for integrating a common-source and common-gate amplifier topology in a single amplifier design. In one aspect, an input voltage is provided to both a common-source amplifier and a common-gate amplifier. The output voltages of the common-source amplifier and the common-gate amplifier are provided to a difference block for generating a single-ended voltage proportional to the difference between the output voltages. When applied to the design of, e.g., low-noise amplifiers (LNA's), the disclosed techniques may offer improved noise performance over the prior art.

Abstract: An apparatus for effecting sound stage expansion in an audio system presenting two sound channels includes: (a) A first signal source coupled for providing at least one first signal representing a first sound channel to at least one first input locus of a first amplifying unit. The first amplifying unit participates in presenting the first sound channel. (b) A second signal source coupled for providing at least one second signal representing a second sound channel to at least one second input locus of a second amplifying unit. The second amplifying unit participates in presenting the second sound channel. (c) At least one first filter unit coupling the first signal source with at least one of the at least one second input locus. (d) At least one second filter unit coupling the second signal source with at least one of the at least one first input locus.