Abstract: System for linear amplitude modulation. Apparatus is provided for linear amplitude modulation of an amplifier. The apparatus includes a processing circuit that receives an amplitude modulation signal and produces one or more amplifier control signals that are coupled to the amplifier. The apparatus also includes a feedback circuit that generates a feedback signal from an output of the amplifier that is input to the processing circuit; and a network that controls a bias of the amplifier in response to the feedback signal to linearize the amplifier's amplitude control.

Abstract: A gain control circuit including a resistor with a first terminal and a second terminal; an operational amplifier with an inverting terminal thereof electrically coupled to said first terminal of said resistor; a non-inverting terminal thereof; and an output terminal thereof; an amplifier circuit for transforming the voltage change of said operational amplifier output into a substantially exponential current change; wherein the output of said amplifier circuit is electrically coupled to said inverting terminal of said operational amplifier. The above described gain control circuit is able to perform wide bandwidth input signal buffering with linearity under low voltage and low power conditions. The circuit also offers low output impedances without the need of additional buffers and hence minimizing circuit size and manufacturing costs.

Abstract: An amplifier circuit comprises a first capacitance having one end that communicates with an input of a first amplifier stage. An amplifier has a first gain, an input that communicates with an opposite end of the first capacitance, and an output. A second capacitance has a first end that communicates with the output of the amplifier and an opposite end that communicates with an input of a second amplifier stage. A broadband buffer has an input that communicates with the output of the amplifier and an output that communicates with the one end of the second capacitance.

Abstract: A nested transimpedance amplifier (TIA) circuit comprises a zero-order TIA having an input and an output. A first operational amplifier (opamp) has an output and an input that communicates with said output of said zero-order TIA. A first power supply input applies a first voltage to the zero-order TIA. A second power supply input receives a second voltage. A charge pump module develops a third voltage based on the first voltage and the second voltage, wherein the third voltage is applied to the opamp.

Abstract: A differential transimpedance amplifier circuit comprises a first operational amplifier having a first inverting input, a first non-inverting input, a first inverting output and a first non-inverting output. A second operational amplifier has a second inverting input, a second non-inverting input, a second inverting output and a second non-inverting output. The second inverting output communicates with the first non-inverting input and the second non-inverting output communicates with the first inverting input. A first feedback element communicates with the first non-inverting input and the first inverting output. A second feedback element communicates with the first inverting input and the first non-inverting output. A third feedback element communicates with the second inverting input and the first inverting output. A fourth feedback element communicates with the first non-inverting input and the first non-inverting output.

Abstract: A transimpedance amplifier comprises a first operational amplifier having an input and an output. A second operational amplifier has an input and an output that communicates with the input of the first operational amplifier. A first feedback element has one end that communicates with the input of the first operational amplifier and another end that communicates with the output of the first operational amplifier, wherein the first feedback element comprises a first capacitance. A second feedback element communicates with the input of the first operational amplifier and another end that communicates with the output of the first operational amplifier.

Abstract: A switched capacitor CMOS amplifier uses a first stage non-inverting CMOS amplifier driving a second stage inverting CMOS amplifier. The first stage amplifier is provided with positive feedback to substantially increase the gain of the first stage amplifier. In the described examples, the positive feedback is provided either by connecting a capacitor from the output to the input of the first stage amplifier or by connecting a shunt transistor in parallel with an input transistor and driving the transistor from the output of the first stage amplifier. The substantially increased gain resulting from the positive feedback allows the gain of the switched capacitor amplifier to be set by the ratio of the capacitance of an input capacitor to the capacitance of a feedback capacitor. The amplifier also includes switching transistors for periodically discharging the input capacitor and the feedback capacitor.

Abstract: Provided herein is a power amplifier having a multiple stage power amplifier section and an output matching network section. The multiple stage power amplifier section can include multiple power amplifier stages with interstage matching circuits located therebetween. The output matching network can be configured to match the multiple stage power amplifier section at multiple different frequencies or frequency bands. The power amplifier device is capable of selective operation within one of multiple different frequencies or frequency bands.

Abstract: An energy-efficient photoreceptor apparatus and a transimpedance amplifier apparatus having high energy-efficiency and low power consumption of which are achieved through multiple distributed gain amplification stages, adaptive loop gain control circuitry and unilateralization, thereby enabling fast and precise performance over a wide range of input-current levels. The high-energy efficiency, robust feedback stability and performance of the present invention can be utilized to achieve sub-milliwatt pulse oximeters and may be employed in other current-to-voltage amplification and conversion applications. The use of analog processing on the outputs of the photoreceptor apparatus also helps lower the overall power of pulse oximeters.

Abstract: A nested transimpedance amplifier (TIA) circuit includes a zero-order TIA having an input and an output, and a first operational amplifier (opamp). The opamp includes an input that communicates with said output of said zero-order TIA, a first transistor driven by said input, a second transistor that is driven by a first bias voltage and communicates with said first transistor, a first current source that communicates with said second transistor, and an output at a node between the first transistor and the second transistor.

Abstract: An amplifier system includes a first amplifier stage having an input and an output. A second amplifier stage has an input and an output, the input of the second amplifier stage being connected to the output of the first amplifier stage. A transistor has a control terminal, a first terminal, and a second terminal, the first terminal of the transistor being coupled to the output of the first amplifier stage and the input of the second amplifier stage. A first capacitance has a first terminal and a second terminal, the first terminal of the first capacitance being connected to the input of the first amplifier stage, the second terminal of the first capacitance being connected to the second terminal of the transistor. A first current source to source current to amplifier system, the first current source being is connected to the output of the first amplifier stage. A second current source will sink current from the amplifier system.

Abstract: Embodiments of a high-linearity low-noise amplifier (LNA) and method are generally described herein. Other embodiments may be described and claimed. In some embodiments, an RF input signal may be amplified with a cascode amplifier and a common-gate stage. The common-gate stage is dynamically biased based on an output voltage of the common-gate stage to allow an output voltage swing to be shared between the cascode amplifier and the common-gate stage.

Abstract: Systems and methods for characterizing amplifiers. A system for characterizing an amplifier in accordance with the present invention comprises a Gaussian signal source for generating a signal in the frequency domain, a notch filter, coupled to the Gaussian Noise source, wherein the notch filter has a notch at a specified frequency and a frequency bandwidth, the frequency bandwidth encompassing the specified frequency, an Inverse Fast Fourier Transform device, coupled to an output of the notch filter, a normalization device, coupled to the Inverse Fast Fourier Transform device, an amplifier under test, coupled to the normalization device, for amplifying the signal generated by the Gaussian signal source, and a measurement device, coupled to an output of the amplifier, for measuring a power output of the amplifier in the frequency bandwidth and a noise output at the specified notch frequency, and for calculating the ratio between the power output and the noise output.

Abstract: The variable gain amplifier includes a bias circuit (BC) 1, a matching circuit (MC) 2, a variable gain resistive feedback amplifier (FA) 3 and an output follower (EA) 4. The resistance values of the load resistance Rc and feedback resistance Rf are changed in cooperation. In a case of making the load resistance Rc a high resistance to set the low noise amplifier to a high gain, the feedback resistance Rf is also made a high resistance, the feedback time constant ?fb(c1)?2?·RfCbe/(1+gmRc) of the closed loop of the resistive negative feedback amplifier 3 becomes substantially constant, and then the amplifier has a gain small in frequency dependency over a wide bandwidth. In a case of making the load resistance Rc a low resistance to set the low noise amplifier to a low gain, the feedback resistance Rf is also made a low resistance. The feedback resistance Rf with the low resistance increases the negative feedback quantity, and thus the amplifier is set to a low gain.

Abstract: A high-frequency electronic switch includes a signal input terminal to which a high-frequency signal to be switched is input, a plurality of amplifying circuits with transistors, to respectively amplify the high-frequency signal to be switched sequentially, the amplifying circuits being cascade-connected in a plurality of stages to the signal input terminal, a signal output terminal which is connected to an output section of an amplifying circuit at final stage among the plurality of amplifying circuits, and which outputs the high-frequency signal to be switched sequentially amplified, a control terminal to which a pulse signal serving as a switching signal having a period of a first level and a period of a second level is input, and a supply current control circuit which makes the plurality of amplifying circuits be in an amplification-operational state by supplying operational current to each of the transistors of the plurality of amplifying circuits in a period when the pulse signal input to the control te

Abstract: A transimpedance amplifier (TIA) circuit comprises an input and an amplifying stage that includes N amplifiers, that generates a first signal and that is AC coupled to the input. A bias stage generates a second signal and that is DC coupled to the input. An output stage is driven by the first signal from the amplifying stage and the second signal from the bias stage.

Abstract: A transimpedance amplifier circuit comprises a first amplifier having an input, an output and a first transconductance. A second amplifier has an input that communicates with the output of the first amplifier, an output and a second transconductance. A first resistance has one end that communicates with the input of the first amplifier. A third amplifier has an input that communicates with the output of the second amplifier, an output and a third transconductance. A fourth amplifier has an input that communicates with the output of the third amplifier, an output and a fourth transconductance. An inverter has an input that communicates with the output of the fourth amplifier and an output that communicates with an opposite end of the first resistance.

Abstract: An ultra wideband low noise amplifier (UWB LNA) and amplification method thereof, providing a substantially achieved bandwidth extension by pole-zero cancellation and utilized to transform input impedance matching up to 50 ohm for gaining low noise figure. The ultra-wideband low noise amplifier is composed of a capacitive-feedback amplifier, a resistive-feedback amplifier, an inductive-feedback amplifier, and a buffer amplifier.

Abstract: An amplifier system includes a first amplifier, a second amplifier, a first capacitance, and a first transistor. The first amplifier has an input and an output. The second amplifier has an input that communicates with the output of the first amplifier. The first capacitance has one end that communicates with the input of the first amplifier. The first transistor has a control terminal, a first terminal that communicates with the output of the first amplifier, and a second terminal that communicates with another end of the first capacitance.

Abstract: A receiver circuit is disclosed which enables a reception signal fed into the receiver circuit by a reception element to be processed—e.g. amplified—with little to no errors. The receiver circuit has a cascode circuit on an input side, which cascode circuit generates an output signal from the reception signal of the reception element. Control means that act on the cascode circuit are connected to the cascode circuit. The control means are configured in such a way that they counteract an increase in a high level of the output signal of the cascode circuit on account of an excessively large input signal from the reception element.

Abstract: A differential cascode amplifier is disclosed that includes in each branch two transistors connected to form a cascode circuit, and has a cross-compensation (neutralization) with at least one pair of capacitors for compensating a parasitic capacitance of a transistor of each branch, wherein in each case, one capacitor of the pair is equal to the parasitic capacitance of the transistor of the associated branch.

Abstract: A variable gain feedback amplifier circuit comprising a degenerated common emitter circuit coupled to an emitter follower circuit, an output of the emitter follower circuit being coupled to an input of the degenerated common emitter circuit via a variable feedback impedance. An automatic gain controller is coupled to the variable feedback impedance in order to reduce a closed loop gain of the variable gain feedback amplifier circuit when required. The degenerated common emitter circuit also comprises a variable emitter impedance that is also controlled by the automatic gain controller so as to counteract a lowering effect of a reduction in the variable feedback impedance on the open-loop gain of the variable gain feedback amplifier circuit.

Abstract: A differential transimpedance amplifier circuit comprises first, second, third and fourth operational amplifiers having a first inverting input, a first non-inverting input, a first inverting output and a first non-inverting output. A first feedback element communicates with the second non-inverting input and the second inverting output. A second feedback element communicates with the second inverting input and the second non-inverting output. A third feedback element communicates with the third non-inverting input and the first inverting output. A fourth feedback element communicates with the third inverting input and the first non-inverting output. A fifth feedback element communicates with the fourth inverting input and the first inverting output. A sixth feedback element communicates with the fourth non-inverting output and the first non-inverting output.

Abstract: An amplifier circuit comprises a first capacitance having one end that communicates with an input of a first amplifier stage. An amplifier has a first gain, an input that communicates with an opposite end of the first capacitance, and an output. A second capacitance has a first end that communicates with the output of the amplifier and an opposite end that communicates with an input of a second amplifier stage. A broadband buffer has an input that communicates with the output of the amplifier and an output that communicates with the one end of the second capacitance.

Abstract: The present invention relates to an amplifier arrangement having a plurality of amplifier stages that form a series circuit. Each amplifier stage comprises a current mirror, the translation ratio of which defines the gain of the amplifier stage. Moreover, a current coupling-out element is provided in each amplifier stage, a partial current being output at said element, and the partial currents are added together in a summation element. An RSSI signal associated with the summed currents is provided at the output of the summation element. The RSSI amplifier arrangement provides constant and thermostable signal amplification, low sensitivity to overvoltages, and exhibits a low current requirement and good radio frequency properties.

Abstract: Provided is a low noise amplifier with a common source and a source degeneration, which has linearity, power gain, noise factor, and lossless input matching. The low noise amplifier includes: a first inductor having one terminal connected to an input terminal receiving a signal; a second inductor having one terminal connected to a ground; a MOS transistor having a gate connected to the first inductor, a source connected to the other terminal of the second inductor, and a drain transmitting a signal; and a variable capacitor connected between the source and gate of the MOS transistor and varying an input matching frequency at the input terminal.

Abstract: A nested transimpedance amplifier (TIA) circuit includes a zero-order TIA having an input and an output. A first operational amplifier (opamp) has an input that communicates with the output of the zero-order TIA and an output. A first feedback resistor has one end that communicates with the input of the zero-order TIA and an opposite end that communicates with the output of the first opamp. A first capacitance has a first end that communicates with the input of the first opamp and a second end that communicates with the output of the zero-order TIA. The gain-bandwidth product of the nested TIA is increased. Differential mode TIAs also have increased gain-bandwidth products.

Abstract: In some embodiments, an apparatus includes an amplifier circuit and a bias circuit coupled to the amplifier. The amplifier circuit includes an input port and an output port, an input port circuit element coupled to the input port, an output port circuit element coupled to the output port, and an internal signal path to couple the input port circuit element to the output port circuit element. The output port is coupled to the input port, the bias circuit, and the internal signal path.

Abstract: A dual-mode analog baseband circuit is implementable on a single IC with reduced chip area. The baseband portion of the IC includes a single dual-mode complex filter that is reconfigurable to be a filter for Bluetooth signals or for wireless local area network (wireless LAN) format signals, such as 802.11b, and includes a single dual-mode amplifier that is reconfigurable to amplify Bluetooth signals or wireless LAN format signals.

Abstract: A regulated cascode amplifier includes a main cascode amplifier and a feed-back amplifier. The main cascode amplifier has an input transistor coupled in a stack with an output transistor at an input control node. The feed-back amplifier including a plurality of transistors with gates of the transistors being coupled together to the input control node and with drains of the transistors being coupled together at a gate of the output transistor. The transistors of the feed-back amplifier are biased from connections to the main cascode amplifier for smaller chip area.

Abstract: A nested transimpedance amplifier (TIA) circuit includes a zero-order TIA having an input and an output. A first operational amplifier (opamp) has an input that communicates with the output of the zero-order TIA and an output. A first feedback resistance has one end that communicates with the input of the zero-order TIA and an opposite end that communicates with the output of the first opamp. A first feedback capacitance has a first end that communicates with the input of the zero-order TIA and a second end that communicates with the output of the zero-order TIA. A capacitor has one end that communicates with the input of the zero-order TIA.

Abstract: An integrated circuit includes a first and a second amplifier circuit each driven by an input signal. The first and second amplifier circuits generate a first and a second control signal on the output side. The control signals are generated independently of one another and drive a first and second controllable resistor of a third amplifier circuit for generating a third control signal. The third control signal is fed back to the first and second amplifier circuits. Depending on the resistance value of the first and second controllable resistors of the third amplifier circuit, an output signal amplified with respect to the input signal is generated at an output terminal of the integrated circuit. The integrated circuit is an input amplifier of an integrated semiconductor memory and permits the input signal to be amplified with a gain independent of a level of the DC component of the input signal.

Abstract: A differential RF non-linear power amplifier employing low-voltage transistors in a cascode configuration uses self-biasing solutions rather than external biasing techniques to overcome transistor breakdown problems. The self-biasing solution ensures that the cascode devices and driver device operate below breakdown voltage limitations. A low resistance circuit is placed in parallel with the self-biased circuitry to mitigate increased on-resistance created by the self-biasing solution. PMOS and NMOS inverter legs provide digital programming of the conduction angle for the power amplifier. Changing the PMOS and NMOS strengths in the chain of inverter legs changes the conduction angle.

Abstract: A signal is applied to the body of a MOSFET to enhance the transconductance of the MOSFET. The signal applied to the body of the MOSFET has essentially the same waveform as an input signal supplied to the gate of the MOSFET, and is shifted by approximately 180 degrees with respect to the input signal. The signal applied to the body of the MOSFET may be provided by a phase-adjusting feedback circuit that generates the signal from a signal representing the output of the MOSFET.

Abstract: A method and apparatus is used to provide DC stabilization and noise reduction in a multistage power amplifier. The invention uses various feedback techniques to stabilize DC levels, which helps to reduce noise. The invention also uses other techniques to reduce noise, and to reduce the noise transfer function in a power amplifier.

Abstract: A CMOS gain stage includes biasing circuitry configured to insure saturation of a subsequent stage without a source follower circuit. The CMOS gain stage is optionally powered by a supply voltage that is greater than a permitted supply voltage for a processes technology that is used to fabricate the CMOS gain stage. In order to protect CMOS devices within the CMOS gain stage, optional drain-to-bulk junction punch-through protection circuitry is disclosed. A variety of optional features can be implemented alone and/or in various combinations of one another. Optional features include process-voltage-temperature (“PVT”) variation protection circuitry, which renders a gain relatively independent of process, voltage, and/or temperature variations. Optional features further include bandwidth enhancement circuitry.

Abstract: An amplifier circuit comprises a first operational transconductance amplifier (OTA) has an input that communicates with the output of the first amplifier. A third amplifier has an input that communicates with the input of the first amplifier and an output. A fourth OTA has an input that communicates with the output of the third amplifier and an output. A feedback resistance communicates with the input and the output of the fourth OTA. A capacitance communicates with the output of the fourth OTA and with the input of the second OTA.

Abstract: An input-stage amplifier (10) operating on a supply voltage (Vdd) and an output-stage amplifier (20) operating on a supply voltage (Vamp) are supplied at the non-inverting input with half the supply voltage as a reference voltage Vref. This allows the output level of the amplifier (10) and the input level of the amplifier (20) to be the same (Vref), thereby allowing connection therebetween via a resistor (21) without any capacitor. Further, resistors (22, 23) connected between the inverting input and the output of the amplifier (20) and between the inverting input and ground potential, respectively, are controlled such that the resistances satisfy R22/R23=Vamp/Vdd?1. This makes the output level of the amplifier (20) equal to Vamp/2.

Abstract: A gain-controlled amplifier capable of dealing with the system for performing the receiving operation continuously, and capable of correcting a change of a DC offset owing to an operation condition such as temperature; a receiver circuit using the gain-controlled amplifier; and a radio communication device installing the receiver circuit. In a gain-controlled amplifier composed of three GCA stages (11)–(13) connected by cascade connection, the center value of an output DC of each GCA stage (11)–(13) is kept to be constant by a common feedback circuit (16)–(18) provided correspondingly to each of the GCA stages (11)–(13), and a DC feedback quantity is made to be changed according to a gain control voltage VG by means of a DC feedback circuit (19) provided between an output side of a last stage of the GCA stages and an input side of a first stage of the GCA stages.

Abstract: The method controls, in a feedback mode, a common collector or common drain amplifier, biased with a voltage applied on a bias node produced by a biasing circuit that generates a temperature compensated reference voltage from which the bias voltage applied on the bias node of the amplifier is derived. The quiescent voltage on the output node of the amplifier is made substantially independent from temperature by sensing the quiescent voltage on the output node, and adjusting the voltage applied on the bias node of the amplifier based upon the difference between the reference voltage and the sensed quiescent voltage for maintaining it constant.

Abstract: An improved amplifier circuit which effectively combines two amplifier stages by utilizing two nested feedback loops so that an inverting amplifier topology is used with a FET input device, operating as a common source/emitter configuration cascoded by the inverting input of an opamp. The circuit operates as a non-inverting amplifier and is connnected to the drain or collector with local nested feedback to (a) independently control the loop gain, (b) linearize its own operation, and (c) control the stability of the circuit. Additional inputs can be summed using a non-inverting summing circuit. One application reduces distortion derived from a high impedance, capacitive input source.

Abstract: An amplifier arrangement is disclosed that includes at least two series-connected, programmable amplifiers. The amplifiers each have a different amplifier step size. In addition, a calibration path is provided which feeds back the output of the second programmable amplifier to the programming inputs of the first and/or second programmable amplifier. The calibration path includes an analog/digital converter and an evaluation and control element. It is thus possible to calibrate away less-than-ideal characteristics, particularly in the case of changes in the gain from one amplifier block to another. The proposed amplifier arrangement and the method for calibration are particularly suitable for use in transmission and reception paths in transceivers which operate continuously over time.

Abstract: A circuit having an input amplifier and a second amplifier that provides the circuit with a unity gain crossover frequency that is higher than a unity gain crossover frequency of the input amplifier is provided. The circuit has a control input coupled to a control input of the input amplifier and also has a first current connection and a second current connection. The circuit further includes an additional amplifier that is connected in series with the second amplifier and is controlled by the input amplifier.

Abstract: A programmable multi-stage amplifier includes a 1st programmable amplifier, a 2nd programmable amplifier, and a control module. The 1st and 2nd programmable amplifiers are coupled in series to amplify an input signal. Each of the 1st and 2nd programmable amplifiers is operably coupled to receive independent gain control signals from the control module. The control module generates the gain control signals by determining the overall gain desired for the programmable multi-stage amplifier and a corresponding gain for each of the 1st and 2nd programmable amplifiers. The factors in which the control module makes this determination are based on an optimization of at least one of the power level of the programmable multi-stage amplifier, the noise factor for the programmable multi-stage amplifier, and/or linearity of the programmable multi-stage amplifier.

Abstract: Variable gain amplifiers offering high frequency response with improved linearity and reduced power dissipation are provided. An amplifier is disclosed that is constructed from a one-stage topology with multiple signal paths and compensation networks for improved linearity and stable operation. In this amplifier, improved performance is obtained by replacing single transistor components with enhanced active devices which incorporate local negative feedback. One embodiment of the invention is a transconductance enhancement circuit that improves transconductance and input impedance relative to the prior art. A further development is an enhanced active cascode circuit that provides improved linearity. A high frequency bipolar transistor switch is also disclosed that incorporates lateral PNP transistors as high frequency switches with improved OFF-state to ON-state impedance ratio to realize a variable gain function.

Abstract: In order to rapidly control the gains of a plurality of variable gain amplifiers VGAs, each of gain control circuits is configured to determine a gain to be set therein, based on gain control information received from other gain control circuits existing in its preceding stage or stages and the signal level detected by a level detector circuit connected thereto. By carrying out such gain control, a total application gain is stabilized more quickly by gain control. Therefore, even in receiving systems that the preparation period for reception is very short, desired gain control is achieved within this period and stable data reception can be performed.

Abstract: A compensation circuit is provided for an amplifier including at least first and second amplifier stage. The circuit includes a first capacitance including one end that communicates with an input of the first amplifier stage. An amplifier includes a first gain, an input that communicates with an opposite end of the first capacitance, and an output. A second capacitance includes a first end that communicates with the output of the amplifier and an opposite end that communicates with an input of the second amplifier stage. A first impedence includes one end that communicates with the input of the first amplifier stage and an opposite end that communicates with an output of the second amplifier stage.

Abstract: The present invention provides a semiconductor device comprising a semiconductor substrate, and transistors formed on the semiconductor substrate, wherein control electrode terminals constituting external electrode terminals of the transistors, and first electrode terminals which transmit output signals, are provided on a main surface of the semiconductor substrate, wherein the control electrode terminals are provided at least one, and a plurality of the first electrode terminals are arranged on one side and a plurality of the first electrode terminals are arranged on the other side with the control electrode terminals being interposed therebetween, wherein a portion including the control electrode terminals and a plurality of the first electrode terminals located on one side of the control electrode terminals constitute a first transistor portion, and wherein a portion including the control electrode terminals and a plurality of the first electrode terminals located on the other side of the control electrode

Abstract: Receiver comprising a resonance amplifier for selectively amplifying a modulated carrier signal being coupled to signal demodulator for narrow band demodulation. The resonance amplifier comprising a cascade of first and second transconductance amplifiers (TC1, TC2) being included in a loop, outputs thereof being coupled via first and second parallel RC filters (R1C1; R2C2) to inputs of the second and first transconductance amplifiers (TC1, TC2), respectively, the loop also includes a signal inverter (INV) for signal inversion.

Abstract: A column driver for a graphics display has reduced power consumption by sharing power between upper and lower column amplifiers. The upper column amplifier operates over an upper supply range, while the lower column amplifier operates over a lower supply range. The upper and lower amplifiers have the substantially the same quiescent operating current such that the total operating current for the column drivers in the graphics display is reduced by a factor of two. Each column amplifier can be driven over half of the power-supply range such that lower voltage amplifiers may be employed for the column driver amplifiers.